DE3731787A1 - Arrangement of a plurality of ICs on a tape strip consisting of insulating material - Google Patents
Arrangement of a plurality of ICs on a tape strip consisting of insulating materialInfo
- Publication number
- DE3731787A1 DE3731787A1 DE19873731787 DE3731787A DE3731787A1 DE 3731787 A1 DE3731787 A1 DE 3731787A1 DE 19873731787 DE19873731787 DE 19873731787 DE 3731787 A DE3731787 A DE 3731787A DE 3731787 A1 DE3731787 A1 DE 3731787A1
- Authority
- DE
- Germany
- Prior art keywords
- strip
- lines
- longitudinal direction
- conductor
- tape
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Multi-Conductor Connections (AREA)
Abstract
Description
Die vorliegende Erfindung betrifft eine Anordnung nach dem Oberbegriff des Patentanspruchs 1.The present invention relates to an arrangement according to the Preamble of claim 1.
Es ist bereits bekannt, zur rationellen Bestückung von Leiterplatten und dergleichen mit IC's (integrierten Schalt kreisen) das sogenannte TAB-Verfahren (tape automated bonding) anzuwenden. Es ist auch bekannt, bei Flüssigkri stall-Anzeigezellen die erforderlichen Ansteuerschaltkreise direkt auf einer der beiden Deckplatten anzuordnen. Die Deckplatten bestehen bevorzugt aus Glas und tragen Leiter bahnen, die mit den Anschlüssen der Ansteuer-IC's verbunden werden. Zum Aufbringen der IC's eignet sich das TAB-Ver fahren. It is already known for the efficient assembly of Printed circuit boards and the like with IC's (integrated circuit circling) the so-called TAB process (tape automated bonding). It is also known at liquid cri stall display cells the necessary control circuits to be placed directly on one of the two cover plates. The Cover plates are preferably made of glass and carry conductors tracks that are connected to the connections of the drive ICs will. The TAB-Ver is suitable for applying the IC's drive.
Um die optische Darstellung der Flüssigkristall-Anzeigeflä chen jedoch nicht zu beeinträchtigen, werden an die Art und Form der Führung der Leiterbahnen besondere Anforderungen gestellt, die sich nur erfüllen lassen, wenn bereits die Anordnung der IC's und der Leiterbahnen auf dem Bandstreifen oder Film (tape) entsprechend getroffen sind.For the visual representation of the liquid crystal display area However, the type and Form of the routing of the conductor tracks special requirements which can only be fulfilled if the Arrangement of the IC's and the conductor tracks on the strip or film (tape) are taken accordingly.
Der vorliegenden Erfindung liegt die Aufgabe zugrunde, eine Anordnung der IC's und der zugehörigen Leiterbändchen auf einem Bandstreifen für automatisierte Bestückung anzugeben, die eine sehr raumsparende Anordnung der IC's auf Leiter platten, insbesondere auf Glassubstraten von Flüssigkri stall-Anzeigezellen, ermöglicht.The present invention has for its object a Arrangement of the IC's and the associated conductor strips specify a tape strip for automated assembly, which is a very space-saving arrangement of the ICs on conductors plates, especially on glass substrates of liquid crystals stall display cells.
Diese Aufgabe wird durch die im Kennzeichen des Patentan spruchs 1 angegebenen Merkmale gelöst.This task is carried out by the in the characterizing part of the patent solved 1 specified features.
Ein wesentlicher Vorteil der Erfindung besteht darin, daß das TAB-Verfahren in einfacher Weise bei der raumsparenden Bestückung, insbesondere von Leiterplatten auf Glasbasis (chip on glas), anwendbar ist. Besonders geeignet ist die beschriebene Anordnung der IC's mit den zugehörigen Leiter bändchen zum Aufbringen von Ansteuer-IC's auf die gläsernen Deckplatten von Flüssigkristall-Anzeigevorrichtungen. Auch ist vorteilhaft, daß die Packungsdichte der IC's auf dem Bandstreifen erhöht werden kann.A major advantage of the invention is that the TAB process in a simple way with the space-saving Assembly, especially of glass-based circuit boards (chip on glass), is applicable. The is particularly suitable described arrangement of the IC's with the associated conductor Ribbon for applying control ICs to the glass ones Cover plates of liquid crystal display devices. Also it is advantageous that the packing density of the ICs on the Tape strips can be increased.
Anhand des in der Figur dargestellten Ausführungsbeispiels wird die Erfindung nachfolgend näher erläutert.Based on the embodiment shown in the figure the invention is explained in more detail below.
Die Figur zeigt einen Abschnitt eines für das TAB-Verfahren geeigneten Bandstreifens mit gemäß der Erfindung angeordne ten IC's und zugehörigen Leiterbändchen.The figure shows a section of one for the TAB method suitable strip with arranged according to the invention IC's and associated conductor tapes.
Der Bandstreifen 1 besteht aus einem flexiblen Band aus Isoliermaterial, z. B. aus einem Kaptonfolienband. Der Bandstreifen 1 besitzt am Rande, ähnlich wie ein Kinofilm, eine Perforation 2, das sind Lochreihen mit konstanten Abständen. Auf diesem Bandstreifen 1 sind eine Vielzahl von IC's 5 angebracht, deren Anschlüsse als dünne Leiterbahnen bändchen 6 und 7 ebenfalls auf dem Bandstreifen 1 angebracht sind. Um ein Aufbringen und Kontaktieren dieser IC's auf einer Leiterplatte bzw. einem Glassubstrat zu ermöglichen, weist dieser Bandstreifen Durchbrüche 3 und 4 als sogenannte Kontaktierungsfenster 3 und 4 auf, die von den Leiterbahnen 6 und 7 freitragend überspannt werden. An diesen freiliegen den Strecken der Leiterbahnen erfolgt die Kontaktierung mit den Leiterbahnen auf dem Substrat, z. B. einer gläsernen Deckplatte einer Flüssigkristall-Anzeigezeile. Im Bereich der Kontaktierungsfenster bilden die Leiterbahnen 6, 7 freitragende Leiterbändchen.The tape strip 1 consists of a flexible tape made of insulating material, for. B. from a Kapton film tape. The tape strip 1 has a perforation 2 on the edge, similar to a movie, that is rows of holes with constant intervals. On this tape strip 1 , a plurality of IC's 5 are attached, the connections of which as ribbon strips 6 and 7 are also attached to the tape strip 1 . In order to make it possible to apply and contact these ICs on a printed circuit board or a glass substrate, this strip has openings 3 and 4 as so-called contact windows 3 and 4 , which are cantilevered over by the conductor tracks 6 and 7 . At these exposed sections of the conductor tracks, contact is made with the conductor tracks on the substrate, e.g. B. a glass cover plate of a liquid crystal display line. In the area of the contacting window, the conductor tracks 6, 7 form self-supporting conductor strips.
Um nun auf den insbesondere als Deckplatten für Flüssigkri stall-Anzeigevorrichtungen ausgebildeten Leiterplatten eine das Betrachtersichtfeld nicht störende und die Deckplatten möglichst wenig vergrößernde Anordnung der Ansteuer-IC's zu ermöglichen, sind die Kontaktierungsfenster 4 für die Bus leitungen 6 zu beiden Seiten des IC 5 jeweils zwischen dem IC 5 und den Löcherreihen der Perforation 2 des Bandstrei fens 1 angeordnet. In order to enable on the circuit boards, in particular as cover plates for liquid crystal display devices, a viewer field of view that is not distracting and the cover plates are enlarged as little as possible, the contacting windows 4 for the bus lines 6 on both sides of the IC 5 are each between the IC 5 and the rows of holes in the perforation 2 of the tape strip 1 are arranged.
Die Ausgangsleitungen 7 des IC 5 befinden sich auf einer Seite des IC 5. Das Kontaktierungsfenster 3 für die Aus gangsleitungen 7 ist in Längsrichtung des Bandstreifens 1 zum IC 5 versetzt angeordnet. Die Längsausdehnung des Kon taktierungsfensters 3 ist senkrecht zur Längsrichtung des Bandstreifens 1. Die Ausgangsleitungen 7 verlaufen im we sentlichen parallel zueinander, zumindest in dem Bereich, in dem sie das Kontaktierungsfenster 7 freitragend überspannen. Die Leiterbahnen 7 verlaufen also im Bereich des Kontaktie rungsfensters 3 im wesentlichen parallel zur Längsrichtung des Bandstreifens 1.The output lines 7 of the IC 5 are on one side of the IC 5 . The contacting window 3 for the output lines 7 is arranged offset in the longitudinal direction of the strip 1 to the IC 5 . The longitudinal extent of the contacting window 3 is perpendicular to the longitudinal direction of the strip 1 . The output lines 7 extend we sentlichen parallel to each other at least in the area in which they span the contact-making 7-supporting. The conductor tracks 7 thus run in the area of the contact window 3 essentially parallel to the longitudinal direction of the strip 1 .
Die Busleitungen 6 verlaufen in dem Bereich, in dem sie die Kontaktierungsfenster 4 zu beiden Seiten des IC 5 überspan nen, im wesentlichen senkrecht zu den Längskanten des Band streifens 1.The bus lines 6 run in the area in which they span the contacting window 4 on both sides of the IC 5 , substantially perpendicular to the longitudinal edges of the strip 1 .
Gemäß einer Weiterbildung der Erfindung ist das Rastermaß der Busleitungen 6 größer als das der Ausgangsleitungen 7, insbesondere etwa zwei mal so groß. Bei einem bevorzugten Ausführungsbeispiel besaßen die Leiterbahnen der Ausgangs leitungen 7 eine Breite von etwa 100 µm bei einem Abstand von etwa 100 µm, also ein Rastermaß von etwa 0,2 mm.According to a development of the invention, the grid dimension of the bus lines 6 is larger than that of the output lines 7 , in particular approximately twice as large. In a preferred embodiment, the conductor tracks of the output lines 7 had a width of about 100 microns at a distance of about 100 microns, so a pitch of about 0.2 mm.
Die Leiterbahnen der Busleitungen 6 besaßen bei einer Breite von etwa 150 µm einen Abstand von etwa 200 µm, also ein Rastermaß von etwa 0,35 mm. Die Rastermaßangaben beziehen sich bevorzugt auf die Bereiche, in denen die Leiterbahnen als freitragende Bändchen die Kontaktierungsfenster 3 bzw. 4 überspannen. The conductor tracks of the bus lines 6 had a width of approximately 150 μm and a spacing of approximately 200 μm, that is to say a grid dimension of approximately 0.35 mm. The grid dimensions preferably relate to the areas in which the conductor tracks, as self-supporting strips, span the contacting windows 3 and 4 .
Die Kontaktierungsfenster 3 bzw. 4 sind bevorzugt schlitz förmig ausgebildete Durchbrüche in dem Bandstreifen 1 aus Isolierfolie. Die beschriebene Anordnung der IC's auf den Bandstreifen ermöglicht eine so dichte Packung der IC's, daß jeweils nur zwei Perforationsöffnungen 2 einer IC-Anordung mit den zugehörigen drei Kontaktierungsfenstern 3, 4 nebst zugehörigen Bus- und Ausgangsleitungen 6, 7 zugeordnet sind.The contacting windows 3 and 4 are preferably slot-shaped openings in the tape strip 1 made of insulating film. The arrangement of the ICs described on the strip strips enables the ICs to be packed so densely that only two perforation openings 2 are assigned to an IC arrangement with the associated three contacting windows 3, 4 together with associated bus and output lines 6, 7 .
Claims (5)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19873731787 DE3731787C2 (en) | 1987-09-22 | 1987-09-22 | Arrangement of several ICs on a strip of insulating material |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19873731787 DE3731787C2 (en) | 1987-09-22 | 1987-09-22 | Arrangement of several ICs on a strip of insulating material |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3731787A1 true DE3731787A1 (en) | 1989-03-30 |
DE3731787C2 DE3731787C2 (en) | 2000-11-16 |
Family
ID=6336540
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19873731787 Expired - Lifetime DE3731787C2 (en) | 1987-09-22 | 1987-09-22 | Arrangement of several ICs on a strip of insulating material |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE3731787C2 (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0388312A2 (en) * | 1989-03-17 | 1990-09-19 | Furukawa Denki Kogyo Kabushiki Kaisha | Chip carrier with improved flexing characteristic |
EP0493870A2 (en) * | 1990-11-28 | 1992-07-08 | Sharp Kabushiki Kaisha | A TAB package and a liquid-crystal panel unit using the same |
EP0567209A2 (en) * | 1992-04-16 | 1993-10-27 | Sharp Kabushiki Kaisha | Liquid crystal panel module and tape carrier package for liquid crystal driver IC |
EP0587144A2 (en) * | 1992-09-08 | 1994-03-16 | Seiko Epson Corporation | Liquid crystal display apparatus, structure for mounting semiconductor device, method of mounting semiconductor device, electronic optical apparatus and electronic printing apparatus |
EP0609074A2 (en) * | 1993-01-27 | 1994-08-03 | Sharp Kabushiki Kaisha | Assembly structure of a flat type device |
DE4133183B4 (en) * | 1990-10-13 | 2005-07-28 | Hynix Semiconductor Inc., Ichon | Enclosure design for chip TAB devices, use thereof and methods of assembling same |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2414297A1 (en) * | 1974-03-25 | 1975-10-02 | Siemens Ag | Perforated plastics tape for mfr. of semiconductor elements - is a laminate comprising a base stratum, with epoxy adhesive layer, copper layer, and photo-lacquer layer |
DE3508385A1 (en) * | 1984-03-09 | 1985-09-26 | Osakeyhtiö Lohja Ab, Virkkala | METHOD FOR ENCAPSULATING SEMICONDUCTOR COMPONENTS THAT ARE ARRANGED ON A CARRIER TAPE |
DE3618210A1 (en) * | 1985-11-26 | 1987-05-27 | Robotron Veb K | Wiring carrier for connecting semiconductor chips with a large number of pins |
-
1987
- 1987-09-22 DE DE19873731787 patent/DE3731787C2/en not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2414297A1 (en) * | 1974-03-25 | 1975-10-02 | Siemens Ag | Perforated plastics tape for mfr. of semiconductor elements - is a laminate comprising a base stratum, with epoxy adhesive layer, copper layer, and photo-lacquer layer |
DE3508385A1 (en) * | 1984-03-09 | 1985-09-26 | Osakeyhtiö Lohja Ab, Virkkala | METHOD FOR ENCAPSULATING SEMICONDUCTOR COMPONENTS THAT ARE ARRANGED ON A CARRIER TAPE |
DE3618210A1 (en) * | 1985-11-26 | 1987-05-27 | Robotron Veb K | Wiring carrier for connecting semiconductor chips with a large number of pins |
Cited By (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0388312A3 (en) * | 1989-03-17 | 1991-04-24 | Furukawa Denki Kogyo Kabushiki Kaisha | Chip carrier with improved flexing characteristic |
EP0388312A2 (en) * | 1989-03-17 | 1990-09-19 | Furukawa Denki Kogyo Kabushiki Kaisha | Chip carrier with improved flexing characteristic |
DE4133183B4 (en) * | 1990-10-13 | 2005-07-28 | Hynix Semiconductor Inc., Ichon | Enclosure design for chip TAB devices, use thereof and methods of assembling same |
EP0493870A2 (en) * | 1990-11-28 | 1992-07-08 | Sharp Kabushiki Kaisha | A TAB package and a liquid-crystal panel unit using the same |
EP0493870A3 (en) * | 1990-11-28 | 1992-07-22 | Sharp Kabushiki Kaisha | A tab package and a liquid-crystal panel unit using the same |
US5402255A (en) * | 1992-04-16 | 1995-03-28 | Sharp Kabushiki Kaisha | Liquid crystal panel module and tape carrier package for liquid crystal driver IC |
EP0567209A2 (en) * | 1992-04-16 | 1993-10-27 | Sharp Kabushiki Kaisha | Liquid crystal panel module and tape carrier package for liquid crystal driver IC |
EP0567209A3 (en) * | 1992-04-16 | 1993-12-29 | Sharp Kk | Liquid crystal panel module and tape carrier package for liquid crystal driver ic |
US5737272A (en) * | 1992-09-08 | 1998-04-07 | Seiko Epson Corporation | Liquid crystal display apparatus, structure for mounting semiconductor device, method of mounting semiconductor device, electronic optical apparatus and electronic printing apparatus |
EP0587144A3 (en) * | 1992-09-08 | 1994-06-08 | Seiko Epson Corp | Liquid crystal display apparatus, structure for mounting semiconductor device, method of mounting semiconductor device, electronic optical apparatus and electronic printing apparatus |
US5986342A (en) * | 1992-09-08 | 1999-11-16 | Seiko Epson Corporation | Liquid crystal display apparatus structure for mounting semiconductor device |
US6128063A (en) * | 1992-09-08 | 2000-10-03 | Seiko Epson Corporation | Liquid crystal display apparatus having multi-layer substrate |
EP0587144A2 (en) * | 1992-09-08 | 1994-03-16 | Seiko Epson Corporation | Liquid crystal display apparatus, structure for mounting semiconductor device, method of mounting semiconductor device, electronic optical apparatus and electronic printing apparatus |
EP0609074A3 (en) * | 1993-01-27 | 1994-11-23 | Sharp Kk | Assembly structure of a flat type device. |
EP0609074A2 (en) * | 1993-01-27 | 1994-08-03 | Sharp Kabushiki Kaisha | Assembly structure of a flat type device |
US5670994A (en) * | 1993-01-27 | 1997-09-23 | Sharp Kabushiki Kaisha | Assembly structure of a flat type device including a panel having electrode terminals disposed on a peripheral portion |
Also Published As
Publication number | Publication date |
---|---|
DE3731787C2 (en) | 2000-11-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8110 | Request for examination paragraph 44 | ||
8127 | New person/name/address of the applicant |
Owner name: AEG GESELLSCHAFT FUER MODERNE INFORMATIONSSYSTEME |
|
8128 | New person/name/address of the agent |
Representative=s name: WEBER, G., DIPL.-PHYS., PAT.-ANW., 89073 ULM |
|
D2 | Grant after examination | ||
8363 | Opposition against the patent | ||
8365 | Fully valid after opposition proceedings |