DE3574093D1 - Device for the fast clock and phase acquisition of a digital signal - Google Patents

Device for the fast clock and phase acquisition of a digital signal

Info

Publication number
DE3574093D1
DE3574093D1 DE8585401586T DE3574093T DE3574093D1 DE 3574093 D1 DE3574093 D1 DE 3574093D1 DE 8585401586 T DE8585401586 T DE 8585401586T DE 3574093 T DE3574093 T DE 3574093T DE 3574093 D1 DE3574093 D1 DE 3574093D1
Authority
DE
Germany
Prior art keywords
digital signal
fast clock
phase acquisition
acquisition
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8585401586T
Other languages
German (de)
Inventor
Jean Milon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
PAPIN ANTOINE
Original Assignee
PAPIN ANTOINE
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by PAPIN ANTOINE filed Critical PAPIN ANTOINE
Application granted granted Critical
Publication of DE3574093D1 publication Critical patent/DE3574093D1/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
DE8585401586T 1984-08-10 1985-08-02 Device for the fast clock and phase acquisition of a digital signal Expired DE3574093D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8412675A FR2569070B1 (en) 1984-08-10 1984-08-10 METHOD AND DEVICE FOR FAST ACQUISITION OF THE RHYTHM AND THE PHASE OF A DIGITAL SIGNAL

Publications (1)

Publication Number Publication Date
DE3574093D1 true DE3574093D1 (en) 1989-12-07

Family

ID=9306968

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585401586T Expired DE3574093D1 (en) 1984-08-10 1985-08-02 Device for the fast clock and phase acquisition of a digital signal

Country Status (3)

Country Link
EP (1) EP0174237B1 (en)
DE (1) DE3574093D1 (en)
FR (1) FR2569070B1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2606568B1 (en) * 1986-11-06 1993-12-10 Milon Jean METHOD AND DEVICE FOR FAST ACQUISITION OF THE RHYTHM AND THE PHASE OF A DIGITAL SIGNAL, USING AN ANALOG PHASE LOCKED LOOP AND PHASE JUMPS
US9071921B2 (en) 2009-12-23 2015-06-30 Futurewei Technologies, Inc. System and method for event driven operations in a communications system

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2654927A1 (en) * 1976-12-03 1978-06-08 Siemens Ag CIRCUIT ARRANGEMENT FOR SCANNING ONE-SIDED DISTORTED TELE SIGNS
US4335361A (en) * 1977-09-01 1982-06-15 Honeywell Inc. Variable gain amplifier
US4229824A (en) * 1978-07-21 1980-10-21 Cubic Corporation Method and apparatus for synchronizing electrical signals
JPS5949745B2 (en) * 1980-09-08 1984-12-04 富士通株式会社 Clock selection method
DE3171263D1 (en) * 1980-12-12 1985-08-08 Philips Electronic Associated Phase sensitive detector

Also Published As

Publication number Publication date
EP0174237B1 (en) 1989-11-02
FR2569070A1 (en) 1986-02-14
FR2569070B1 (en) 1991-04-19
EP0174237A1 (en) 1986-03-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee