DE3565351D1 - Inverter circuit realized by using cmos transistor technique - Google Patents

Inverter circuit realized by using cmos transistor technique

Info

Publication number
DE3565351D1
DE3565351D1 DE8585108065T DE3565351T DE3565351D1 DE 3565351 D1 DE3565351 D1 DE 3565351D1 DE 8585108065 T DE8585108065 T DE 8585108065T DE 3565351 T DE3565351 T DE 3565351T DE 3565351 D1 DE3565351 D1 DE 3565351D1
Authority
DE
Germany
Prior art keywords
current
inverter circuit
cmos transistor
mosfet
circuit realized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8585108065T
Other languages
German (de)
Inventor
Wolfgang Dipl Ing Gollinger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Micronas GmbH
Original Assignee
Deutsche ITT Industries GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche ITT Industries GmbH filed Critical Deutsche ITT Industries GmbH
Application granted granted Critical
Publication of DE3565351D1 publication Critical patent/DE3565351D1/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00323—Delay compensation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
    • H03K5/2481—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors with at least one differential stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

The MOSFET's (tp, tn) are controlled via a pair of capacitors (C1,C2) each coupled between one of the transistor gates and the inverter input (e). The inverter output (ag) is provided by the common junction of the two series MOSFET's (tp,tn). Each of the MOSFET's (tp,tn) acts as the output transistor of a respective current reflector (s1,s2), the outputs of both of which are switched between two levels in opposition. The control current (is 1) for the first current reflector (s1) is provided by a third current source (s3), in turn controlled by a reference current reflector (sr) which also supplies a second control current for the secnd current reflector (s2).
DE8585108065T 1985-06-28 1985-06-28 Inverter circuit realized by using cmos transistor technique Expired DE3565351D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP19850108065 EP0205649B1 (en) 1985-06-28 1985-06-28 Inverter circuit realized by using cmos transistor technique

Publications (1)

Publication Number Publication Date
DE3565351D1 true DE3565351D1 (en) 1988-11-03

Family

ID=8193593

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585108065T Expired DE3565351D1 (en) 1985-06-28 1985-06-28 Inverter circuit realized by using cmos transistor technique

Country Status (4)

Country Link
EP (1) EP0205649B1 (en)
JP (1) JPS626533A (en)
CN (1) CN86103472A (en)
DE (1) DE3565351D1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1910818B (en) * 2004-01-13 2010-06-23 Nxp股份有限公司 High speed comparator
CN115021687B (en) * 2022-05-18 2023-03-28 杭州地芯科技有限公司 Operational amplifier and electronic system

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2542403A1 (en) * 1974-11-26 1976-08-12 Rca Corp COMPARATOR CIRCUIT
JPS5855685B2 (en) * 1975-09-03 1983-12-10 株式会社日立製作所 Zoufuku Cairo
US4069431A (en) * 1976-12-22 1978-01-17 Rca Corporation Amplifier circuit
US4394587A (en) * 1981-05-27 1983-07-19 Motorola, Inc. CMOS Differential comparator with hysteresis
US4410813A (en) * 1981-08-14 1983-10-18 Motorola, Inc. High speed CMOS comparator circuit
JPS5840918A (en) * 1981-09-03 1983-03-10 Nec Corp Voltage comparator

Also Published As

Publication number Publication date
CN86103472A (en) 1986-12-24
JPS626533A (en) 1987-01-13
EP0205649B1 (en) 1988-09-28
EP0205649A1 (en) 1986-12-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee