DE3513542A1 - Hierarchical multi-processor system with system bus and local bus structures based on the VME bus specification - Google Patents

Abstract

In data processing and in process and control engineering, multiprocessor systems are used for processing input data in parallel with a high real-time requirement/resolution and making the result data available. The performance of such multi-processor systems can be optimised with respect to data preprocessing, data concentration and final data processing if their system structure can be flexibly adapted to the respective requirements on the basis of a hierarchical bus system for inter-processor communication. Selecting the VME bus specification for all bus systems within a hierarchical multi-processor system with arbitrary system bus and local bus structures makes it possible to implement complex but structurally very simple and inexpensive systems in the logical structure.

Description

Hierarchical multi-processor system with system bus and

Local bus structures based on the VME bus specification The invention relates to the structure and implementation of a hierarchical bus structure using of the VME bus specification excluding the specifications for the J2 / P2 backplane wiring according to the preamble of claim 1.

Multi-processor systems are used in data processing as well as in the Control and regulation technology preferred for the parallel processing of at the same time Accruing amounts of data and / or tasks are used. In addition to other well-known bus concepts like Multibus I, Multibus II, VERSAbus, etc., the VME bus is also used for the solution used for such problems. With the subsequent introduction of VMS-Bus and VMX bus, the closed VME bus system, implemented by a VME bus, is closed a bus system consisting of three individual bus systems.

The bus specifications are e.g. in the following documentation fixed: - Multibus II Bus Architecture Specification Handbook, Intel Corporation - VERSAbus Specification Manual, Motorola Inc.

- VMEbus Specification Manual Rev. B, Aug. 1982, VMEbus MANUFACTURERS GROUP, - VMXbus Specification Manual, Rev. A, Oct. 1983, VMEbus MANUFACTURERS GROUP.

The VME bus concept (VMEbus, VMXbus, VMSbus) thus obtained shows however, there are some disadvantages. These disadvantages come into play especially when a multi-processor system with hierarchical bus structures for solving more complex ones Tasks should be used. In detail, the following can be used as The following are considered disadvantageous: - the VMS bus only provides bit-serial inter-module communication possible. Processes running in parallel in the system can be slowed down considerably as a result - on the VMX bus, the multi-master capability is on a primary master and a secondary master limited - the total number of modules on the VMX bus is limited to a maximum of six modules - in contrast to the mechanical and electrical ones VME bus specifications Rev. B correspond to the mechanical and electrical specifications of the VMX bus does not meet the quality requirements of modern system developments.

The realization of a hierarchical multiprocessor system with a VME bus as a global system bus and a VMX / VMS bus as a local bus afflicted with disadvantages (see above). Multiple, hierarchical bus structures can on the one hand for the reasons mentioned above and on the other hand because of the mechanical Bus specifications (arrangement of the connectors only on the component side of a board, see Specification VMX-Bus Rev. A and Specification VME-Bus Rev. B, page 8-2, published by VMEbus MANUFACTURERS GROUP) not implemented in practice will.

The invention is based on the object of a flexible, hierarchical Enable bus system. The object is achieved according to the invention by any bus hierarchy of the VME bus specification to the exclusion of the specifications for the J2 / P2 connector. The J2 / P2 plug that has become free becomes the connection of a local bus.

This local bus is also used to build hierarchical Bus structures are used and its mechanical and electrical properties specified in the same way as the global system bus of a hierarchical multiprocessor system. This means that the J1 / P1 connector and the J2 / P? Connector meet the VME bus specifications (Specifications for the J1 / P1 connector). Due to the specification As a VME bus, a local bus can in turn act as a global bus for other local buses can be used.

This is the prerequisite for building hierarchical bus systems given with more than two levels (see picture 1).

A property according to the invention of the hierarchical structure of the individual Bus levels also consist of the local bus, i.e. the corresponding backplane wiring (Backplane) rotated by 180 degrees into a subrack (typically a 19th Inch subrack) is installed (see Figure 2, front view). The new bus concept thus enables any VME bus cards (modules) on both the global and can also be used on the local bus. For the coupling of two adjacent bus hierarchy levels modules with two bus connectors are used. The arrangement of the required for this The bus connector corresponds to the arrangement outlined in Figure 2 (Figure 2, front view, Supervision). The plugs are attached in such a way that the plug of the higher bus level on the component side and the connector of the lower level on the soldering side the module card is located.

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Claims (3)

Claims 1. Hierarchical multi-processor system for use in data processing, process automation and control engineering, which one has any, multi-level and hierarchical bus structure, characterized in that that for all bus systems within the hierarchical multi-processor system the VME bus specification excluding specifications for J2 / P2 backplane wiring is based. 2. Hierarchical multi-processor system according to claim 1, with a Backplane wiring of the local buses according to the VME bus specification, characterized in that, that the VME bus backplane wiring for the local bus in the subrack is installed rotated by 180 degrees. 3. Hierarchical multi-processor system according to claim 1 and 2, with the coupling of two adjacent bus hierarchy levels through modules with two bus connectors, characterized in that the plug of the higher bus level is on the component side and the plug of the lower bus level is on the solder side of the coupling module card is located.