DE3441413A1 - Method for triggering electronic explosive time fuzes such that they are staggered in time - Google Patents

Abstract

In order to trigger a plurality of electronic explosive time fuzes, which are jointly connected to a fuzing machine such that they are staggered in time, a signal flow, which is produced in each explosive fuze, for example a pulse sequence, is integrated by means of signals which are emitted from the fuzing machine in order to define the delay time, and is integrated up or down again or until equality of the integrals or of the initial values is reached, in order to implement the delay. According to the invention, the integration starts at the same time in all the explosive fuzes, the end of the integration being controlled by signals from the fuzing machine. This end and hence the time duration can be identical for all the explosive time fuzes, the relative differences between the delay times being determined by the ratio of the signal flows which are different during setting and when the delay is subsequently implemented, or the end points of the integration being different in a fuze-specific manner, while the two signal flows are preferably identical. In order to increase safety, a pulse sequence having a specific construction is emitted from the fuzing machine before the delay time is set, and is tested in each electronic explosive fuze, so that the setting of false delay values by interference signals is prevented. An energy store in each explosive fuze is not charged to a value which is sufficient for triggering the fuze until the test of the pulse sequence has been successful. <IMAGE>

Description

Procedure for staggered release

Electronic Time Detonator The invention relates to a method for timed triggering of electronic detonators with individual Delay times compared to a command signal from a blasting machine, which with the detonators in a series and / or parallel connection to at least an ignition circuit is connected, in which in one by time signals from the ignition machine specific charging phase for setting the individual delay time in each this detonator is supplied with a first signal flow from a source to an integrator and in a subsequent delay phase, in all detonators with the command signal beginning at the same time, one which is related to the first signal flow in a predetermined manner second signal flow is fed to the integrator until that occurs in the integrator reached stored integral of the first signal flow or this reduced to zero and the ignition is triggered.

In a known method of this type (DE-OS 29 45 122) delivers a blasting machine to numerous connected detonators a pulse train, whose pulses are counted by a counter contained in each detonator. At a The igniter-specific first count of the counter is the pulses of one in the igniter contained pulse source to an integrator designed as a forward / backward counter delivered, which is thereby charged. The charge ends for each of the detonators, when its first counter has reached a second count. The first counter counts thereafter and after reaching a third count value that applies to all detonators is the same, the integrator is switched over, so that the subsequent pulses of the Pulse source are counted backwards and the content of the integrator decreases. if the content of the integrator has dropped to a predetermined value which may be zero the ignition is triggered. The individual time delays of each In the known system, detonators are obtained by the fact that the integration process starts at different times, i.e. the first count of the first counter of the individual integrators are set differently. The charging phases of the Integrators of all detonators thus differ in their starting times.

The same delays that apply to the start times of the charging phases occur later also when the discharge phase is ended.

Either that detonator, its integrator charging last started to ignite first because the integrator only went down to a low level Value has been charged or if all integrators up to the same value are charged, ignites the one Detonator as the last, its Last started. The known ignition system is circuitry expensive because at least two comparators are required in each detonator in addition to the counter by means of which the first and the second count value of this counter are determined.

The invention is based on the object of a method of the above Specify the type in which the circuit complexity in the detonator is reduced.

The solution to this problem is that the supply the first signal flows to the integrators of all detonators at the same time and begins for each detonator the individual delay time only from the time signals dependent end of the supply of the first signal flows or by the ratio of both Signal flows to each other is determined.

In the method according to the invention, the integrators become more intense Detonators connected to the blasting machine together when the time signal occurs started, so that with regard to the start of the charging phase no individual Settings in the detonators are required. The end of the charging phase can be ignition-specific can be set, but there is also the option of changing the length for all rounders to equalize the charging phase. In any case, the effort required is reduced Comparators in the circuit of the detonator. The reduction in circuit complexity in the detonator is important because the detonator circuit is only used once and when detonating the pyrotechnic charge is destroyed. The igniter circuit should therefore be as simple as that and be constructed as inexpensively as possible.

When using the method according to the invention, in the electronic Detonators after inserting them into the blast holes and wiring them together a voltage at the inputs at least due to electromagnetic fields in particular some detonators are produced that have the electronic elements already in Operation sets and creates undefined states in it, so that the subsequent The individual delay time has not been set correctly.

Furthermore, it is also possible that when setting the individual Delay time due to superimposed interfering signals incorrect states occur. To therefore increased security when setting the individual delay times to be achieved by the signal of the blasting machine, it is according to one embodiment of the method according to the invention expediently that before the time signal from the blasting machine transmit a first predetermined number of release pulses in a first time sequence and during the duration of which one of the signal flows is integrated and then a second predetermined number of start pulses different from the first number in a time sequence that differs from the first, but has the same duration Transfer time sequence and also integrated this signal flow during this period and that the ignition is only triggered if the deviation of the during the integral formed during the first time sequence of that during the second time sequence formed integral after receiving a predetermined total number of pulses is below a predetermined limit. This ensures that the setting of the individual delay times and also the triggering of the detonator only takes place if the signals generated by the blasting machine come from the blasting time ignite processed properly. The effort involved in the individual electronic detonators this increases somewhat, but this is due to the additional security gained in operation more than balanced.

It is useful that the first time sequence is a predetermined first constant frequency and the second time sequence a predetermined second constant frequency is.

In this way, the impulses can easily be in both time series steer.

To prevent a detonator detonating the release pulses and has not correctly processed the subsequent start impulses, has not been set and so that it is not triggered afterwards either, it is advisable that the sequence the first and second time sequence is repeated at least once and the release of the output pulse occurs only if at least a second time sequence at the end the deviation of the two integrals is below the given limit and that in the event of a greater deviation, the integrals are reset to an initial value will. In this way it is achieved that at least after the first succession the first and second time series defined states are present in the detonator and the next sequence of pulses is processed properly.

When using the above-mentioned embodiments of the The method according to the invention for increasing safety must be used in the detonator between the enable and start pulses and the subsequent setting signal the individual delay time can be differentiated. To this easy to carry out, a further embodiment of the invention is characterized in that that the shortest duration of at least the first time signal supplied by the ignition machine is greater than the longest duration of the release pulses by a predetermined factor and that from the first to the end of the second time sequence or the predetermined number pulse received from second time sequences, at the end of which the integral of the signal flow has exceeded a predetermined second limit received from the blasting machine Signals are evaluated as time signals.

In the known method mentioned at the outset, the detonators have time-release detonators an energy store to which energy is supplied from outside and which the elements of the electronic detonator and the energy to ignite the ignition element supplies. To prevent a detonator from going uncontrolled in the event of strong stimulus signals triggers, it is appropriate that the value of the at the end of the support phase or at the end of every first time sequence reached integral is set to the opposite value and then integrated in the same direction as before. This is a sufficient Energy supply to the ignition element is only possible when the detonator causes the result correctly processed enable pulses and start pulses. The replica however, such a consequence due to interfering signals is practically impossible.

The invention also relates to an electronic detonator for connection to an ignition machine which delivers at least one time signal, with a Signal auelle, which in a determined by the time signal Charging phase provides a first signal flow for charging an integrator, and with a control device, which, after the charging phase has elapsed, initiates a delay phase in which the signal source a second signal flow for discharging or recharging the integrator supplies, whereby an ignition signal is generated when the content of the integrator is on a predetermined value has been reduced or when the integrator is recharged the stored integration value of the charging phase has been reached.

In the case of such a detonator, it is provided according to the invention that the signal source can be reversed in such a way that it coincides with the two signal flows different values generated.

The values of both signal flows have a fixed division ratio to each other, which is detonator-specific.

In this way, the ratio of the length of the charging phase and Delay phase can be made different for each individual detonator, with the charging phases are the same for all detonators. There is also the possibility of to make the delay phase either larger or smaller than the charging phase.

Preferably, the signal source contains a pulse generator, the one Frequency divider is connected downstream, and the first signal flow runs through the frequency divider, while the second signal flow directly from the pulse generator to that designed as a counter Integrator is running. The signal source only needs a single pulse generator to contain, so that it is ensured that the pulses in the charging phase have the same frequency as in the deceleration phase. In the charging phase there is a frequency division by the frequency divider. The pulse frequencies do not need to be in an integer relationship to one another in both phases; Rather, the frequency divider can also be constructed in such a way that it has integer divider ratios (e.g. 3: 8) enabled. This is with well-known PLL circuits (Phase Locked Loop) possible.

In another embodiment of the invention, the signal source contains contains two constant current sources with different current values and the integrator a charging capacitor. The integrator is charged and discharged here in analog circuit technology, the one constant current source being a source and the other constant current source can form a sink for the integrator current.

Another variant of the electronic detonator of the aforementioned Art is characterized in that the control device of each detonator the first signal flow at the first pulse of the time signal supplied as a pulse train initiates and sustains it up to a detonator-specific set m-th pulse and the second signal flow begins at the nth pulse of the timing signal, where m ~ n is. In this variant, the control device can contain a counter, which counts up to the value n (modulo-n counter), can be determined by a comparator when the count value m is reached. In this case, except for the counter only a single comparator is required.

Instead of a counter, a shift register can also be used, which is traversed by the first pulse of the time signal and that of the pulses of the time signal is clocked. Such a shift register Has n stages and one output each at the n-th stage and at the m-th stage.

To ensure safety when charging and possibly discharging the integrator and to increase when generating the ignition signal, it is expedient that in the inventive electronic time detonator, in which the control device contains a counter, a memory element is provided and that a predetermined counter position of the counter corresponding to the sum of the numbers in a first and a subsequent one Second time sequence from the blasting machine transmitted pulses the first memory element switches over when an integral formed in the integrator during the first time sequence of an integral formed during the second time sequence by less than one specified value deviates, and that the memory element only in the switched state releases the ignition. In this way it is first checked whether the Detonator detonators correctly receive the signals supplied by the detonator and can process it before the generation of an ignition signal is enabled.

The storage element expediently blocks the charging process before the switchover and, if necessary, discharging the integrator to generate the ignition signal. About security To increase further, a monitoring circuit can be provided that the value of the integral compares with predetermined limit values, as in the further subclaims is specified.

To further increase the safety of electronic detonators, where an externally fed energy storage device is used to operate the electronic Elements and the ignition element is present, is it appropriate that only the switched storage element starts charging the energy store releases a value sufficient for the ignition of the ignition element. In this way a premature triggering of the ignition due to interfering signals is practically impossible.

In the following, with reference to the drawings, exemplary embodiments the invention explained in more detail.

The figures show: FIG. 1 an ignition circuit with a more precise representation of a individual detonator i, FIGS. 2 to 5 different variants for the delay time module of the igniter i, FIG. 6 a variant of FIG. 3 or FIG. 5, FIG. 7 a circuit arrangement, in which the setting of the delay time and the release only after an unlocking phase and FIG. 8 shows timing diagrams to explain the function of the circuit according to FIG. 7.

According to FIG. 1, a series circuit k detonators Z to Zk and the associated blasting machine ZM arranged.

The task of the blasting machine is to supply the detonators with energy and to supply signals to them which determine the time T and the ignition on initiate the right time.

The part of the block diagram outlined by dashed lines shows a possible one Internal structure of the electronic part of the igniter Zi For energy supply, for input the delay interval length At and to initiate the Tripping of all detonators k supplies the detonator ZM differently coded streams in the decoder D can be decoded. The coding can be via frequency, amplitude and / or pulse code modulation take place.

If the code is recognized correctly, the following sequence arises: The energy store ES, designed as a capacitor, is via the rectifier G charged and provides the operating voltage for the entire electronics part and the energy for igniting the electrical ignition element ZE. To simplify the The electrical connections from the energy storage device are shown in the drawing ES not shown for the entire electronics part. In the delay time module VZM, its Input 1 with the decoder D and its output 2 with the electronic ignition switch SZ, e.g. a thyristor, is connected, the delay time AT of the individual Fuse realized. This is preferably done digitally by comparing internal data Meter readings, but possibly also analog, e.g. by comparing charging voltages of capacitors. After the time AT has elapsed, the switch SZ is closed, whereupon the energy store ES is discharged via the ignition element ZE and this is ignited.

In Fig. 2 is a delay time module VZM on a digital basis for presented alone. During the programming phase, input 1 is used during the time period T is supplied with a signal. When it begins, switch S1 is closed, whereupon from the pulse generator IG via the frequency divider FT and the switch S1 Pulses are counted into the counter Z. The frequency divider works so that at an input of n pulses only m pulses leave the divider. Here is that relationship from m to n permanently entered into the frequency divider of the respective detonator. In the Counters Z reach the number m during the closing time T of switch S1 fi T pulses, where f. is the frequency of the n 1 i pulse generator IG of the i-th detonator is.

After the period T has elapsed, the switch S1 is opened and in the Trigger phase of the switch S2 at the same time or later by means of a corresponding one Signal, for example a separate pulse IP, which represents the ignition signal, closed. The pulses are then sent directly to the counter from the pulse generator IG Z counted in such a way that its counter content is counted down. If the Counter Z has reached its initial state again, is via the output 2 - as described in FIG. 1 - a corresponding signal to the ignition switch SZ given.

Instead, it could also be provided that the impulses in a second counter with the same initial state to count, if this the same Final state as the first counter has reached, again via output 2 a corresponding one Signal is given to the ignition switch SZ.

In a numerical example, it is assumed that the switch S1 is closed for the duration T = 3 s. At a frequency f. Of the pulse generator IG of 5000 Hz reach the frequency divider FT 15000 pulses in the 3 s. at a frequency division with, for example, n = 64 and m = 24 produces 5625 pulses into the counter Z.

After the switch S2 is closed, the ratio is then from 5625 to 5000 after 1.125 s the ignition element ZE is triggered, since then in the counter Z the same count as in the previous step, namely 5625 pulses received, is reached.

If the pulse generator had a frequency f. = 6000 Hz, then T = 3 s with the same division ratio of 24 to 64 of the frequency divider FT 6750 pulses gets into the counter Z, and when the switch S2 is closed, the same would then be the case The ignition element ZE is ignited according to the ratio of 6750 to 6000 after 1.125 s will.

This method advantageously ensures that the delay interval length At no longer has to be permanently entered in the igniter, i.e. no longer specific to the igniter but can be varied by the time T from the blasting machine. Farther With digital circuit technology, it is guaranteed that the delay time is independent on the frequency of the pulse generator and thus on the tolerances of the electronic Components and environmental influences. The accuracy of the delay time AT is therefore determined exclusively by the short-term stability of the pulse generator IG, which takes into account the requirements that arise in practice.

Due to the digital technology, the frequency divider FT is also independent on the tolerances of its components.

Since in all detonators of an ignition circuit the switches have the same length for the time period T are closed, all detonators of the same time stage m have the same Delay Time. The time stage m is due to the permanently programmed ratio m / n specified in the frequency divider. The delay time interval freely programmable by the blasting machine At is the same length for all detonators regardless of their time level.

In the case of the delay time module shown in FIG. 3, the same applies is executed in digital circuit technology, are in the programming phase over the input 1 from the blasting machine ZM pulses with the frequency fZM the shift register SR fed. The first pulse closes switch S1 and the m-th pulse, where the number of m pulses is ignition-specific - or, if applicable,

also an impulse which corresponds to an integral multiple of m - opens the switch 51 again. For the closing time AT, which is equal to the delay time of a detonator with time step m, then AT = f m. The closing time and This means that the delay time can also be selected using the ignition machine ZM Frequency adjustable.

During the closing time of switch S1, the frequency f. of the internal pulse generator IG a number of AT f. = Ni pulses in the counter Z one-1 1 counted.

Another impulse from the blasting machine ZM, which in turn is the actual one Represents ignition pulse, closes in the release phase after a specified time t> T = 1 n ZM simultaneously for all detonators of an ignition circuit switch S2, see above that the counter content N. is counted down to zero or on with the clock frequency f second counter also until N. is fully counted. When 1 of the counter content is reached Zero or N. the ignition is initiated via output 2.

Instead of the shift register, a counter with a decoder, a frequency divider or the like. be used.

In Fig. 4 is a delay time module in analog circuit technology shown. By means of suitable signals - as described, for example, in connection with FIG - the switch S1 is closed for the time T in the programming phase. While this time the time capacitor CT from the constant current source KSQ1 with the Charging current I1 is charged from the initial voltage source U1 to the final voltage U2. The charging current I1 is related to the later flowing discharge current I like AT to T. After a time t> T, the triggering by is the same for all detonators The ignition signal of the ignition machine ZM, the switch S2 is closed and the time capacitor is closed CT by the constant current source KSQ2, which works as a current sink, with the discharge current 1e discharged. When the time capacitor CT reaches the initial voltage U1 again has, a signal is sent from the downstream comparator K via output 2 the ignition switch SZ released and the ignition initiated.

The setting of the time stage m / n = I1 / 1e is through the ratio of the currents determined.

In Fig. 5 is another embodiment of a delay time module shown in analog circuit technology, in which the setting of the time stage m des Detonator takes place via the shift register SR according to FIG. Through suitable Signals - as described e.g. in connection with Fig. 3 - the switch S1 closed via the shift register SR for the time AT. During this time the constant current 11, the constant current source KSQ charges the time capacitor CT from the initial voltage U1 to the final voltage U2.

After the time AT has elapsed, switch S1 is opened.

Another ignition signal that is the same for all detonators the Ignition machine, the switch S2 is closed and the time capacitor CT over the KSQ now working as a current sink with the discharge current Ie, which is equal to the Charging current Il is discharged. When the time capacitor CT reaches the initial voltage U1, the comparator K sends a signal to the ignition switch SZ via output 2 released and ignition initiated. The spread of the delay time AT is only dependent on the short-term tolerances of the time capacitor CT, the constant current source KSQ and the comparator K.

In Fig. 6, a further possibility of entering the time according to the in Figs. 3 and 5 reproduced principle shown. Here the frequency is that of the blasting machine ZM in the programming phase, the pulses emitted during the time T is no longer constant, but variable. That means that the time interval between the start pulse 0 and the pulse 1 determining the first time stage 1 is different from the one between impulse 1 and further impulse 2, etc.

The general rule here applies to the delay time of the m-th time stage m AT = X A t ..

m 1 1 For example, it can be provided in a specific case that the the pulse defining the first time stage appears 10 ms after the start pulse 0, i.e. At1 = 10 ms.

Let the second impulse appear 30 ms later, for a total of 40 ms after the start pulse, the third pulse e.g. 20 ms later, i.e. 60 ms after the Start pulse, the fourth pulse e.g. 500 ms later, i.e. 560 ms after the Start impulse, etc. A special AT is given by the blasting machine ZM for each time stage m, where m is always AT> AT l. This procedure offers the vorm m-l part that for each time stage m any delay time AT is set by the blasting machine and so the blasting requirements, possibly with further reduced Time stage number, can take even better account of it. The trigger phase will also be again by another signal from the blasting machine, the same for all detonators, the ignition signal ZM initiated, the closing of the switch So and the rest of the process like in Fig. 3 or 5 described causes. It is determined differently when it opens.

7 shows a circuit arrangement with which not only the delay time to trigger the ignition switch SZ can be set, but when the setting the delay time and the release is only carried out after an unlocking phase will.

The arrangement is via the connections 101 and 103 to the blasting machine connected and receives from this first the unlocking signals and then the signals for setting the delay and triggering the ignition. Further these signals become the power supply for the arrangement shown in the figure won.

This takes place in the unit 102 with which the two connections 101 and 103 are connected and which rectifies the incoming signals to to allow polarity reversal of the input lines and in particular also to allow signals, that arrive as bipolar alternating current impulses to be able to process. the from it The voltage obtained is fed to a control circuit 168 via the output 105, which thus charges a capacitor 172 and a regulated one from this charging voltage Operating voltage UB which derives the operating voltage of the electronic elements the arrangement represents. The charging voltage of the capacitor 172 is thereby determined Manner, as will be explained later. The control circuit 168 also generates at the output P at the beginning of the first supplied signal a pulse that different Resets elements of the illustrated arrangement to an initial position, as well will be explained later.

The unit 102 also generates with each flank or

each leading edge of the fed through the terminals 101 and 103 AC pulses a brief signal on line 109 as well as one on it the following clock signal on line 107, which is sent via switch 104 to the counting clock input a counter 106 is supplied.

The functions triggered by this are shown on the basis of the timing diagrams explained in FIG. 8.

In Fig. 8 in line a is the incoming via the connections 101 and 103 AC signal plotted.

At first, a somewhat longer signal is sent via the connections 101 and 103 transmitted, the duration of which does not have to be precisely defined, but merely sufficient must in order to charge the capacitor 172 to a predetermined minimum voltage. These The charging voltage of the capacitor is shown in line d, and it is sufficient in order to supply the required operating voltage for the electronic elements, but not in order to ignite the ignition element ZE when the ignition switch SZ is closed were.

Next appear a number of symmetrical impulses with each with a pulse duration ta. These are activated via the switch that is initially closed 104 are fed to the counting clock input of counter 106 and switch this on, and although starting from the zero position, to which he is due to the aforementioned initial pulse P is set via the OR gate 148, the line 149 and the input MR of the counter 106 became. As long as the counter 106 was in the zero position, the input MR of a further counter 130 this also held in its zero position.

As soon as the counter 106 leaves its zero position, the counter can 130 the clock pulses supplied by the pulse generator IG via the AND gate 118 will continue to count. The period of these clock pulses is essential smaller than the pulse duration ta of the alternating current pulses supplied via the connections 101 and 103. The AND element 118 is activated by a corresponding output signal from the flip-flop 116 released by the initial pulse P via the OR gate 114 in this position was set. The counter 106 counts the further incoming alternating current pulses, and accordingly the counter 130 counts the clock pulses of the pulse generator IG, see above that both counters increase, albeit to a different extent, how this in lines b for the counter 106 and in line c of FIG. 8 for the counter 130 is indicated. For the sake of simplicity, the counters are continuous shown increasing, although it is actually a gradual increase the counter.

As soon as the counter 106 has reached the position NR, the Line 117 emits a signal which is fed to AND gates 122 and 142. The AND gate 122 is enabled via the line 165, which is from the flip-flop 164 comes, which was set by the initial pulse P in the appropriate position. In order to the signal reaches the pulse shaper from the line 117 via the OR gate 124 126, which generates a short pulse that is fed to the input CMP of the counter 130 and its content is inverted, i.e. into an equally large negative counter reading converts. This can be seen in FIG. 8 in line c.

The other input of the AND gate 142 is from the output of a Decoder 132 fed, which is connected to the outputs 131 of the counter 130 and emits a signal as long as the counter is below a certain value which is designated here by ZEU.

This takes into account, among other things, that the generated by the blasting machine Impulse interference pulses can be superimposed on the counter 106 faster than intended have continued counting or, more likely, when the Explosive charges with the detonators before connecting to the blasting machine interfering signals can be included, which set the arrangement in an undefined state to have.

So if when the counter 106 reaches the counter position NR the counter 130 has not yet reached the lower counter position ZEU, generates this AND gate 142 at the output a signal which is transmitted via the OR gate 144 to one input an AND gate 146 is supplied, the other input of which is connected to the line 165 is connected, which the AND gate 146 releases. This becomes the appropriate The input of the OR gate 148 is supplied with a signal which is transmitted via the line 149 and the input MR of the counter 106 resets this to the zero position and for the prepared for the next unlocking process, which will be repeated at least once. The counter 130 is also set to zero as a result.

When the counter 130 reaches the position NR by the counter 106 has exceeded the counter position ZEU, but also the position ZEO has exceeded, this is also sent to the output 131 of the counter 130 connected decoder 134 detected, which then emits an output signal, via the OR gate 144, the AND gate 146, etc., the counter 106 to the initial position resets. This resetting takes place immediately when it is reached the counter position ZEO by the counter 130, even if this is done before the counter position is reached NR takes place by counter 106. This takes into account, for example, that some generated by the blasting machine, for example, through bad contacts or short circuits AC pulses did not arrive correctly on lines 101 and 103.

When defining the two counter positions ZEV and ZEO, it is assumed that that the clock frequency of the pulse generator IG lies between specified limits, what is measured in the manufacture of the assembly prior to assembling the detonator.

When the pulses from the blasting machine to the counter position NR of the Counter 106 have been correctly received, this number also being in the blasting machine is set, pulses are then sent from it double Transmit pulse duration. During this time, the counter 130 now counts from the negative Counter setting, which, as mentioned, was generated by inversion, in forward direction Further. The inversion measure was chosen here for technical reasons, instead, the counting direction of counter 130 could have been reversed.

As soon as the counter 106 has reached the counter position NE, due to the doubling of the pulse duration is equal to 1.5 times the counter position NR, the counter 130 must ideally have reached the zero position again. Since the counting bars of the two counters 106 and 130 are, however, asynchronous to one another and also small Frequency fluctuations occur, it is assumed that the arrangement is that of the blasting machine generated pulses has processed properly when the counter 130 has reached the counter position NE by the counter 106 by no more than k positions from the Zero setting deviates, i.e. either at least the counter setting -k or none higher than the counter position k has reached. This is checked in the decoder 140, which is also connected to the output 131 of the counter 130. So if the Deviation of the counter position of the counter 130 from the zero position is less than k Positions, the decoder 140 generates a signal at the output 141, which together with the signal on the line 121 at the counter position NE of the counter 106 Signal generated at the output of AND gate 162, so that flip-flop 164 toggles and now a signal occurs on line 167 instead of line 165. Furthermore, the output signal of the AND gate 162 switches via the OR gate 152 Flip-flop 154 and sets the counter via the OR-G.Sied 148 etc. ler 106 in the zero position, whereby the counter 130 is also set in the zero position as can be seen from FIG. With the toggling of the flip-flop 164 is the unlocking phase ended, since this flip-flop 164 is no longer reset and the programming phase can begin.

If, however, at the counter position NE of the counter 106, the deviation from the zero position is greater than k positions, the decoder 140 generates am Output 143 a signal that corresponds to the signal on line 121 and the signal on the line 165 of the flip-flop 164, which is now still in the rest position, a signal generated at the output of the AND gate 166, which via the OR gate 148 dnd the line 159 returns the counter 106 and thus also the counter 130 to the zero position puts. The arrangement is now ready for a new series of unlocking pulses to receive, which is generally repeated at least once by the blasting machine will.

After the flip-flop 164 has been switched over, the signal on the line 167 in the control circuit 168 the capacitor 172 to the maximum Voltage charged with the current signal from the blasting machine, as can be seen from line a of FIG. 8, is possible. There is a break for this tp provided. After this pause a new release phase begins, the again the period te claimed. If the flip-flop 164 is switched, then with every edge of the alternating current pulses through the signal generated on the line 109 in the manner described, the counter 106 and also the counter 130 again in the Set to zero, and by the immediately subsequent Pulse on the line 107, the counter 106 is switched to position 1, see above that the counter 130 can count the clock signal of the pulse generator IG, because that Flip-flop 116 is still in the position in which it is the AND gate 118 releases. This periodic resetting to the zero position is shown in FIG. 8 in lines b and c. At the end of the second release phase te occurs the last edge of the alternating current pulses has a longer pause, during which the Counter 130 exceeds the position ZPU, which it could not reach before, because the duration of the impulses during the release phases were too short for this and both counters 106 and 130 have already been reset to the zero position beforehand became. As soon as the position ZPU is reached, the decoder 138 generates the is also connected to the output 131 of the counter 130, an output signal, and since the counter 106 is still in position 1, is on the line 115 a signal is present and also on line 167 from flip-flop 164, so that the AND gate 156 generates an output signal and via the OR gate 158 the flip-flop 154 resets, so that thereafter no reset pulses for the counter 106 can be generated. In this way the unlocking impulses in the processing of the programming pulses for setting the delay time, which have a longer duration are distinguished, as will be explained later.

However, since the break after each unlocking phase is much longer is considered to be the longest occurring programming pulse, the counter eventually reaches 130 the Position of the ZPO. When this position is reached, the decoder gives 136, which is also connected to the output 131 of the counter 130, an output signal from, and since the counter 106 is still in position 1 and the line 115 leads a signal, the AND gate 150 and thus the OR gate 152 generates Output signal, on the one hand via the OR gate 148 and the line 149 the counter 106 and 130 resets and on the other hand the flip-flop 154 switches back again, so that then further reset pulses for zero setting via the AND gate 160 of the counter 106 are generated, whereby the counter 130 also in the manner described is set to zero. This way the pause in the received AC pulses respectively.

more precisely the longer lasting maintenance of an approximately constant The pulse potential is differentiated from the following programming pulses. Be it at this point it should be noted that FIG. 8 is not to scale.

The counter switches with the first programming pulse of duration t 106 to position 1, and the counter 130 begins to count from the zero position.

Because the minimum value of the pulse duration t of the programming pulses is so large is that the counter 130 exceeds the position ZPU as long as the counter 106 is is still in position 1, the flip-flop 154 is switched over so that the AND gate 160 is blocked again and then the following edges of the received AC pulses can no longer generate reset pulses for the counter 106. On the other hand, the counter 130 reaches the position with the following programming pulses ZPO only after the counter 106 has left position 1, so that the AND element 150 blocked by the now missing signal on line 115 and the flip-flop 154 does not switch back.

In this way, the counter 130 counts the pulses from the pulse generator IG continues until the counter 106 has reached the position Nk. This position will predetermined via a multiple input 110 and fed to a decoder 108, the is also connected to the outputs 111 of the counter 106 and if they match of the signal combinations at the two multiple inputs generates an output signal and the AND gate 112, which is enabled via the line 167, so that the flip-flop 116 switches over and the AND gate 118 blocks, whereby the counter 130 no longer receives clock pulses from the clock pulse generator IG.

This leaves the one reached by counter 130 at that moment Position received, which, as already described, is a measure for the programmed Represents delay time.

Irrespective of this, however, further programming impulses arrive, until finally the counter 106 is fully counted and an overflow signal at the output 123 generated. This overflow signal opens the switch 104 so that the counter 106 in this end position remains and cannot return to its zero position, otherwise the counter 130 would also be set to zero, thereby reducing the set delay time would get lost.

Furthermore, the overflow signal on line 123 goes through the OR gate 124 to the pulse shaper 126, which again sends a short pulse to the input CMP of the counter 130 outputs and thus inverts its counter position, as already described in the unlocking phase. Besides, that will Flip-flop 116 switched again via the OR gate 114, so that the AND gate 118 is enabled and the counter 130 again pulses from the clock pulse generator IG receives and from the negative position generated by the inversion against Zero counts.

As soon as the counter 130 reaches the zero position, the previously programmed one is programmed Delay time tv after the last programming pulse counted by counter 106 elapsed so that the ignition must be triggered. This happens because the counter 130 sends a signal from negative values when it reaches its zero position generated and the AND gate 170 supplied, which is via the overflow signal on the line 123 is enabled, so that the output signal of the AND gate 170 the ignition switch SZ can close, whereby the charge stored in capacitor 172 is over the ignition element ZE discharges and causes it to ignite.

With the last programming pulse, with which the counter 106 reaches its end position reached, the supply of signals via lines 101 and 103 is interrupted, be it that the blasting machine switches off the energy supply, be it that the detonator with the shortest delay time by triggering the connection to the blasting machine interrupts. The capacitor 172 therefore receives for the duration of the delay time no more energy, and the voltage in it falls due to the energy consumption the arrangement shown slowly. As for the ignition of the ignition element ZE a minimum voltage on the capacitor 172 is necessary, wakes up the unit 168 this voltage, and if this falls below a predetermined limit, in which a reliable triggering of the ignition element is no longer guaranteed the ignition switch SZ is also actuated and the ignition is triggered, although the specified one Delay time may not have expired. If not done it could happen that the operating voltage UB for the operation of the electronic Arrangement is still sufficient and the AND gate 170 finally via its output signal the ignition switch SZ closes, but that in the capacitor at this moment 172 stored energy is no longer sufficient to trigger the ignition element, so that a charge that has not yet been ignited remains in the pile after a detonation would, which must be avoided at all costs. This last described However, the case can only occur in the event of an error, especially one that is too small Capacity of the capacitor 172 due to impermissibly large tolerances.

Through the arrangement described with the programming of the delay time upstream release phase is achieved that the setting of the delay time and triggering of the ignition only by the pulses provided for this purpose from the ignition machine takes place so that the greatest possible security is guaranteed.

The circuit arrangement described in FIG. 7 can also be used in general Use it appropriately, for example when using signals from a transmitter be transmitted to a receiver over a possibly disturbed route, an arrangement is to be triggered in the receiver, which is by no means due to interfering signals triggered may be. The trigger signal is then immediately after the or the last Transferring the unlocking phase and only evaluated when the flip-flop 164 is switched.

Claims (23)

PATENT CLAIMS 0 Procedure for staggered release of electronic Detonator with individual delay times (AT) compared to a command signal from a blasting machine that works with the detonators in a row and / or Parallel circuit is connected to at least one ignition circuit, in which in one Charging phase determined by time signals from the blasting machine for setting the individual delay time C T) in each of these detonators a first signal flow (FAT) fed from a source to an integrator and in a subsequent delay phase, in all detonators starting at the same time with the command signal, one to the first Signal flow (FAT) related second signal flow (FT) see above is fed to the integrator for a long time until the integral stored in the integrator of the first signal flow is reached or this is reduced to zero, whereupon the Ignition is triggered, characterized in that the supply of the first signal flows to the integrators of all detonators begins at the same time and for each detonator the individual Delay time (AT) only due to the end of the feeding, which is dependent on the time signals of the first signal flows or by the ratio of the two signal flows to one another is determined. 2. The method according to claim 1, characterized in that the blasting machine a sequence of n pulses is generated and the individual delay time in each detonator (AT) is formed by counting a corresponding number m of these pulses. 3. The method according to claim 2, characterized in that the blasting machine an uneven pulse train generated. 4. The method according to claim 2, characterized in that the blasting machine a regular pulse sequence is generated. 5. The method according to any one of claims 1 to 4, characterized in that that the signal flows are pulse frequencies and the pulse frequency of the first signal flow (FAT) and the second signal flow (FT) in a fixed division ratio to each other that is less than one and determines the individual delay time. 6. The method according to any one of claims 1 to 4, characterized in that that constant currents are used as signal flows. 7. The method according to any one of claims 2 to 4, characterized in that that the first signal flow is equal to the second signal flow and that the supply the first signal flows to the integrators of all detonators via one through the time signals the blasting machine is maintained for a specific time. 8. The method according to claim 1 or one of the following, characterized in, that before the time signal from the blasting machine a first predetermined number of release pulses transmitted in a first time sequence and one of the signal flows during its duration is integrated and then a second predetermined number from the first different number of start impulses in a time sequence deviating from the first, however, the same duration time sequence is transmitted and during that duration also this signal flow is integrated, and that only then triggered the ignition becomes when the deviation of the integral formed during the first time sequence of the integral formed during the second time sequence upon receipt of a predetermined total number of pulses is below a predetermined limit. 9. The method according to claim 8, characterized in that the first Time sequence a predetermined first constant frequency and the second time sequence a predetermined second constant frequency. 10. The method according to claim 8 or 9, characterized in that repeats the succession of the first and second time series at least once and the output pulse is only released if at least at the end a second time sequence shows the deviation of the two integrals below the predetermined one Limit lies, and that with a larger deviation the integrals to an initial value reset. 11. The method according to any one of claims 8 to 10, characterized in, that the shortest duration of at least the first time signal supplied by the ignition machine is greater than the longest duration of the release pulses by a predetermined factor and that from the first to the end of the second time sequence or the predetermined number pulse received from second time sequences, at the end of which the integral of the signal flux has exceeded a predetermined second limit set by the blasting machine received signals are evaluated as time signals. 12. The method according to claim 10 or 11, characterized in that the integral reached at the end of the first time sequence with specified limit values is compared and when these limit values are exceeded, the integral to the initial value is reset. 13. The method according to claim 1 or one of the following, characterized in that that the value of the reached at the end of the edition phase or at the end of each first time sequence Integrals are set to the opposite value and then in the same direction as is integrated before. 14. The method according to claim 8 or one of the following, wherein the Detonator has an energy storage device, which is supplied with energy from the outside and which feeds the elements of the electronic detonator and the energy supplies for igniting the ignition element, characterized in that the energy supply to energy storage to a value between that for dining the electronic elements and the ignition element to ignite is limited to at the end of or a predetermined number of second time sequences the difference between the two Integral is below the specified limit and the energy storage is the maximum Energy is supplied. 15. Electronic time detonator for connection to at least one a time signal (T) delivering blasting machine (ZM), with a signal source (IG, FT; KSQ1, KSQ2), which a first signal flow in a charging phase determined by the time signal for charging an integrator (Z, ZT), and with a control device (S1, S2), which, after the charging phase has elapsed, initiates a delay phase in which the signal source a second signal flow for discharging or recharging the integrator supplies, whereby an ignition signal is generated when the content of the integrator is on a predetermined value has been reduced or when the integrator is recharged the stored integration value of the charging phase has been reached, characterized in that that the signal source (IG, FT; KSQ1, KSQ2) can be reversed in such a way that it both Signal flows with different values according to a given ratio generated to one another. 16. Electronic time detonator according to claim 15, characterized in that that the signal source (IG, FT) contains a pulse generator (IG) to which a frequency divider (FT) is connected downstream and that the first signal flow through the frequency divider (FT) and the second signal flow directly from the pulse generator (IG) to the counter trained integrator (Z) is running. 17. Electronic detonator according to claim 16, characterized in that that the signal source has two constant current sources (KSQ1, KSQ2) with different Contains current values and that the integrator contains a charging capacitor (ZT). 18. Electronic time detonator for connection to at least one a time signal (T) delivering blasting machine (ZM), with a signal source (IG, FT; KSQ1, KSQ2), which a first signal flow in a charging phase determined by the time signal for charging an integrator (Z, ZT), and with a control device (S1, S2), which, after the charging phase has elapsed, initiates a delay phase in which the signal source a second signal flow for discharging or recharging the integrator supplies, whereby an ignition signal is generated when the content of the integrator is on a predetermined value has been reduced or when the integrator is recharged the stored integration value of the charging phase has been reached, characterized in that that the control device (S1, S2) of each detonator generates the first signal flow the first pulse of the time signal supplied as a pulse sequence initiates and up to a detonator-specific set m-th pulse and the second Signal flow begins at the nth pulse of the time signal, where m <n. 19. Electronic time detonator according to claim 18, characterized in that that the first and second signal flows are the same. 20. Electronic time detonator according to claim 15 or one of the following, in which the control device (S1, S2) contains a counter (106), thereby characterized in that a memory element (164) is provided and that a predetermined one Counter position (NE) of the counter (106) corresponding to the sum of the numbers of in a first and a subsequent second time sequence transmitted by the blasting machine Pulses the first memory element toggles if one occurs during the first time sequence in the integrator (Z, ZT) formed integral of a follow during the second time formed integral deviates by less than a given value, and that the The memory element (164) only releases the triggering of the ignition in the switched-over state. 21. Electronic time detonator according to claim 20, characterized in that that a monitoring circuit (132,134,136,138,140) is provided that the integrator (Z, ZT, 130) and resets the counter (106) to their initial position if the Integral at the end of the first time sequence outside the specified first limits (ZEU, ZEO) lies. 22. Electronic detonator according to claim 21, characterized in that that the monitoring circuit (132,134,136,138,140) the integrator (Z, ZT, 130) and also resets the counter (106) to the initial position if after switching of the storage element the integral at the end of a time signal outside of the specified second limits (ZPO, ZPU). 23. Electronic detonator according to claim 20 or one of the following, in which an externally fed energy store for the operation of the electronic elements and the ignition element is present, characterized in that that only the switched storage element (164) starts charging the energy store (172) releases to a value sufficient for the ignition of the ignition element (ZE).