DE3405823C1 - Method and circuit for removing distance lobes in a Doppler radar with pulse compression - Google Patents

Description

For the detection and location of ground vehicles using Radar it is necessary with short, at intervals other operating hours to work on an attacked by means of projectiles sensitive to radiation and to complicate other enemy countermeasures. The Echoes of the vehicles must therefore be fixed very quickly represents and locates what works automatically Requires facilities that prevent the Ra observer overfeed to a certain extent with false alarms is caused by interfering bodies as well as active or passive Interference signals are caused. This indispensable the false alarm frequency must be checked automatically special kind of goals and characteristics of ver take into account different interference signals.

A false alarm is triggered in that in an up solution cell of the radar there is an interference signal, that exceeds the detection threshold. This sturgeon signal can either be from one to an external source false echo to be returned or from a so-called Distance side lobe based on pulse compression is due and is due to the presence of a strong useful signal in a resolution cell, which is close to the resolution cell under consideration.

The use of the pulse compression method leads to the fact that after reception and correlation bumps occur, d. H. Interference signals of the same spectral distribution like the main lobe or main peak, i.e. the useful signal, but with a lower amp lituden. The distance distribution and the amp  litude of these side lobes depends on the Co used dation and of the receiving circuits, namely the Correlator and the evaluation circuit for the subsidiary cull. In the case of a so-called 13 bit bar code in Ver each with a rating of the side lobes Signal, whose main peak after detection and correction relation the normal noise level of the radar by 30 dB progresses to a significant probability of Detection of side lobes.

To avoid these disadvantages, be known Certain measures have already been proposed. So is from the GB-PS 1 605 130 and US-PS 4 353 067 already for with Pulse compression working radar devices known alternating with two complementary codes with opposite set side lobes to send out coded signals and one channel for each of the two codes when received to be used, the compensation of the side lobes by combining the outputs of the two channels. However, such a procedure is considerably complex and associated with considerable costs.

It is also the case with a person working with pulse compression Radar device that encodes a code transmits t signal, already known (US Pat. No. 4,095,225), when receiving after correlating the received signal with a numeric filter with inverse to the code sent filter compared to the filter that the by encoded signal sent in a single pulse would. However, this inverse filter is only for one given given code, also of proportionate complex structure and must be in the reception channel of Ra be used.

The invention is based on the object to avoid to develop a simplified procedure for these deficiencies, which is the probability of detecting side lobes  reduce and thus reduce the frequency of false alarms, as well to create a circuit performing this method, the radar device working with pulse compression without changing its existing circuits and independently is suitable from the coding used.

In procedural terms, this task is performed by the patent Claim 1 specified features solved.

In terms of circuitry, this is the task in the patent claim 5 specified features solved.

The further sub-claims relate to advantageous Aus designs of the method or the circuit.

The invention is explained below with reference to the drawing tert. Show it:

Fig. 1 is a block diagram of a Radarsignalverarbei processing channel includes a circuit for suppressing distance side lobes,

Fig. 2 is a timing diagram illustrating the principle of the suppression of the side lobes and

Fig. 3 is a block diagram of the circuit for suppressing the side lobes.

In Fig. 1, the usual signal processing channel of a Doppler radar is presented with pulse compression. It consists of a correlator COR, a Doppler filter FD, a detector integrator INT and a circuit S with a threshold value k₀. This signal processing channel supplies the threshold circuit S with signals which can be influenced in each of the distance gates by main peaks of large amplitude which are located in adjacent distance gates. According to the invention, a circuit EL for removing these side lobes is now inserted in the signal processing path, namely after the detector integrator INT and either instead of or for supplementary use with the threshold circuit S. The radar signal processing channel receives the components from a buffer MT at time t _ÿ a _ÿ and b _{ÿ of} the sample value of the signal vector which was received in the distance gate with the index j in the course of the i-th repetition period. The received signal vectors are sampled and coded by sampling and coding circuits COD 1 and COD 2 , which are located in the in-phase channel and in the quadrature channel, that is to say the channel in which the signals which are phase-shifted by 90 ° are processed. The coding circuits receive the components a _i (t) and b _i (t) of the analog signal received in the course of the ith repetition period from mixers MEL 1 and MEL 2

Each signal, its main peak according to correlation and Integration of the normal radar noise level by 30 dB exceeds that in the neighboring Distance gates with a high probability his own side lobes are detected. Around Reduce the probability of detection and to reduce the frequency of false alarms accordingly, the procedure is as follows:

• - At the output of the integrator, the benefits are first target corresponding main peaks detected, their Level is above a threshold k₁ = αk₀, where k₀ that corresponds to the normal noise of the radar Is threshold;
• - Previously, k₁ was determined using the following relationship: If a main peak of the amplitude A _k for the threshold _k 1 has now been found in the distance gate with the index k
• - Their contribution S _jk to the detection threshold in the P surrounding these main gates is Festge, namely in the P / 2 gates before and in the P / 2 gates after, the number P being chosen depending on the compression ratio of the radar. This contribution S _jk in the distance gate with the index d is obtained on the basis of the following expression: S _jk = A _k -x dBmit
• The estimated value of the total level or total level ST _{j of} the side lobes in the distance gate with the index j is then determined for the N range gates of the repetition period under consideration. This threshold value ST _j depends on the contributions S _{jk of} the main _peaks which are located in less than P / 2 gates around the gate j under consideration. The relationship to gaining the sum of these contributions can be written as follows: where N is the total number of goals and 1n2. The quadratic relationship (n = 2) is chosen if it can be assumed that the detected main peaks A _{k of} large amplitude are independent of one another and that consequently the relative phase position of any two of these main peaks associated side lobes is random;
• - In each range gate, the estimated level ST _{j of} the side lobes in the range gate is subtracted with the index j from the amplitude A _{j of} the signal in this range gate. An amplitude  _{j is obtained} after suppression of the side lobes in the form:  _j = A _j -ST _j ;
• - The new value _{j j of} the main peak is compared with the threshold k₀ which can be entered manually and the echo is detected on the basis of the value  _{j of} the main peak, which is free from the effects of the side lobes attributable to main peaks in neighboring gates.

The damping value x is variable and depends on that selected compression ratio. For example in In case of a bar code with 13 moments or steps with Evaluation can be chosen x = 24 dB.

However, if for every distance goal the contribution of all neighboring goals that are at most P / 2 goals before or after is to be determined, this leads to PN determinations, which requires considerable effort. The presently proposed solution to this problem can be explained on the basis of the time diagram shown in FIG. 2. This solution allows the PN determinations to be replaced by 2N determinations + N additions. In this way, one obtains a reduction in the space required for the circuits and a simplification of the circuits themselves. The solution is based on the decomposition of the expression ST _j ⁿ , which describes the composition of the coefficients S _jk ⁿ , into two summations, namely on the one hand via the values of k smaller than j and on the other hand via the values of k greater than j, thus:

ie ST _j ⁿ = (ST _j ) ₁ ⁿ + (SZ _j ) ₂ ⁿ .

In the course of the considered repetition period that from the detector integrator INT at any distance gate fed signals in a buffer memory saves, so that they later on two different time can be processed.

In the timing diagram a of FIG. 2, the main peaks of the amplitude A _k are shown, which were detected for the threshold value _k 1 at the output of the buffer of the detector integrator and appear over the course of a repetition period, which is divided here into N distance gates. For the first detected peak, which corresponds to the smallest distance, its contributions S _{jk are shown} in the P / 2 gates, which lie on both sides of this peak, i.e. the gate in the index j = kP / 2 up to the gate the index j = k + P / 2. These contributions correspond to an assumed "right-angled" modeling of the distance side lobes, which are all assumed to be x dB below the amplitude A _{k of} the detected main lobe.

In the time diagram b of FIG. 2, the N first determinations are shown, which were determined by reading the buffer of the integrator in the direction of increasing ordinal numbers of the distance gates. As soon as a detection of a main peak of large amplitude A _{k has} taken place for the threshold value k₁ = αk₀, a buffer for the P / 2 following distance gates j = k + 1 to j = k + P / 2 receives the damped value S _jk ⁿ = (A _k -x) ⁿ in dB. In this way, the contributions of the main lobes to the content of the removal gates with the higher indices are determined. If the contributions of several main lobes overlap, the following relationship is summed up:

In the time diagram c of FIG. 2, the following N determinations are shown, which were obtained by reading the buffer of the integrator in the direction of falling ordinal numbers of the distance gates. As soon as a main peak of high amplitude A _{k has been} detected for the threshold value k 1 = α _k der, the buffer memory for the following P / 2 distance gates j = k-1 to j = kP / 2 (descending) receives the damped value S _jk ⁿ = (A _k -x) ⁿ in dB. In this way the contributions of the main peaks with the index k to the content of the distance gates with the lower indices are determined. If the contributions of several main peaks overlap, the summation follows according to the following relationship:

In the time diagram d of FIG. 2 are for the special case, where n = 2 represents the contributions of the main peaks, which were detected for each of the N range gates for the threshold k₁ = αk₀. These contributions are obtained by adding the squares of contributions (ST _j ) ₁, which are obtained in increasing direction of the ordinal numbers or indices of the distance gates, and adding the squares of contributions (ST _j ) ₂, gate by gate which are obtained in the descending direction. The addition takes place according to the general relationship:

ST _j ⁿ = (ST _j ) ₁ ⁿ + (ST _j ) ₂ ⁿ with n = 2.

The removal or suppression of the distance secondary cull according to the present proposal is done by the circuit EL shown in FIG. 1, which will now be described in more detail with reference to FIG. 3. This circuit is used instead of a classic threshold circuit or as an alternative to this. However, it is necessary to use an MTI buffer memory at the output of the detector integrator. During the repetition period with the index i, this memory is used to store the information supplied by the detector integrator INT. During the following repetition period with the index i + 1, this memory must be able to be read out in the ascending direction, then in the descending direction of the distance gates, but still be able to store the information supplied by the detector integrator. The principle of such a memory, which actually consists of two memories, is known. If both the threshold circuit S and the suppressor circuit EL are used, a logic circuit L is also required in order to be able to combine the information provided.

In the course of reading the buffer memory MTI in the increasing direction, each word corresponding to a distance gate is read a first comparator CO with a threshold value kwert, a second comparator C1 with a threshold value k₁ = αk₀, a third comparator C2 with a threshold value kwert, the Is part of a compensation channel and supplied via an attenuator A to the first input of a blocking circuit AI. This blocking circuit AI is controlled by the second comparator C1 and provides at its output the attenuated value (A _k -x) in dB of the amplitude A _k of the main peak detected by the second comparator when the amplitude A _{k of} this peak exceeds the threshold value k₁ = αk₀ of this comparator. On the other hand, the blocking circuit provides at its output the value 0 present at its second input if the considered word received from the buffer memory MTI (corresponding to a distance cell) is smaller than the threshold value k₁ = αk₀.

The compensation channel comprises, in addition to the second comparator C1, the attenuator A and the blocking circuit AI, a potentiator ML for raising the attenuated amplitude (A _k -x) expressed in dB into the nth power. This potentiator can consist, for example, of a read-only memory. Each time a peak of large amplitude is detected, it supplies a damped amplitude S _j ⁿ = (A _k -x) ⁿ raised to the nth power to a delay memory MR and to the input "+" of a first summing element Σ1 . This first summing element is followed by an accumulator ACC, whose output is connected to a second input "+" of this first summing element Σ1. The delay memory MR introduces a delay by P / 2 distance gates. Immediately after receiving a damped Amp litude (A _k -x) ⁿ from the first summing element, the output of the accumulator is supplied to the first partial level (ST _j ) ₁ ⁿ and is charged to this value and leads it back to the summing element for each distance gate thus the output signal of this summing element is constant. If no new main peak of large amplitude is detected at the P / 2 following distance gates, the output signal of the accumulator remains constant until the delay memory has its value S _k = (A _k -x) ⁿ at the input "-" of the summing element Σ1 there and thus brings the output signals of the first summing member and the accumulator back to 0. If, on the other hand, a new peak of large amplitude A _{k is} detected during the two P / 2 following distance gates, the first input "+" of the summing element Σ1 immediately receives the value S _k ′ = (A _k ′ -x) from the potentiating element ML ⁿ while the second input "+" from the battery mulator receives the value S _k = (A _k -x) ⁿ and the output of the first summing element and that of the battery have a new value (ST _j ) ₁ ⁿ = (A _k -x ) ⁿ + (A _k ′ -x) ^{n of} the partial level of the side lobes corresponding to the sum of the nth powers of the two contributions. As before, each of these two values P / 2 gates is taken out of the sum after their respective occurrence as soon as these values appear at the output of the delay memory MR. Each of the values (ST _j ) ₁ ⁿ , which are supplied by the accumulator mulator in the course of this readout of the buffer memory MTI in the increasing direction of the distance gates, is stored in a buffer MI in order to store in the course of the second readout of the buffer memory MTI, that takes place in the falling direction of the distance gates can be used. In the course of this second readout, the second partial contributions or partial levels (ST _j ) ₂ ^{n of} the side lobes are obtained according to the contributions of the tips in the goals with the lower ordinal numbers or indices according to the same principle as the first levels (ST _j ) ₁ ⁿ corresponding to the contributions of the peaks in the goals with the higher indices. In the same cycle as they are won, the contributions are added expression by expression by the computer CA to the first contributions (ST _j ) ₁ ⁿ , which are stored in the buffer MI. On the output side, this computer contains a circuit, for example a read-only memory, which allows the computer to output the square root or, generally speaking, the nth root of the square of the overall level of the side lobes ST _j ² = (ST _j ) ₁² + (ST _j ) To deliver ₂² or its nth power.

The second summing element 2 receives from the buffer memory MTI the signal amplitudes A _j that were received in the j = 1 to N distance gates. The second summing element 2 delivers at the output the difference  _j = A _j -ST _j corresponding to the actual amplitude of the signal in the distance gate with the index j, i.e. free from the contributions of the main peaks of large amplitude or in other words exempt from the overall level ST _{j of} the side lobes. This actual amplitude of the signal  _j is compared in the comparator C2 of this compensation channel with the manually entered or set threshold value k₀.

In the course of the considered repetition period with the index i, the writing into the buffer memory MTI takes place. The reading of the buffer MTI in increasing the direction of the distance gates, which allows the determination of the contributions (ST _j ) ₁ ^{n of} the large amplitude peaks in the distance gates with the higher indices, can be done completely in the course of the first half of the fol lowing repetition period. The reading of this buffer memory in the falling direction of the distance gates, which determines the second contributions (ST _j ) ₂ ⁿ the total level of the side lobes

and the signal amplitudes  _j freed from the contributions of the main peaks of large amplitude can occur entirely in the course of the second half of the following repetition period. The logic circuit L thus works in the course of this second half of the repetition period on the basis of the threshold value exceeding decisions D _0j , D _1j and D _2j , which are provided by the three comparators C0 or C1 and C2. This logic circuit L provides a binary variable D at the output in such a way that D _j = D _1j + D _0j D _2j , which corresponds to the _final decision.

Claims (8)

1. A method for the suppression of distance secondary lobes in a Doppler radar with pulse compression, in which the transmission signal is modulated with a specific code when transmitting and a correlation is carried out between the received signal and the transmission code on receipt and Doppler filtering and demodulation are carried out, characterized in that upon reception for each of the N range gates of a given repetition period

• the total level ST _{j of} the side lobes in the distance gate with the index j is estimated on the basis of the amplitude of the main peaks found in the adjacent distance gates,
• - This overall level ST _{j is} then subtracted from the signal amplitude A _j measured in the distance gate, and from this a true signal amplitude _j = A _j -ST _j unaffected by the major peaks A _{k of} large amplitude is obtained and
• - This true signal amplitude  _{j is} compared with the given threshold k Schwellen of the radar by hand and it is determined whether there is a target in this range or not.

2. The method according to claim 1, characterized in that the estimated total level ST _{j of} the side lobes in the distance gate with the index j based on the contributions S _{jk of} the main _peaks of large amplitude A _k , which are detected in the distance gates with the index k, can be calculated according to the following general relationship: the contributions of the main peaks of large amplitude are limited to those main peaks which are located in the P distance gates surrounding the distance gate under consideration, etc. in the P / 2 before and in the P / 2 after it (P even numbered). 3. The method according to claim 2, characterized in that the estimated total level ST _{j of} the side lobes in the range gate with the index j is broken down into a first contribution (ST _j ) ₁ ^{n of} the main peaks of large amplitude A _k , which in the P / 2 Gates with indices greater than j are determined and in a second contribution (ST _j ) ₂ ⁿ the main peaks of large amplitude A _k , which are determined in the P / 2 gates with indices less than j, and the equation is as follows: thus ST _j ⁿ = (ST _j ) ₁ ⁿ + (ST _j ) ₂ ⁿ . 4. The method according to any one of claims 1 to 3, characterized in that the main peaks of large amplitude A _k are detected in such a way that the main peaks are first detected at the output of the integrator (INT), which correspond to useful signals whose level is greater than a Threshold value k₁ = αk₀, this threshold value k₁ being chosen such that where x in decibels is the ratio of the level of the side lobes to the level of the main peak, and that after detection of a main peak of high amplitude A _k, its contribution S _jk = A _k -x dB to the level of the side lobes in the range gate with the index j is determined becomes. 5. Circuit for performing the method according to one of claims 1 to 4, characterized in that it contains on the input side a buffer memory (MTI) which is connected downstream of the integrator (INT) of the signal processing channel and at the same time the writing of the repetition period with the index i related contents A _{j of} the range gates and reading the contents of the same range gates relating to the previous repetition period with the index i-1, and that a circuit (C1, arithmetic channel A to CA) is provided which allows starting of the signals A _j read from the buffer memory to determine the estimated total level of the side lobes ST _j in the distance gate with the index j, and that a summing element (Σ2) successively from the buffer memory (MTI) signals A _j and from a circuit for determining the level of the side lobes this level ST _j receives and a comparison he (C2) with a threshold value k₀ delivers the actual signal amplitudes  _j = A _j -ST _j , and that this comparator sends to a logic circuit (L) a decision D _2j about the presence or absence of a target in the distance gate with the index j. 6. Circuit according to claim 5, characterized in that in the course of a repetition period with the index i of the buffer memory (MTI) is read out twice, namely a first time in the direction of increasing ordinal numbers of the distance gates during the first half of the repetition period to determine the first Contributions (ST _j ) ₁ ^{n of} the main peaks of large amplitude to the contents of the distance gates with the higher indices and a second time in the direction of falling ordinal numbers of the distance gates during the second half of the repetition period for determining the contributions (ST _j ) ₂ ^{n of} the main peaks of large amplitude to the contents of the removal gates with the low ordinal numbers, the estimated total level of the side lobes and the true signal amplitude  _j = A _j -ST _j . 7. Circuit according to claim 5 or 6, characterized in that the circuit for determining the overall level ST _{j of} the side lobes in the distance gate with the index j on the input side an attenuator (A) and one of the most comparators (C1) with a threshold value k₁ = αk₀ contains, both of the buffer memory (MTI) the next in the direction of increasing ordinal numbers and then in the direction of declining ordinal numbers read in content A _{j of} the distance _gates that the output signal (D _1j ) of the first comparator (C1) _receives a blocking circuit (AI) controls which at its first input holds the values A _j read from the buffer memory (MTI) and receives the value 0 at its second input and depending on whether the level of the peak is below or above the threshold value k 1, either the value 0 dB or the value (A _k -x) dB corresponding to the attenuated detected level A _k to a potentiator (ML) for elevation to the nth power, which supplies its A output signal outputs to the first input "+" of a further summing element (Σ1) and to a delay memory (MR) which carries out a delay corresponding to the reading of the P / 2 successive distance gates and after the P / 2 distance gates the value 0 or (A _k -x) ⁿ at its input, to an input "-" of the summing element (Σ1), which is followed by an accumulator (ACC), which in turn outputs its output signal to a second input "+" of the summing element (Σ1) feeds and which is also connected to a buffer (MI) which stores the first contributions (ST _j ) ₁ ⁿ during the first half of the repetition period and, after a delay time corresponding to this first half of the repetition period, the first contributions (ST _j ) ₁ ⁿ feeds into a computer (CA), which receives the second contributions (ST _j ) n₂ at a further input, which are also supplied by the accumulator (ACC) and during the second half of the wied recovery period in the same way as the first contributions were determined, and that the computer (CA) provides at its output the total level ST _{j of} the side lobes in the range gate with the index j. 8. Circuit according to one of claims 5 to 7, characterized in that it further contains a comparator (CO) with a threshold value k₀, which receives the values A _j read from the buffer memory (MTI), and a logic circuit (L) , which in the course of the second half of the repetition _period receives the decision D _0j made by the comparator (CO) with the threshold value _{k,, which} receives the decision _D₁j made by the first comparator (C1) with the threshold value k₁ and which receives the decision from the second comparator ( C2) receives decision D _{2j made} with the threshold value k and delivers the final decision D _j = D _1j + D _0j D _2j belonging to the distance _gate with index j as the output signal for each of the ordinal numbers falling in the direction.