DE3316184C2 - Arrangement to improve the electromagnetic compatibility of low-frequency amplifiers - Google Patents

Arrangement to improve the electromagnetic compatibility of low-frequency amplifiers

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Publication number
DE3316184C2
DE3316184C2 DE3316184A DE3316184A DE3316184C2 DE 3316184 C2 DE3316184 C2 DE 3316184C2 DE 3316184 A DE3316184 A DE 3316184A DE 3316184 A DE3316184 A DE 3316184A DE 3316184 C2 DE3316184 C2 DE 3316184C2
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Germany
Prior art keywords
capacitor
arrangement
low
electromagnetic compatibility
conductor
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE3316184A
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German (de)
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DE3316184A1 (en
Inventor
Gerhard Dipl.-Ing. 8440 Straubing Hecht
Hartmut Dipl.-Ing. 6106 Erzhausen Maier
Erhard Dipl.-Ing. 6370 Oberursel Reitz
Gerhard Dipl.-Ing. 6000 Frankfurt Ruff
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telenorma GmbH
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Telefonbau und Normalzeit GmbH
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Application filed by Telefonbau und Normalzeit GmbH filed Critical Telefonbau und Normalzeit GmbH
Priority to DE3316184A priority Critical patent/DE3316184C2/en
Publication of DE3316184A1 publication Critical patent/DE3316184A1/en
Application granted granted Critical
Publication of DE3316184C2 publication Critical patent/DE3316184C2/en
Expired legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49589—Capacitor integral with or on the leadframe
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/181—Low-frequency amplifiers, e.g. audio preamplifiers
    • H03F3/183—Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Multimedia (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Amplifiers (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

Bei der Anordnung zur Verbesserung der elektromagnetischen Verträglichkeit bei Niederfrequenz-Verstärkern handelt es sich darum, daß ein Kondensator in Chip-Ausführung ohne Anschlußdrähte sehr nahe bei den Elektroden des Eingangstransistors, bzw. an den entsprechenden Anschlüssen des Gehäuses einer integrierten Schaltung angeschlossen wird. Es ist zweckmäßig, daß der Chip-Kondensator innerhalb des Gehäuses einer integrierten Schaltung direkt mit zwei Anschlüssen einer für die Leiterzuführung zum Halbleiter-Chip vorhandenen sogenannten Leiterspinne elektrisch leitend verbunden wird.The arrangement for improving the electromagnetic compatibility of low-frequency amplifiers is that a capacitor in chip design without connecting wires is connected very close to the electrodes of the input transistor or to the corresponding connections of the housing of an integrated circuit. It is expedient that the chip capacitor inside the housing of an integrated circuit is connected in an electrically conductive manner directly to two connections of what is known as a conductor spider, which is provided for the conductor feed to the semiconductor chip.

Description

Die Erfindung betrifft eine Anordnung zur Verbesserung der elektromagnetischen Verträglichkeit bei Nie-ιι6ιιΓ€€[ίΐ€ΠΖ- TciaiariCcr The invention relates to an arrangement for improving the electromagnetic compatibility in the case of Nie- ιι6ιιΓ €€ [ίΐ € ΠΖ- TciaiariCcr

öuci cül rtGöuci cül rtG

den Eingangstransistor angeschaltet ist, daß hochfrequente Störungen abgeleitet werden und das Nutzsignal nicht beeinflussen können.the input transistor is turned on, that high frequency Interference can be derived and not affect the useful signal.

Niederfrequenz-Verstärker werden u.a. bei Fernsprechapparaten eingesetzt, wenn die Empfindlichkeit des Microfons nicht ausreicht, oder um einen Freisprechbetrieb zu ermöglichen. Eine derartige Schaltungsanordnung für einen Verstärker für einen elektroakustischen Wandler, der in einen Fernsprechapparat einsetzbar ist, w' -d dargestellt und beschrieben in der DE-AS 28 12 735. Im Prinzip besteht ein solcher Verstärker aus einei Transistorschaltung, an deren Eingang das Microfon angeschlossen ist, and fassen Ausgang auf die Teilnehmeranschlußleitung wirst. Das Microfon kann dabei als Generator mit einem Innenwiderstand aufgefaßt werden, der Nutzsignale, also Sprechspannungen abgibt. Der Eingang eines solchen Niederfrequenz-Verstärkers ist grundsätzlich in der Lage, neben den Nutzsignalen auch Störungen aufzunehmen. Im Ersatzschaltbild wie es in der F i g. 1 der vorliegenden Patentanmeldung dargestellt ist, wird gezeigt, daß ein hochfrequenter Störgenerator SC in Reihe geschaltet mit dem Nutzsignal-Generator G vorstellbar ist. Die hochfrequenten Störgrößen gelangen genau wie die niederfrequenten Nutzsignale in den Eingangskreis des Verstärkers und werden, wenn es sich um amplitudenmodulierte Größen handelt, an der Basis- Emitter-Strekke des Transistors Γ demoduliert. Die dann entstehenden NF-Störgrößen sind vom Nutzsignal nicht mehr zu trennen.Low-frequency amplifiers are used in telephones, for example, when the sensitivity of the microphone is insufficient or to enable hands-free operation. Such a circuit arrangement for an amplifier for an electroacoustic transducer which can be used in a telephone set is shown and described in DE-AS 28 12 735. In principle, such an amplifier consists of a transistor circuit to whose input the microphone is connected is, and will take output on the subscriber line. The microphone can be viewed as a generator with an internal resistance that emits useful signals, i.e. speech voltages. The input of such a low-frequency amplifier is basically able to pick up interferences in addition to the useful signals. In the equivalent circuit as shown in FIG. 1 of the present patent application, it is shown that a high-frequency interference generator SC connected in series with the useful signal generator G is conceivable. The high-frequency disturbance variables get into the amplifier's input circuit just like the low-frequency useful signals and, if they are amplitude-modulated variables, are demodulated at the base-emitter path of the transistor Γ. The resulting low-frequency interference can no longer be separated from the useful signal.

Um diesen unerwünschten Effekt zu beseitigen, ist es bekannt, einen Kondensator so an den Eingang eines Verstärkers anzuschalten, daß die hochfrequenten Störungen an der Basis-Emitter-Strecke eines Transistors vorbei geleitet werden. Wie ein derartiger Kondensator im Stromlaufplan anzuordnen ist, wird in der F i g. 1 dargestellt. Dieser Kondensator muß jedoch so genau dimensioniert sein, daß er die Nutzsignale nicht wesentlich dämpft und trotzdem die Störsignale wirksam dblei- '. tet. Da die Zuleitung zum Kondensator diese Dimensionierung stark beeinträchtigen können, ist es ratsam, den Kondensator so dicht wie möglich an der Basis-Emitter-Strecke des Eingangstransistors anzubringen.
' Die Aufgabe der Erfindung besteht deshalb darin, die. Anordnung eines Entstörkondensators so anzugeben, daß eine optimale Wirkung erzielt wird;In order to eliminate this undesirable effect, it is known to connect a capacitor to the input of an amplifier in such a way that the high-frequency interference is conducted past the base-emitter path of a transistor. How such a capacitor is to be arranged in the circuit diagram is shown in FIG. 1 shown. This capacitor must, however, be dimensioned so precisely that it does not significantly attenuate the useful signals and still effectively dble the interfering signals . tet. Since the lead to the capacitor can seriously affect this dimensioning, it is advisable to attach the capacitor as close as possible to the base-emitter path of the input transistor.
'The object of the invention is therefore that. To specify the arrangement of an interference suppression capacitor in such a way that an optimal effect is achieved;

Diese Aufgabe wird durch eine Anordnung gelöst,This task is solved by an arrangement

wie sie im Patentanspruch angegeben istas indicated in the claim

Damit wird in vorteilhafter Weise erreicht, daß die Induktivitäten der Anschlußdrähte eines Kondensators und der sonstigen Zuleitungen keinen negativen Einfluß auf die Wirksamkeit der Kapazität haben können. Es ist außerdem gewährleistet, daß eine derartige Anordnung in gleicher Wirksamkeit sehr genau reproduzierbar istThis advantageously ensures that the inductances of the connecting wires of a capacitor and the other supply lines cannot have a negative influence on the effectiveness of the capacitance. It is it also ensures that such an arrangement can be reproduced very precisely with the same effectiveness

Ein Ausführungsbeisptel der Erfindung wird nachfolgend anhand von Zeichnungen näher erläutert Es. zeigt Fig. 1 den Prinzip-Stromlaufplan eines Verstärkereingangs, An exemplary embodiment of the invention is shown below Explained in more detail with reference to drawings. Fig. 1 shows the principle circuit diagram of an amplifier input,

F i g. 2 das Anschlußprinzip einer integrierten Schaltung.
In der F i g. 1 ist dargestellt, wie die aus einein Gene-Rstor C mit einem inneren Widerstand Ri stammenden Nutzsignale an den Anschlußpunkt A 1 des Eingangs eines Verstärkers gelangen. Es sei angenommen, daß außerdem von einem hochfrequenten Störgener^tor SG Störgrößen ebenfalls auf diesen Eingang des Verstärkers gelangen. Als Störgeneratoren können Radiosender oder sonstige vorübergehend auftretende elektromagnetische Einstrahlungen in Frage kommen. Damit diese Störgrößen nicht vom Verstärker aufgenommen und verstärkt werden, ist ein Kondensator C so mit dem Eingangstransistor T verbunden, daß diese Störungen am Transistor T vorbei geleitet werden Wie aus der Zeichnung hervorgehe, ist dieser Kondensator C zwischen den Anschlußpunkten A 1 und A 2, also direkt an Basis und Emitter des Transistors T angeschlossen. In der Zeichnung ist außerdem noch ein Kollektorwiderstand R 1 und ein Emitterwiderstand R 2 angedeutet wie dies bei derartigen Transistorverstärkern üblich ist. Die Fig.2 zeigt den grundsätzlichen Aufbau einer integrierten Halbleiterschaltung. Diese besteht im wesentlichen aus einem Halbleiter-Chip HCH in dem neben dem bereits erwähnten Transistor T noch weitere Schaltelemente, beispielsweise weitere Verstärkerstufen in integrierter Form aufgebracht sind. Dieses Halbleiter-Chip HCHist auf einem 'solierl r^per angebracht.F i g. 2 the connection principle of an integrated circuit.
In FIG. 1 shows how the useful signals originating from a Gene-Rstor C with an internal resistor Ri arrive at the connection point A 1 of the input of an amplifier. It is assumed that disturbance variables also arrive at this input of the amplifier from a high-frequency disturbance generator SG. Radio transmitters or other temporarily occurring electromagnetic radiation can be used as interference generators. Thus, these disturbances are not absorbed by the amplifier and amplified, a capacitor C is connected to the input transistor T, that these disorders are passed to the transistor T by As is apparent from the drawing, this capacitor C between the connection points A 1 and A 2, so connected directly to the base and emitter of the transistor T. In the drawing, a collector resistor R 1 and an emitter resistor R 2 are also indicated, as is usual with such transistor amplifiers. 2 shows the basic structure of an integrated semiconductor circuit. This essentially consists of a semiconductor chip HCH in which, in addition to the transistor T already mentioned, further switching elements, for example further amplifier stages, are applied in integrated form. This semiconductor chip HCH is attached to a 'solierl r ^ per.

auf dem außerdem eine sogenannte Leiterspinne LSP befestigt ist Diese Leiterspinne beinhaltet außerdem gleichzeitig die Anschlußpins und dient dazu, die Stromversorgung und die elektrischen Signale dem Halbleiter-Chip HCH zuzuführen bzw. von ihm abzuführen. Zu diesem Zweck werden die entsprechenden Schaltpunkte des Halbleiter-Chips HCH über Bonddrähte BD mit den elektrisch leitenden Streifen der Leiterspinne LSP verbunden.
Der zur Verbesserung der elektromagnetischen Verträgüchkeit, also zur Beseitigung von hochfrequenten Störbeeinflussungen vorgesehene Kondensator C wird erfndungsgemäß direkt auf den Streifen der Leiterspinne LSP angeordnet Er ist somit räumlich unmittelbar mit den Basis- und Emitterelektroden des Eingangstransistors T verbunden, so daß keine induktiven Auswirkungen entstehen. Durch die direkte Kontaktierung auf die als Anschlußpins A 3 und A 2 dienenden Leiterstreifen der Leiterspinne LSP wird auch unmittelbar am Kondensator der Einfluß von Leiterinduktivitäten vermieden. Da der Kondensator i? eine Größenordnung ■ -haben muß, die eine direkte Integration in das Halblei· '·'- -ter-Chip nicht zuläßt, ist es,außerdem von besonderem "Vorteil, daß bei der erfindungsgemäßen Anordnung der 'Kondensator C innerhalb des Gehäuses untergebracht werden kann.on which a so-called conductor spider LSP is also attached. This conductor spider also contains the connection pins and is used to supply the power supply and the electrical signals to the semiconductor chip HCH or to dissipate them from it. For this purpose, the corresponding switching points of the semiconductor chip HCH are connected to the electrically conductive strips of the conductor spider LSP via bonding wires BD .
The capacitor C , which is intended to improve the electromagnetic compatibility, i.e. to eliminate high-frequency interference, is arranged directly on the strip of the LSP conductor spider according to the invention.It is thus spatially directly connected to the base and emitter electrodes of the input transistor T , so that no inductive effects arise. The direct contact with the conductor strips of the conductor spider LSP serving as connection pins A 3 and A 2 also avoids the influence of conductor inductances directly on the capacitor. Since the capacitor i? ■ must -have a magnitude that is a direct integration into the semiconducting · '·' - does not allow -th chip, it is also of particular "advantage that can be accommodated in the inventive arrangement of the 'capacitor C within the housing .

Hierzu 1 Blatt Zeichnungen1 sheet of drawings

Claims (1)

Patentanspruch:Claim: Anordnung zur Verbesserung der elektromagnetischen Verträglichkeit bei Niederfrequenz-Verstärkern in integrierter Schaltungstechnik, wobei ein Kondensator so an den Eingangstransistor angeschaltet ist, daß hochfrequente Störungen abgeleitet v/erden und das Nutzsignal nicht beeinflussen können, dadurch gekennzeichnet, daß zur Entstörung ein Kondensator (C) in Chip-Ausführung ohne Anschlußdrähte innerhalb eines Gehäuses einer integrierten Schaltung direkt mit zwei Anschlüssen einer für die Leiterzuführung zum Halbleiter (HCH) vorhandenen sogenannten Leiterspinne (LSP) elektrisch leitend verbunden istArrangement for improving the electromagnetic compatibility of low-frequency amplifiers in integrated circuit technology, a capacitor being connected to the input transistor in such a way that high-frequency interference is derived and cannot influence the useful signal, characterized in that a capacitor (C) in Chip design without connecting wires within a housing of an integrated circuit is connected in an electrically conductive manner directly to two connections of a so-called conductor spider (LSP) provided for the conductor feed to the semiconductor (HCH)
DE3316184A 1983-05-04 1983-05-04 Arrangement to improve the electromagnetic compatibility of low-frequency amplifiers Expired DE3316184C2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE3316184A DE3316184C2 (en) 1983-05-04 1983-05-04 Arrangement to improve the electromagnetic compatibility of low-frequency amplifiers

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE3316184A DE3316184C2 (en) 1983-05-04 1983-05-04 Arrangement to improve the electromagnetic compatibility of low-frequency amplifiers

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DE3316184A1 DE3316184A1 (en) 1984-11-22
DE3316184C2 true DE3316184C2 (en) 1985-08-14

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4027686A1 (en) * 1989-08-31 1991-03-14 Toshiba Kawasaki Kk INTEGRATED CIRCUIT AND YOUR CONNECTION CIRCUIT

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19509295A1 (en) * 1995-03-15 1996-09-19 Telefunken Microelectron Common-base transistor amplifier circuit for FM radio stage

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE6803418U (en) * 1968-10-23 1969-03-13 Gebr Buehler Nachf Gmbh SMALL ELECTRIC MOTOR
FR2301952A1 (en) * 1975-02-22 1976-09-17 Lucas Industries Ltd Brushless generator with double-sided printed circuit board - with holes for capacitors to suppress interference
AT361546B (en) * 1977-03-31 1981-03-10 Akg Akustische Kino Geraete CIRCUIT ARRANGEMENT FOR A TRANSISTORIZED AMPLIFIER FOR AN ELECTROACOUSTIC CONVERTER
US4329605A (en) * 1980-10-14 1982-05-11 General Motors Corporation Electric motor having radio frequency interference radiation suppression

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4027686A1 (en) * 1989-08-31 1991-03-14 Toshiba Kawasaki Kk INTEGRATED CIRCUIT AND YOUR CONNECTION CIRCUIT

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Owner name: TELENORMA TELEFONBAU UND NORMALZEIT GMBH, 6000 FRA

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