DE3277473D1 - A method of storing data in a memory of a data processing system - Google Patents
A method of storing data in a memory of a data processing systemInfo
- Publication number
- DE3277473D1 DE3277473D1 DE8282200321T DE3277473T DE3277473D1 DE 3277473 D1 DE3277473 D1 DE 3277473D1 DE 8282200321 T DE8282200321 T DE 8282200321T DE 3277473 T DE3277473 T DE 3277473T DE 3277473 D1 DE3277473 D1 DE 3277473D1
- Authority
- DE
- Germany
- Prior art keywords
- memory
- processing system
- data
- data processing
- storing data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
- G06F5/065—Partitioned buffers, e.g. allowing multiple independent queues, bidirectional FIFO's
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Controls And Circuits For Display Device (AREA)
- Memory System (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8109381A GB2095441A (en) | 1981-03-25 | 1981-03-25 | A method of storing data and a store therefor |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3277473D1 true DE3277473D1 (en) | 1987-11-19 |
Family
ID=10520655
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8282200321T Expired DE3277473D1 (en) | 1981-03-25 | 1982-03-11 | A method of storing data in a memory of a data processing system |
Country Status (5)
Country | Link |
---|---|
US (1) | US4481576A (de) |
EP (1) | EP0061804B1 (de) |
JP (1) | JPS57176586A (de) |
DE (1) | DE3277473D1 (de) |
GB (1) | GB2095441A (de) |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1991014986A1 (en) * | 1990-03-23 | 1991-10-03 | Eastman Kodak Company | Virtual memory management and allocation arrangement for digital data processing system |
US5287452A (en) * | 1990-03-23 | 1994-02-15 | Eastman Kodak Company | Bus caching computer display system |
US5269009A (en) * | 1990-09-04 | 1993-12-07 | International Business Machines Corporation | Processor system with improved memory transfer means |
DE4127579A1 (de) * | 1991-08-21 | 1993-02-25 | Standard Elektrik Lorenz Ag | Speichereinheit mit einem adressgenerator |
US5666506A (en) * | 1994-10-24 | 1997-09-09 | International Business Machines Corporation | Apparatus to dynamically control the out-of-order execution of load/store instructions in a processor capable of dispatchng, issuing and executing multiple instructions in a single processor cycle |
JP2001256318A (ja) * | 2000-03-14 | 2001-09-21 | Sony Corp | コンテンツ取り引きシステムおよびコンテンツ取り引き方法、並びにプログラム提供媒体 |
US6976158B2 (en) | 2001-06-01 | 2005-12-13 | Microchip Technology Incorporated | Repeat instruction with interrupt |
US7467178B2 (en) | 2001-06-01 | 2008-12-16 | Microchip Technology Incorporated | Dual mode arithmetic saturation processing |
US7007172B2 (en) | 2001-06-01 | 2006-02-28 | Microchip Technology Incorporated | Modified Harvard architecture processor having data memory space mapped to program memory space with erroneous execution protection |
US6552625B2 (en) | 2001-06-01 | 2003-04-22 | Microchip Technology Inc. | Processor with pulse width modulation generator with fault input prioritization |
US20020184566A1 (en) | 2001-06-01 | 2002-12-05 | Michael Catherwood | Register pointer trap |
US6604169B2 (en) | 2001-06-01 | 2003-08-05 | Microchip Technology Incorporated | Modulo addressing based on absolute offset |
US7003543B2 (en) | 2001-06-01 | 2006-02-21 | Microchip Technology Incorporated | Sticky z bit |
US7020788B2 (en) | 2001-06-01 | 2006-03-28 | Microchip Technology Incorporated | Reduced power option |
US6728856B2 (en) | 2001-06-01 | 2004-04-27 | Microchip Technology Incorporated | Modified Harvard architecture processor having program memory space mapped to data memory space |
US6934728B2 (en) | 2001-06-01 | 2005-08-23 | Microchip Technology Incorporated | Euclidean distance instructions |
US6937084B2 (en) | 2001-06-01 | 2005-08-30 | Microchip Technology Incorporated | Processor with dual-deadtime pulse width modulation generator |
US6601160B2 (en) | 2001-06-01 | 2003-07-29 | Microchip Technology Incorporated | Dynamically reconfigurable data space |
US6985986B2 (en) | 2001-06-01 | 2006-01-10 | Microchip Technology Incorporated | Variable cycle interrupt disabling |
US6952711B2 (en) | 2001-06-01 | 2005-10-04 | Microchip Technology Incorporated | Maximally negative signed fractional number multiplication |
US6975679B2 (en) | 2001-06-01 | 2005-12-13 | Microchip Technology Incorporated | Configuration fuses for setting PWM options |
US20040021483A1 (en) * | 2001-09-28 | 2004-02-05 | Brian Boles | Functional pathway configuration at a system/IC interface |
US6552567B1 (en) | 2001-09-28 | 2003-04-22 | Microchip Technology Incorporated | Functional pathway configuration at a system/IC interface |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3571801A (en) * | 1966-06-03 | 1971-03-23 | Nasa | Data transfer system |
JPS5151248A (en) * | 1974-10-31 | 1976-05-06 | Fujitsu Ltd | Shingotensohoshiki |
NL165859C (nl) * | 1975-04-25 | 1981-05-15 | Philips Nv | Station voor informatie-overdracht. |
US4046995A (en) * | 1975-11-17 | 1977-09-06 | Engineered Systems, Inc. | Memory fullness indicator |
US4383296A (en) * | 1980-05-16 | 1983-05-10 | Apple Computer, Inc. | Computer with a memory system for remapping a memory having two memory output buses for high resolution display with scrolling of the displayed characters |
-
1981
- 1981-03-25 GB GB8109381A patent/GB2095441A/en not_active Withdrawn
-
1982
- 1982-03-11 EP EP82200321A patent/EP0061804B1/de not_active Expired
- 1982-03-11 DE DE8282200321T patent/DE3277473D1/de not_active Expired
- 1982-03-19 US US06/359,643 patent/US4481576A/en not_active Expired - Fee Related
- 1982-03-25 JP JP4644282A patent/JPS57176586A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0061804A2 (de) | 1982-10-06 |
EP0061804A3 (en) | 1985-04-17 |
GB2095441A (en) | 1982-09-29 |
JPS57176586A (en) | 1982-10-29 |
US4481576A (en) | 1984-11-06 |
EP0061804B1 (de) | 1987-10-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |