DE3270033D1 - Self-clocking serial decoder - Google Patents

Self-clocking serial decoder

Info

Publication number
DE3270033D1
DE3270033D1 DE8282111115T DE3270033T DE3270033D1 DE 3270033 D1 DE3270033 D1 DE 3270033D1 DE 8282111115 T DE8282111115 T DE 8282111115T DE 3270033 T DE3270033 T DE 3270033T DE 3270033 D1 DE3270033 D1 DE 3270033D1
Authority
DE
Germany
Prior art keywords
self
serial decoder
clocking serial
clocking
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282111115T
Other languages
English (en)
Inventor
Craig Allen Hanna
Edmund Lancki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3270033D1 publication Critical patent/DE3270033D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/044—Speed or phase control by synchronisation signals using special codes as synchronising signal using a single bit, e.g. start stop bit
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/06—Speed or phase control by synchronisation signals the synchronisation signals differing from the information signals in amplitude, polarity or frequency or length
DE8282111115T 1981-12-14 1982-12-02 Self-clocking serial decoder Expired DE3270033D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/330,621 US4449119A (en) 1981-12-14 1981-12-14 Self-clocking serial decoder

Publications (1)

Publication Number Publication Date
DE3270033D1 true DE3270033D1 (en) 1986-04-24

Family

ID=23290554

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282111115T Expired DE3270033D1 (en) 1981-12-14 1982-12-02 Self-clocking serial decoder

Country Status (4)

Country Link
US (1) US4449119A (de)
EP (1) EP0081750B1 (de)
JP (1) JPS58103258A (de)
DE (1) DE3270033D1 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4567604A (en) * 1983-08-29 1986-01-28 At&T Teletype Corporation Biphase signal receiver
DE3331205A1 (de) * 1983-08-30 1985-03-14 Telefunken Fernseh Und Rundfunk Gmbh, 3000 Hannover Synchronmuster
US4542420A (en) * 1984-01-24 1985-09-17 Honeywell Inc. Manchester decoder
FR2586150B1 (fr) * 1985-08-07 1987-10-23 Thomson Csf Mat Tel Dispositif de transmission de paquets dans un reseau temporel asynchrone, et procede de codage des silences
FR2605473A1 (fr) * 1986-10-15 1988-04-22 Hewlett Packard France Sa Procede et appareil de codage et de decodage d'informations binaires
JPH01501752A (ja) * 1987-01-05 1989-06-15 グラマン　エアロスペース　コーポレーション 高速データクロック同期プロセッサ
US5023891A (en) * 1989-07-25 1991-06-11 Sf2 Corporation Method and circuit for decoding a Manchester code signal
US6150855A (en) * 1990-02-06 2000-11-21 Bull, S.A. Phase-locked loop and resulting frequency multiplier
FR2658015B1 (fr) * 1990-02-06 1994-07-29 Bull Sa Circuit verrouille en phase et multiplieur de frequence en resultant.
FR2664765B1 (fr) * 1990-07-11 2003-05-16 Bull Sa Dispositif de serialisation et de deserialisation de donnees et systeme de transmission numerique de donnees en serie en resultant.
FR2664770A1 (fr) * 1990-07-11 1992-01-17 Bull Sa Procede et systeme de transmission numerique de donnees en serie.
FR2664769A1 (fr) * 1990-07-11 1992-01-17 Bull Sa Dispositif d'echantillonnage de donnees et systeme de transmission numerique de donnees en resultant.
US5127023A (en) * 1990-07-18 1992-06-30 The United States Of America As Represented By The Secretary Of The Navy Retiming decoder/encoder
US5367542A (en) * 1992-06-19 1994-11-22 Advanced Micro Devices, Inc. Digital data recovery using delay time rulers
US6028903A (en) * 1997-03-31 2000-02-22 Sun Microsystems, Inc. Delay lock loop with transition recycling for clock recovery of NRZ run-length encoded serial data signals
DE19713660A1 (de) * 1997-04-02 1998-10-08 Siemens Nixdorf Inf Syst Phasenjustierung schneller paralleler Signale
US6763477B1 (en) * 2000-07-31 2004-07-13 Hewlett-Packard Development Company, L.P. Method and apparatus for transmitting and receiving data using a self clocking link protocol
US6708239B1 (en) * 2000-12-08 2004-03-16 The Boeing Company Network device interface for digitally interfacing data channels to a controller via a network
US7787526B2 (en) * 2005-07-12 2010-08-31 Mcgee James Ridenour Circuits and methods for a multi-differential embedded-clock channel
EP1860808A1 (de) * 2006-05-25 2007-11-28 STMicroelectronics (Research & Development) Limited Rahmensynchronisierung und Taktrückgewinnung mit Präambeldaten die eine bi-phase Kodierungsvorschrift verletzen
WO2008039953A2 (en) 2006-09-27 2008-04-03 Nxp B.V. Spaced-one-hot receiver
US10157161B2 (en) * 2015-10-16 2018-12-18 Qualcomm Incorporated Conditional embedding of dynamically shielded information on a bus

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL262250A (de) * 1961-03-11
US3903504A (en) * 1974-03-20 1975-09-02 Singer Co Binary phase digital decoding system
US4063220A (en) * 1975-03-31 1977-12-13 Xerox Corporation Multipoint data communication system with collision detection
JPS51128253A (en) * 1975-04-24 1976-11-09 Singer Co Digital decoder
FR2377729A1 (fr) * 1977-01-14 1978-08-11 Thomson Csf Dispositif de decodage de signaux numeriques, et systeme comportant un tel dispositif
US4185273A (en) * 1977-07-27 1980-01-22 The United States Of America As Represented By The Secretary Of The Navy Data rate adaptive control device for Manchester code decoders
IT1108564B (it) * 1978-04-11 1985-12-09 Olivetti C Ing E C Spa Dispositivo digitale sincronizzatore e demodulatore di segnali codificati di frequenza
US4218770A (en) * 1978-09-08 1980-08-19 Bell Telephone Laboratories, Incorporated Delay modulation data transmission system
US4276656A (en) * 1979-03-19 1981-06-30 Honeywell Information Systems Inc. Apparatus and method for replacement of a parallel, computer-to-peripheral wire link with a serial optical link
US4320525A (en) * 1979-10-29 1982-03-16 Burroughs Corporation Self synchronizing clock derivation circuit for double frequency encoded digital data

Also Published As

Publication number Publication date
EP0081750A1 (de) 1983-06-22
JPS58103258A (ja) 1983-06-20
JPH0150150B2 (de) 1989-10-27
US4449119A (en) 1984-05-15
EP0081750B1 (de) 1986-03-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee