DE3245344A1 - Circuit arrangement for a receiver for data transmission by means of four-stage phase shift keying - Google Patents

Abstract

The invention relates to a circuit arrangement for a receiver for data transmission by means of four-stage phase shift keying of the line signal between a first, second, third and fourth signal point, where a preamble to the adjustment of an adaptive equalisation is transmitted before the data transmission, which preamble has a first section with alternating transmission of the first and second signal point, followed by a second section comprising a pseudo-random sequence of the third and fourth signal points. The object of the invention is to indicate a low-cost circuit arrangement for detecting the start of the second section. To achieve this, a Hilbert filter is set during the first section, by adjusting fixed coefficients, to a low bandwidth and the phase angle of a carrier oscillation used for demodulation is regulated in such a way that a DC voltage signal at a demodulator output assumes a maximum value. With the start of the second section, this DC voltage signal changes its polarity. This polarity change is used to start up a reference generator to generate a pseudo-random reference sequence which serves to adjust the adaptive equalisation.

Description

Circuit arrangement for a receiver for data transmission

by means of four-stage phase shift keying The invention relates to a Circuit arrangement for a receiver for data transmission by means of four-stage Phase shift keying according to the preamble of claim 1. In such a Circuit arrangement, the beginning of the pseudo-random sequence must be recognized to the Start the reference generator.

In a known circuit arrangement (European patent specification 0 012 884) the current and the average signal power are used for this determined and the drop in the current signal power below the average Signal power evaluated as the beginning of the pseudo-random sequence.

This requires a relatively complex assembly that from two low-pass filters, three multipliers, one summer, one integrator, one Delay, two subtractors, two sign decision makers and a gate circuit consists.

The object of the invention is to reduce the effort involved in recognizing the beginning to reduce the pseudorandom sequence.

This object is achieved by a circuit arrangement according to the patent claim 1 solved.

By setting a small bandwidth, the inventive Receiver has the advantage of low sensitivity to interfering signals.

The development according to claim 2 increases the sensitivity further reduced against interfering signals.

The invention is described with reference to FIGS. 1 to 6.

Figures 1 and 5 show block diagrams of exemplary embodiments the receiver according to the invention, wherein Figure 1 refers to claim 1, the FIG. 5 relates to claim 2. In Figures 2 and 4, so-called Phase stars show different phase positions of the line signal. The figure 6 relates to a function of the receiver according to FIG. 5.

First, the structure of a receiver according to FIG. 1 is shown the claim 1 described. The line signal is via an input E, a Receiving filter EF and a control amplifier 1 are fed to a sampler 2. The scanner 2 is followed by an analog-to-digital converter 3 and this is followed by a Hilbert filter pair 4 from two filters HN and HQ. The Hilbert filter pair 4 are two further samplers 5 and 6 and these are followed by a demodulator 7. The demodulator 7 has two Outputs on, a first demodulator output x 'and a second demodulator output y ', which are connected to inputs of a decision maker 8. about the outputs x and y of the decision maker 8, the received data are not shown Data processing device supplied.

A clock generator 9 supplies the samplers 2, 5 and 6 with a clock, wherein the scanner 2 supplies the scanners 5 and 6 directly via a divider 10 will.

The two filters HN and HQ are transversal filters with coefficient adaptation executed. A first controllable switch is used to set the coefficient 11, a fixed coefficient memory 12, a coefficient controller 13 and a reference generator 14 for the reference pseudo-random sequence.

For supplying the demodulator 7 with a carrier oscillation a carrier generator 15 is provided, the phase position 9 of the carrier oscillation of a phase controller 16 is controlled. The phase control 16 is via a second controllable switch 17 either from one connected to the demodulator output y ' Sign decider 18 or controlled by a phase error detector 19, which with the demodulator outputs x 'and y' and the outputs x and 9 of the decision maker 8 is connected.

With the demodulator output x 'there is a second sign decider 20 connected, the output of which is connected to the first input of a first OR circuit 21 is connected, the output of which is connected to the start input of the reference generator 14, the control inputs of the controllable switches 11 and 17 and the second input the first OR circuit 21 is connected.

The following is a functional description of the receiver described above with reference to Figures 1 to 4.

Figures 2 to 4 show different phase positions of the line signal as well as the associated signals at the demodulator outputs x 'and y', where the x-axis Figures 2 to 4 the signals of the demodulator output Xv and the y-axis those of the demodulator output y 'is assigned. Figure 2 relates to normal data transmission, Figure 3 shows the first section of the preamble and Figure 4 shows the transition from the first to the second section.

FIG. 2 shows the nominal phase positions of the transmitted line signal. The line signal can have four different phase positions (00, 900, 1800, 2700) the reference phase 00 assume. These four phase positions are associated with the signal points A, B, C and D. Both between the first signal point A and the third Signal point C as well as between the second signal point B and the fourth signal point D there is a phase difference of 1,800 each. Between adjacent signal points there are phase differences of 900 in this example, but the invention can can also be used in systems in which a phase difference other than 900 consists.

During the first section of the preamble assign the controllable Switches 11 and 17 position a and av, respectively. This is the memory for fixed Coefficients 12 connected to the coefficient control inputs of the filters HN and HQ. These fixed coefficients result in the setting of a small band at te in these filters. The transmitter, not shown in FIG. 1, transmits during the first section a line signal, which alternately the signal points A and B (Fig. 2). Since at the beginning of the first section of the carrier generator 15 with any phase position oscillates, the signal points of the received match Line signal does not match the target points A and B of Figure 2, but the result is, for example, the signal points A 'and B' shown in FIG. grasslands the filters HN and HQ have a sufficient bandwidth for normal data transmission, this would result in constant signal changes between x 'and y' at the demodulator outputs Xmax and xmin or ymax and imin, where the signals Xmax and YmaX when receiving the Signal point A 'would occur.

However, the fixed coefficients result in such a narrow bandwidth set that the receiver can quickly switch between signal points A 'and B' do not follow Since the outcome of the first sign decider 18 connected to the phase controller 16 via the second controllable switch 17 is, the carrier generator 15 is controlled in its phase position so that the mean value y at the demodulator output y 'becomes zero. This also increases the amount of the Mean value x reaches its maximum value, the mean signal point comes as a signal point M 'to lie on the x-axis (Figure 4) and the signal points A and B take them with them A? V or B "designated layers.

In the second section that follows, the transmitter sends a pseudo-random sequence of signal points C and D, starting with alternations C-D-C-D etc. As the carrier generator 15 initially with the phase position adjusted during the first section continues to oscillate, the filter would result in the receiver with a sufficiently large bandwidth HN and HQ the signal points C "and D". However, since the filters HN and HQ are still on one If the bandwidth is set to low, the receiver can also use the initial fast Switching between the signal points cvv and D "do not follow, and at the demodulator outputs Signals corresponding to a mean signal point S appear in x 'and y'. Of the Change from the first to the second section, i.e. the beginning of the pseudo-random sequence, affects the signals at the demodulator outputs x 'and y' in such a way that that the value at the demodulator output y 'remains at zero and the value at the demodulator output x 'changes its polarity, in this example from minus to plus.

This polarity change causes a change in the signal at the output of the second sign decider 20 from “no” to “yes”. For this yes signal a switching signal for switching the receiver is generated via the first OR circuit 21 obtained for evaluating the second section. Through the feedback of the switchover signal on the second input of the OR circuit 21 is achieved that the switchover also remains when the second sign decider 20 comes back later gives a no signal.

The switching signal causes the controllable switches to be switched 11 and 17 in the position b or b 'and the start of the "Start" line Reference generator 14. The coefficients of the filters HN and HQ are now used by the Coefficient control 13 by comparing the signals at the demodulator outputs Xv and y 'with the reference pseudo-random sequence generated by the reference generator 14 controlled. Furthermore, the phase position q of the carrier wave emitted by the carrier generator 15 becomes from the phase error detector 19 by comparing the signals at the demodulator outputs x 'and y' are controlled with those at the outputs xA and 9 of the decision maker 8. To this In this way, the receiver is optimal for the data transmission following the preamble set.

The description of a receiver according to FIG. 5 now follows differs from that according to Figure 1 in that the output of the first Or circuit 21 is followed by an AND circuit 22 and also another second OR circuit 23, a delay element 24 and a level monitor Pü are provided. The output of the first OR circuit 21 is connected to the first input connected to the AND circuit 22, the output of which is connected to the start input of the reference generator 14, the control inputs of the controllable switches 11 and 17, the second input the first OR circuit 21 and the first input of the second OR circuit 23 is connected.

The second input of the AND circuit 22 is connected to the output of the second Or circuit 23 is connected, the second input of which is connected to the output of the delay element 24 is connected. The input signal is after the input of the level monitoring PÜ it has passed through the reception filter EF. The output of the level monitoring Pü is connected to the input of the delay element 24.

The receiver also differs in its functions according to the FIG. 5 differs from that according to FIG. 1 only through the functions of the additional assemblies. These are described with reference to FIG. In the first line is the line signal shown. Before the beginning of the preamble (time t1) there is no useful signal the line, and the outputs of the level monitoring PÜ and the delay element 24 have logical no signals. A line signal occurs at time t, the beginning the preamble, on.

Thereupon the signal at the output of the level monitoring Pü changes with a response delay tA at time t2 from "no" to "yes". After a delay time At time t3, the signal at the output of the delay element 24 also changes from "no" to "yes".

At time t4, the second begins with a phase jump of 1800 Section of the preamble. This phase jump leads to time t5 as in FIG the description of Figure 1 describes a change in the signal from "no" to "yes" at the output of the second sign decider 20. Now about the two OR circuits 21 and 23 are present at both inputs of the AND circuit 22 yes signals, its output also emits a yes signal. This yes-signal is, as in the description of Figure 1 already described, used as a switching signal. Because the first entrance the second OR circuit 23 is connected to the output of the AND circuit 22, the switchover signal remains below the response threshold even if the level drops briefly the level evaluation PÜ received.

By the level monitoring PÜ, the delay element 24 and the AND circuit 22 it is achieved that yes signals caused by interference signals before time t3 at the output of the second sign decider 20 no premature switching of the Effect recipient on the second section of the preamble.

In order to make this protection against premature switchover as effective as possible design, must by appropriate measurement of the delay ration time tv taking into account the known length of the preamble between its beginning and the beginning of its second section of the time t3 as close as possible the point in time t4 can be applied. The time t3 may also be between Times t4 and t5 lie, however, with the greatest possible plus tolerances, the Response delay tA and the delay time tV not after the time t3 Point in time t5.

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Claims (2)

Claims U Circuit arrangement for a receiver for data transmission by means of four-stage phase shift keying of the line signal between a first, second, third and fourth signal point, each with a phase difference of 1800 between the first and third signal point as well as between the second and the fourth signal point, with a preamble also before the data transmission to set an adaptive equalization is transmitted, which a first Has section with alternating transmission of the first and second signal point, followed by a second section consisting of a pseudo-random sequence of the third and fourth signal points, where the receiver is followed by a Hilbert filter pair of a demodulator, and a reference generator, wherein after detection the beginning of the pseudo-random sequence, the adaptive equalization by a comparison the received pseudo-random sequence with the reference pseudo-random sequence generated by the reference generator is controlled in a coefficient controller, the output of the coefficient controller a first controllable switch is connected downstream, the demodulator is acted upon by a carrier oscillation generated by a carrier generator as well as having a first and a second demodulator output, characterized in that that the Hilbert filter pair (4) forming filters (HN, HQ) as transversal filters are designed with coefficient adaptation, the coefficient control inputs via the first controllable switch (11) in its first switch position (a) with a Memory for fixed coefficients (12) and in its second switch position (b) can be connected to the output of the coefficient control (13) that the in memory for fixed coefficients (12) stored coefficients the setting of a so cause the low bandwidth of the filters (HN, HQ), in which the signals to the Demodulator outputs (x ', y') do not follow the changes in the line signal, but rather Mean values (x, y) assume that the carrier generator (15) has a phase control input has, which is controllable via a phase control (16) and a second Switch (17) via its first switch position (a ') to the output of a first Vozeichenentscheider (18) and its second switch position (b ') with the output a phase error detector (19) can be connected, the input of the first sign decider (18) with the second demodulator output (y ') and the inputs of the phase error detector (19) with the demodulator outputs (x ', y') and the outputs (XA, yA) of one of the Demodulator (7) downstream decision maker (8) are connected, further during the connection of the phase control (16) with the first sign decider (18) the phase control (16) regulates the carrier oscillation in such a phase position (9), at which the magnitude of the signal at the second demodulator output (y ') has a minimum value assumes that a second sign decider is connected to the first demodulator output (x ') (20) is connected that a connection between its output and control inputs the controllable switch (11, 17) and a start input of the reference reference generator (14), the change occurring at the beginning of the second section of the signal at the output of the second sign decider (20) starting the reference generator (14) and toggling the controllable switches (1-1, 17) - from their first (a, a ') in their second (b, b ') switch positions. 2. Circuit arrangement according to claim 1, characterized in that into the connection between the output of the second sign decider (20) and the control inputs of the controllable switches (11, 17) and the start input of the Reference generator (14) an AND circuit (22) is inserted, with its output with the control inputs of the controllable switches (11, i7) and the start input of the reference generator (14) is connected and its first input to the output of the second preferred decision maker (20) that its second input is connected to the output of a delay element (24) is connected, that its input to connected to the output of a level monitoring system (Pü) to which the line signal is applied is, and that the delay time of the delay element (24) is dimensioned so that at their output a yes signal only shortly before the beginning of the second section caused signal level change at the output of the second sign decider (20) occurs.