DE3232280A1 - Method for compensating for drift of the converting elements of one or a number of analog/digital converters - Google Patents

Abstract

During the conversion from analog into digital information items, an analog/digital converter frequently exhibits a short-term or a long-term drift which becomes particularly disturbingly noticeable when several converters are operated in parallel. To compensate for the drift tendency, it is provided that after at least two conversions from analog into digital signals occurring successively in time a predetermined reference potential (Uref) is applied to the input of each converter (1) for a conversion period, to store the resultant digital output signal value of each converter (1) in an associated memory (5), and to correct the digital output signals of each converter (1) by the value stored in the memory (5) during subsequent conversions. <IMAGE>

Description

"Procedure for drift compensation of the changing elements

one or more analog to digitel converters "The invention relates to a method according to the preamble of claim 1 and a circuit arrangement to carry out the procedure.

Analog-to-digital converters are well-known components whose changing elements in the conversion of analog to digital information a Subject to short- or long-term drift. The drifts are particularly annoying when there are several Analog-to-digital converters work in parallel. Analog-to-digital converters working in parallel are preferred, for example, in the case of high-speed signal processing devices used in image pickup devices for the detection of point targets.

The invention is based on the object of a method and a circuit arrangement to implement the procedure to create a compensation of the short or Ensure long-term drifts for individual analog-to-digital converters working in parallel.

According to the invention, the object is achieved by the characterizing process features of claim 1 solved.

Refinements of the method according to the invention are set out in the claims 2 and 3.

A circuit arrangement for carrying out the method is included in the claim 4 claimed.

There is a further development of the circuit arrangement according to the invention Claim 5 to.

It is advantageously a drift-free digital output signal of a Analog-to-digital converter provided.

In the drawing, an embodiment according to the invention is shown, and the single FIGURE shows a circuit arrangement for implementing the invention Method when using an analog-to-digital converter 1 with a converter controlling clock generator 2.

The analog input of the analog-digital converter 1 is an amplifier 4 and an electronic switch 3 upstream, with the amplifier an additional Represents component of a converter chain. Other components can be in the same: Way are provided, but always between the switch 3 and the Analog input of converter 1 can be arranged.

The electronic changeover switch 3 is controlled by the clock generator 2 in this way activated that it alternately receives an analog signal or a specified reference potential Usezu9 is applied to the analog input of converter 1. The time to create the The reference potential is basically freely selectable, but is generally through determines the application.

At the digital output of the analog-to-digital converter 1 is the input of one Memory 5, e.g. a RAM'9, and one of two inputs of a differential element 6 connected.

The second input of the differential element 6, the output 7 of which is the digital output the circuit arrangement forms, is with the output of the memory 5 in electrical conductive connection. Memory 5 and differential element 6 are just like the electronic Changeover switch 3 controlled by the clock generator 2 with a predetermined clock frequency.

A drift-free digital signal at the output 7 is generated in that after a freely selectable number of consecutive conversions from analog signals to digital signals the input of the analog-to-digital converter 1 for a conversion time is placed on a specified reference potential. this happens by means of the electronic switch 3 and the clock generator 2. The reference potential can e.g. be zero potential. The resulting digital output signal value of the analog-digital converter 1 is stored in the memory 5. With subsequent Analog-to-digital conversions become the digital output signal (s) of the analog-to-digital converter 1 corrected by the value stored in memory 5. The difference term is used for correction 6 provided, with the help of which of each digital output signal the stored digital output signal value is subtracted.

In the case of analog-to-digital converters working in parallel, the above-described Circuit arrangement can be used in a similar manner. For every analog-to-digital converter a memory and a correction element are required. It is the use of several Clock generators, each a clock generator for an analog-digital memory, or only one clock generator for all analog-digital converters working in parallel is possible.

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Claims (5)

PATENT CLAIMS Process for drift compensation of the changing elements one or more analog-to-digital converters, preferably one that works in parallel Analog-to-digital converters controlled by one or more clock generators are characterized in that after at least two occurred consecutively Conversion of analog signals into digital signals is the input of every analog-digital converter (1) is placed on a specified reference potential for a conversion time, daX the resulting digital output signal value of each analog-to-digital converter (1) is stored in an associated memory (5), and that in subsequent Analog-to-digital conversions the digital output signal (s) of each analog-to-digital converter (1) can be corrected by the value stored in the associated memory (5). 2. The method according to claim 1, characterized in that as a predetermined Reference potential the zero potential is selected. 3. The method according to claim 1, characterized in that for correction of a digital output signal, the associated stored digital output signal value is subtracted from the digital output signal. 4. Circuit arrangement for performing the method according to a of claims 1 to 3 when using an analog-to-digital converter with an associated Clock generator, characterized in that at the analog input of the analog-digital converter (1) An electronic switch (3) is provided, either an analog signal or the reference signal is applied to the converter input that at the digital output of the analog-digital converter (1) the input of a memory (5) and an input of a differential element (6), whose second input is electrically connected to the output of the memory (5) and the output (7) of which forms the digital output of the circuit arrangement are, and that the clock generator (2) the memory (5), the differential element (6) and controls the changeover switch (3) with a predetermined clock frequency. 5. Circuit arrangement according to claim 4, characterized in that between the electronic switch (3) and the analog input of the analog-digital converter (1) further components (4) of a converter chain are arranged.