DE3171416D1 - Subroutine control circuitry - Google Patents
Subroutine control circuitryInfo
- Publication number
- DE3171416D1 DE3171416D1 DE8181304886T DE3171416T DE3171416D1 DE 3171416 D1 DE3171416 D1 DE 3171416D1 DE 8181304886 T DE8181304886 T DE 8181304886T DE 3171416 T DE3171416 T DE 3171416T DE 3171416 D1 DE3171416 D1 DE 3171416D1
- Authority
- DE
- Germany
- Prior art keywords
- control circuitry
- subroutine control
- subroutine
- circuitry
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
- G06F9/4482—Procedural
- G06F9/4484—Executing subprograms
- G06F9/4486—Formation of subprogram jump address
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/231,553 US4459659A (en) | 1981-02-04 | 1981-02-04 | Subroutine control circuitry for providing subroutine operations in a data processing system in which tasks are executed on a microprogrammed level |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3171416D1 true DE3171416D1 (en) | 1985-08-22 |
Family
ID=22869714
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8181304886T Expired DE3171416D1 (en) | 1981-02-04 | 1981-10-20 | Subroutine control circuitry |
Country Status (4)
Country | Link |
---|---|
US (1) | US4459659A (de) |
EP (1) | EP0057312B1 (de) |
JP (1) | JPS57143642A (de) |
DE (1) | DE3171416D1 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5958039A (en) * | 1997-10-28 | 1999-09-28 | Microchip Technology Incorporated | Master-slave latches and post increment/decrement operations |
US6345353B2 (en) * | 1999-07-20 | 2002-02-05 | Microchip Technology Incorporated | Stack pointer with post increment/decrement allowing selection from parallel read/write address outputs |
JP4286768B2 (ja) | 2004-11-30 | 2009-07-01 | 富士通株式会社 | 分岐予測装置およびその制御方法 |
JP3768516B1 (ja) * | 2004-12-03 | 2006-04-19 | 株式会社ソニー・コンピュータエンタテインメント | マルチプロセッサシステムとそのシステムにおけるプログラム実行方法 |
US10338928B2 (en) * | 2011-05-20 | 2019-07-02 | Oracle International Corporation | Utilizing a stack head register with a call return stack for each instruction fetch |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3805247A (en) * | 1972-05-16 | 1974-04-16 | Burroughs Corp | Description driven microprogrammable multiprocessor system |
JPS49104536A (de) * | 1973-02-06 | 1974-10-03 | ||
US4030075A (en) * | 1975-06-30 | 1977-06-14 | Honeywell Information Systems, Inc. | Data processing system having distributed priority network |
US4156925A (en) * | 1976-04-30 | 1979-05-29 | International Business Machines Corporation | Overlapped and interleaved control store with address modifiers |
US4041462A (en) * | 1976-04-30 | 1977-08-09 | International Business Machines Corporation | Data processing system featuring subroutine linkage operations using hardware controlled stacks |
JPS5311547A (en) * | 1976-07-20 | 1978-02-02 | Oki Electric Ind Co Ltd | Program call order system |
JPS5398753A (en) * | 1977-02-09 | 1978-08-29 | Nippon Telegr & Teleph Corp <Ntt> | Interrupt processing system |
SE403322B (sv) * | 1977-02-28 | 1978-08-07 | Ellemtel Utvecklings Ab | Anordning i en styrdator for forkortning av exekveringstiden for instruktioner vid indirekt adressering av ett dataminne |
JPS5474651A (en) * | 1977-11-28 | 1979-06-14 | Toshiba Corp | Stack control system |
US4197579A (en) * | 1978-06-06 | 1980-04-08 | Xebec Systems Incorporated | Multi-processor for simultaneously executing a plurality of programs in a time-interlaced manner |
US4229790A (en) * | 1978-10-16 | 1980-10-21 | Denelcor, Inc. | Concurrent task and instruction processor and method |
US4346435A (en) * | 1979-03-23 | 1982-08-24 | Burroughs Corporation | Pipelined interpretive digital data processor comprised of a multi-level hierarchy of processors |
US4384324A (en) * | 1980-05-06 | 1983-05-17 | Burroughs Corporation | Microprogrammed digital data processing system employing tasking at a microinstruction level |
-
1981
- 1981-02-04 US US06/231,553 patent/US4459659A/en not_active Expired - Lifetime
- 1981-10-20 DE DE8181304886T patent/DE3171416D1/de not_active Expired
- 1981-10-20 EP EP81304886A patent/EP0057312B1/de not_active Expired
-
1982
- 1982-01-18 JP JP57006720A patent/JPS57143642A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
US4459659A (en) | 1984-07-10 |
JPS57143642A (en) | 1982-09-04 |
EP0057312A2 (de) | 1982-08-11 |
EP0057312A3 (en) | 1982-08-18 |
JPH0373010B2 (de) | 1991-11-20 |
EP0057312B1 (de) | 1985-07-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8328 | Change in the person/name/address of the agent |
Free format text: EISENFUEHR, G., DIPL.-ING. SPEISER, D., DIPL.-ING., PAT.-ANW., 2800 BREMEN |
|
8339 | Ceased/non-payment of the annual fee |