DE3152748A1 - Manufacturing process for printed circuit boards and printed circuit boards produced by the said process - Google Patents
Manufacturing process for printed circuit boards and printed circuit boards produced by the said processInfo
- Publication number
- DE3152748A1 DE3152748A1 DE19813152748 DE3152748A DE3152748A1 DE 3152748 A1 DE3152748 A1 DE 3152748A1 DE 19813152748 DE19813152748 DE 19813152748 DE 3152748 A DE3152748 A DE 3152748A DE 3152748 A1 DE3152748 A1 DE 3152748A1
- Authority
- DE
- Germany
- Prior art keywords
- circuit boards
- printed circuit
- conductor tracks
- base material
- solution
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/26—Cleaning or polishing of the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0753—Insulation
- H05K2201/0761—Insulation resistance, e.g. of the surface of the PCB between the conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0779—Treatments involving liquids, e.g. plating, rinsing characterised by the specific liquids involved
- H05K2203/0786—Using an aqueous solution, e.g. for cleaning or during drilling of holes
- H05K2203/0796—Oxidant in aqueous solution, e.g. permanganate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1407—Applying catalyst before applying plating resist
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
- H05K3/182—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
- H05K3/184—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method using masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
- H05K3/387—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive for electroless plating
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
Die vorliegende Erfindung betrifft ein Verfahren zum Her-The present invention relates to a method for producing
stellen von Leiterplatten nach dem Voll- bzw. Semi-Additiv-Verfahren auf mit Haftvermittler beschichtetem Basismaterial, bei welchem zunächst die Leiterzüge in an sich bekannter Weise hergestellt werden, und in einem nachfolgenden Verfahrensschritt die zwischen den Leiterzügen freiliegende Haftvermittlerschicht zum Teil bzw. zur Gänze abgetragen wird. Diese Aufgabe wird erfindungsgemäß durch die im Patentanspruch 1 angegebenen Merkmale gelöst. Vorteilhafte Weiterbildungen sind den Unteransprüchen zu entnehmen.production of printed circuit boards according to the full or semi-additive process on base material coated with adhesion promoter, in which first the conductor tracks be prepared in a manner known per se, and in a subsequent process step the adhesion promoter layer exposed between the conductor tracks in part or in part Entirely removed. This object is achieved according to the invention by the claims 1 specified features solved. Advantageous further developments are the subclaims refer to.
Bei derartigen, unter den Bezeichungen "Voll-Additiv"- bzw.With such, under the designation "full additive" or
~Semi-Additiv"-Verfahren bekannt gewordenen Herstellprozessen wird beispielsweise von Phenolharzpapier-Laminaten, glasfaserverstärkten Epoxydharz-Schichtpreßstoffen und dergleichen ausgegangen. Um eine verläßliche Verankerung von beispielsweise durch stromlose Metallabscheidungsprozesse hergestellten Leiterzügen auf solchen Basismaterialien zu erzielen, ist es bekannt, deren Oberfläche mit Haftvermittlerschichten, beispielsweise entsprechend DE-PS 16 64 314 zu versehen, nach dem Aufbringen einer solchen Schicht die Oberfläche zumindest teilweise auszuhärten und anschließend durch Behandlung mit geeigneten Badlösungen benetzbar und mikroporös zu machen. Auf der so vorbereiteten Oberfläche wird sodann das gewünschte Leiterzugmuster mittels bekannter Metallabscheidungsverfahren aufgebaut.~ Semi-additive "manufacturing processes that have become known for example phenolic resin paper laminates, glass fiber reinforced epoxy resin laminates and the like assumed. For a reliable anchorage of, for example Conductor tracks produced by electroless metal deposition processes on such To achieve base materials, it is known to have their surface coated with adhesion promoter layers, for example, according to DE-PS 16 64 314, after applying a such layer to at least partially cure the surface and then to make them wettable and microporous by treatment with suitable bath solutions. The desired circuit pattern is then applied to the surface prepared in this way known metal deposition process.
Mit den insbesondere bei Leiterplatten mit sehr geringen Abständen zwischen benachbarten Leiterzügen, sogenannten Feinleiterplatten, gestiegenen Anforderungen an den Oberflächenisolationswiderstand hat es sich bei den bekannt gewordenen Verfahren als nachteilig erwiesen, daß die mit Haftvermittlerschichten erzielbaren Werte nicht an jene Oberflächenwiderstände heranreichen, wie sie beispielsweise für nicht mit Haftvermittler beschichtete Epoxydharzlaminate oder Polyimide typisch sind bzw. für Feinleiterplatten gewünscht werden.With the especially with circuit boards with very small distances between adjacent conductor tracks, so-called fine circuit boards, increased requirements the surface insulation resistance has become apparent in the case of the methods that have become known It has been found to be disadvantageous that the values that can be achieved with adhesion promoter layers cannot be achieved come close to those surface resistances, such as those for not with Epoxy resin laminates or polyimides coated with adhesion promoters are typical or for fine circuit boards are desired.
Wird in bekannter Weise der als Basismaterial dienende Isolierstofftr#ger mit einem üblichen Haftvermittler auf Phenolharz/Gummibasis beschichtet, dieser ausgehärtet und durch Behandlung mit einer Chromschwefelsäurelösung polar und mikroporös gemacht, und die Haftvermittlerschichtober£läche anschließend mit bekannten, Zinn/Palladiu:#-Verbindungen enthaltenden Katalysatorlösungen behandelt, so werden diese Verbindungen adsorptiv an der Oberfläche angelagert und bilden so, gegebenenfalls nach entsprechender Behandlung, für die stromlose Metallabscheidung katalytisch wirksame Zentren.Is the insulating material used as the base material in a known manner coated with a conventional phenolic resin / rubber-based adhesion promoter, this one cured and polar and by treatment with a chromic acid solution microporous made, and the adhesion promoter layer surface then with known, tin / Palladio: # compounds Treated containing catalyst solutions, these compounds are adsorptive accumulated on the surface and form, if necessary after appropriate treatment, catalytically active centers for electroless metal deposition.
Dies erfolgt in der Regel durch Behandlung mit geeigneten Spülbädern, die einmal den Überschuß der Katalysatorlösung entfernen, und zum anderen die Überführung der Palladiumverbindungen in katalytisch besonders wirksame Keime#bewirken. Gleichzeitig kommt es zur Hydrolyse der Zinnverbindungen. Das Hydrolyseprodukt wird gleichfalls an der Oberfläche angelagert.This is usually done by treatment with suitable rinsing baths, which on the one hand remove the excess of the catalyst solution, and on the other hand the transfer of the palladium compounds in catalytically particularly effective germs #. Simultaneously there is hydrolysis of the tin compounds. The hydrolysis product is also deposited on the surface.
Bei dem Semi-Additiv-Verfahren wird sodann eine relativ dünne Metallschicht, in der Regel eine Kupferschicht, aus bekannten, ohne äußere Stromzufuhr arbeitenden Metallisierungsbädern abgeschieden.In the semi-additive process, a relatively thin metal layer is then usually a copper layer, made of known, working without an external power supply Metallization baths deposited.
Nach dem Aufbringen einer dem Negativ des gewünschten Leiterbildes entsprechenden Abdeckmaske wird dann in bekannter Weise,in der Regel galvanischin inden nicht abgedeckten Flächen Kupfer bis zur gewünschten Dicke abgeschieden. Falls erwünscht,kann hierauf die Abscheidung anderer Metalle wie Nickel, Gold oder lötfähiger Zinn/Blei-Legierungen erfolgen.After applying one of the negative of the desired conductor pattern The corresponding cover mask is then applied in a known manner, usually by electroplating In the uncovered areas copper is deposited to the desired thickness. If other metals such as nickel, gold or other metals that can be soldered can be deposited on this Tin / lead alloys are made.
Sollen Leiterplatten mit beidseitigem Leiterzugmuster und Löchern mit metallisierten Lochwandungen hergestellt werden, so werden die Löcher bereits vor dem Katalysieren angebracht und im übrigen wird in analoger Weise, wie oben beschrieben, verfahren. Hierauf wird die Abdeckmaskenschicht entfernt und die dünne, stromlos aufgebrachte Kupferschicht mittels eines zeitlich entsprechend bemessenen Atzschrittes entfernt.Shall printed circuit boards with double-sided circuit pattern and holes are made with metallized hole walls, so the holes are already attached before the catalyzing and otherwise in an analogous manner as above described, proceed. The masking layer is then removed and the thin, Electrically applied copper layer by means of an appropriately timed Removed etching step.
Es hat sich gezeigt, daß sich durch die angelagerten, auch durch den Kupferätzschritt nicht entfernten Katalysatorreste einschließlich der Zinnverbindungen der Oberflächenwiderstand noch in beträchtlichem Umfang über den für den Haftvermittler selbst geltenden Wert hinaus verschlechtert.It has been shown that through the annexed, also through the Copper etching step not removed catalyst residues including the tin compounds the surface resistance still to a considerable extent over the the value applicable to the adhesion promoter itself also deteriorates.
Dieser Effekt tritt besonders dann störend auf, wenn Haftvermittlerschichten mit Zusammensetzungen verwendet werden, die an sich noch relativ gute Oberflächenwiderstände erbringen.This effect occurs particularly troublesome when there are adhesion promoter layers can be used with compositions which in themselves still have relatively good surface resistances provide.
Es hat in der Vergangenheit nicht an Versuchen gefehlt, die Oberfläche des Haftvermittlers durch Nachbehandlung mit Reinigungslösungen von den angelagerten Produkten zu befreien.There has been no shortage of attempts in the past, the surface of the adhesion promoter by post-treatment with cleaning solutions from the accumulated Free products.
Beispielsweise wird in DE-AS 12 06 976 ein Verfahren zum Herstellen von Leiterplatten nach dem Additiv;Verfahren beschrieben, bei dem ebenfalls nach dem Ausbilden der Leiterzüge die zwischen diesen befindliche Haftvermittlerschicht abgetragen werden soll. Es wird aber offen gelassen, wie hierzu verfahren werden soll. Weiterhin wird in DE-AS 16 44 709 ein Verfahren zum Entfernen von zwischen Leiterzügen befindlichen Klebstoffresten beschrieben und hierfür Chromschwefelsäure vorgeschlagen. Dieses Verfahren bezieht sich aber ausschließlich auf Trägerplatten aus Polyolefin und einen Klebstoff bestehend aus dem Reaktionsprodukt eines Glykols mit 2 bis 6 Kohlenstoffatomen und einer dibasischen Säure mit 6 bis 12 Kohlenstoffatomen. Das beschriebene Verfahren eignet sich aber ausschließlich für die angegebenen Materialien.For example, in DE-AS 12 06 976 a method for manufacturing of printed circuit boards after the additive; method described in which also after the formation of the conductor tracks, the adhesion promoter layer located between them should be removed. However, it is left open how this is done target. Furthermore, in DE-AS 16 44 709 a method for removing between Adhesive residues located on conductor tracks are described and chromosulfuric acid for this purpose suggested. However, this procedure only applies to carrier plates made of polyolefin and an adhesive consisting of the reaction product of a glycol having 2 to 6 carbon atoms and a dibasic acid having 6 to 12 carbon atoms. However, the method described is only suitable for the specified materials.
Die heute für starre Leiterplatten üblichen Materi lien und Haftvermittler würden durch eine solche Behandlung stark angegriffen und eine Unterätzung der Leiterzüge wäre die Folge.The materials and adhesion promoters commonly used today for rigid printed circuit boards would be severely attacked by such a treatment and an undercut of the conductor tracks would be the result.
Nach der vorliegenden Erfindung werden die oben beschriebenen Nachteile dadurch vollkommen vermieden, daß nach der Fertigstellung des Leiterzugmusters die zwischen den Leiterzügen befindliche Haftvermittlerschicht zum Teil oder vollständig entfernt wird.According to the present invention, the disadvantages described above become obsolete thereby completely avoided that after the completion of the ladder pattern Part or all of the adhesion promoter layer located between the conductor tracks Will get removed.
Versuche, den ausgehärteten Haftvermittler mit organischen Lösungsmitteln wie Methyläthylketon oder halogenierten Kohlenwasserstoffen wieder in Lösung zu bringen, scheitern daran, daß durch eine solche Behandlung das Basismaterial selbst in unzulässiger Weise angegriffen wird.Attempt the cured adhesion promoter with organic solvents like methyl ethyl ketone or halogenated hydrocarbons back into solution bring, fail because by such a treatment the base material itself attacked in an improper manner.
Stzlösúngen wie die zum Herstellen der polaren und mikroporösen Haftvermittler-Oberflächenschicht benutzte Chrom- schwefel säure führt zum Abtrag des Leiterzugkupfers und vor allem in störender Weise zur Unterätzung der Leiterzüge.Assembly solutions such as those for producing the polar and microporous adhesion promoter surface layer used chrome Sulphuric acid leads to the wear of the conductor run copper and above all in a disruptive way to undercut the conductor tracks.
Entsprechend der vorliegenden Erfindung werden diese Nachteile vollständig vermieden, wenn zum Entfernen des Haftvermittlers eine Chromsäure-Lösung verwendet wird. Diese entfernt die Haftvermittlerschicht nach Wunsch teilweise oder vollkommen, ohne daß nachteilige Einwirkungen festgestellt werden können.According to the present invention, these disadvantages are eliminated avoided if a chromic acid solution is used to remove the adhesion promoter will. This removes the adhesion promoter layer partially or completely as desired, without adverse effects can be determined.
Durch die Verwendung der erfindungsgemäßen Lösung zum Abtragen des Haftvermittlers wird also in überraschender Weise erreicht, daß ohne jede nachteilige Wirkung auf Basismaterial und Leiterzüge und deren Verankerung der Oberflächenwiderstand wesentlich verbessert und erforderlichenfalls bis auf den Wert des verwendeten Basismaterials selbst gebracht wird.By using the solution according to the invention to remove the Adhesion promoter is achieved in a surprising way that without any disadvantageous Effect on base material and conductor tracks and their anchoring of surface resistance significantly improved and, if necessary, down to the value of the base material used is brought by yourself.
Beispiel Eine in bekannter Weise auf einem mit Haftvermittler beschichteten Basismaterial nach dem Semi-Additiv-Verfahren hergestellte gedruckte Leiterplatte weist typisch, und je nach verwendetem Haftvermittler, einen Oberflächenwiderstand von beispielsweise 1,3 x 109 Ohm auf. Example One in a known manner on one coated with an adhesion promoter Base material printed circuit board manufactured using the semi-additive process Typically, and depending on the adhesion promoter used, has a surface resistance of, for example, 1.3 x 109 ohms.
Entsprechend der Erfindung wird die Leiterplatte zur Verbesserung des Oberflächenwiderstandes mit einer wässrigen Lösung von 900 g/l CrO3 bei einer Badtemperatur von 50 -0C für 2 Minuten behandelt. Anschließend wird die Leiterplatte in Wasser gespült und danach mit einer Lösung, die ein Reduktionsmittel für 6-wertiges Chrom enthält,# wie beispielsweise Eisen(II)sulfat, Natriumsulfit oder Formaldehyd, behandelt, dann in Leitungswasser und anschließend in deionisiertem Wasser gespült und getrocknet.According to the invention, the circuit board is for improvement of the surface resistance with an aqueous solution of 900 g / l CrO3 at a Treated bath temperature of 50 -0C for 2 minutes. Then the circuit board rinsed in water and then with a solution containing a reducing agent for hexavalent Contains chromium, # such as iron (II) sulfate, sodium sulfite or formaldehyde, treated, then rinsed in tap water and then in deionized water and dried.
Durch diese Behandlung wurde die ca. 30 ß starke Haftvermittlerschicht vollkommen entfernt.Through this treatment, the approximately 30 ß thick adhesion promoter layer completely removed.
12 Der gemessene Oberflächenwiderstand betrug 10 Ohm, wurde also gegenüber dem Ausgangszustand um fast drei Zehnerpotenzen verbessert. 12 The measured surface resistance was 10 ohms, so it was improved by almost three powers of ten compared to the initial state.
Es können somit nach dem Verfahren der vorliegenden Erfindung Leiterplatten hergestellt werden, die allen derzeit bestehenden und für die Zukunft zu erwartenden Ansprüchen voll genügen.It can thus be printed circuit boards according to the method of the present invention all currently existing and expected for the future Satisfy claims in full.
Die Erfindung ist beispielhaft für nach dem Semi-Additiv-Verfahren in der beschriebenen Weise hergestellte Leiterplatten beschrieben, kann jedoch in gleicher Weise auch für nach anderen, beispielsweise dem Voll-Additiv-Verfahren hergestellte Leiterplatten benutzt werden.The invention is exemplary of the semi-additive process Printed circuit boards manufactured in the manner described, but can be in in the same way for others, for example the full additive process manufactured circuit boards are used.
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19813152748 DE3152748C2 (en) | 1981-03-18 | 1981-03-18 | Manufacturing process for and according to this process printed circuit boards |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19813152748 DE3152748C2 (en) | 1981-03-18 | 1981-03-18 | Manufacturing process for and according to this process printed circuit boards |
DE3110415A DE3110415C2 (en) | 1981-03-18 | 1981-03-18 | Process for the manufacture of printed circuit boards |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3152748A1 true DE3152748A1 (en) | 1983-07-07 |
DE3152748C2 DE3152748C2 (en) | 1984-01-19 |
Family
ID=25791891
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19813152748 Expired DE3152748C2 (en) | 1981-03-18 | 1981-03-18 | Manufacturing process for and according to this process printed circuit boards |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE3152748C2 (en) |
-
1981
- 1981-03-18 DE DE19813152748 patent/DE3152748C2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE3152748C2 (en) | 1984-01-19 |
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