DE3143429C2 - - Google Patents

Description

The invention relates to a circuit for transforming first data values representing the intersections between the radial rays and the one concentric to the origin of the radial rays Arcs of a polar coordinate system are assigned in second data values that correspond to the rows and columns of a Cartesian coordinate system assigned to arranged pixels with a memory for the first data values and a retrieval device for reading selected first data values from the memory and forming the second data values in Dependence on the representation of the in the Cartesian coordinate system arranged pixels.

Such a circuit is known from US-PS 40 02 827. This circuit is used by a radar in Polar coordinates delivered data values into second data values implement, which is then in a television format, d. H. in one Cartesian coordinate system. To for this purpose the known circuit assigns the in Polar coordinates ordered data in the corresponding Cartesian coordinates, what by reading into a Memory happens, which then depends on the representation the pixels arranged in the Cartesian coordinate system is scanned. That there is no complete coverage between the location of the pixels in the polar coordinate system and the location the pixels can be produced in the Cartesian coordinate system is neglected in the known circuit. As well is only in the data between the presence and absence of a signal because radar images have no gray scale to have.

It is also known to use a similar circuit in devices like Apply ultrasound scanners used to generate Mapping a cross-section of the heart or another Organs of the patient are used, and in which the Data values analog information along the radial rays of a Represent sector. The reproduction of the images in the same However, format is not perfect because of the spaces between the radial lines formed by the radial rays. As a consequence, the modern approach is to to scan the data along radial rays and the sampled data in a digital display memory to register what is sometimes called a digital "scan converter" referred to as.

A description of this approach can be found in the article "Digital Scan Converters in Diagnostic Ultra-Sound Imaging" in Proceedings IEEE, Volume 67, No. 4, April 1979. Samples of the analog data along each radial line are obtained at points that are uniform have a mutual distance of such a dimension that the Nyquist criterion is met. Their x and y coordinates are determined from their R and R coordinates, and the samples are transferred to a display memory at the closest display point. Using this point-to-point translation instead of true image reconstruction creates a number of problems. The most important is the appearance of Moir 'patterns, which result from the fact that some display points in the display memory do not receive any information.

The moir 'pattern can be eliminated by insertion methods be, e.g. B. by inserting the translated value of a neighboring point into an empty display point. This will, however introduced artificial borders or discontinuities in the image, which are very disadvantageous.

Another attempt to solve the Moir problem is that one or more radial lines of interpolated data inserted between the actual radial lines before the information in the display points of the display memory is set as described above. While doing that The Moir pattern is eliminated, the facts cause many Display points received more than one sample and that only the last received sample value is reproduced in the image, Discontinuities that often turn out to be artificial contrasts and manifest radial distortion of the image. Attempted solutions Among other things, a peak value acquisition was for this problem or averaging over the given in a Display point of written samples. Although this is an improvement means it doesn't basically solve that Problem. In addition, the operations "read-modify- Write "a complex circuit that is used in the current State of the art does not work fast enough as it does for real-time operation at the desired sector scan speed of thirty per second would be required.

Accordingly, the invention has for its object a circuit to create the transformation of one into polar coordinates captured image in a in Cartesian coordinates image to be displayed without an inadmissible Change of image content takes place, although different Grayscale are to be shown and the places where the in Cartesian coordinate system, pixels to be displayed appear cannot be made to coincide with the locations where the pixels recorded in the polar coordinate system are located.

This object is achieved according to the invention in that the Retrieval device for each pixel from the memory at least reads four first data values, which are the intersections between two radial beams and two arcs are assigned, which Intersection points including the respective image point Define rectangle, and that an arithmetic circuit exists is the second assigned to the respective pixel Data value by interpolation of the first four read out Data values calculated.

The circuit according to the invention therefore does not simply translate the first data values from points of the sector in selected Points in memory but has facilities that store data or select samples that differ at points radial lines and define an undercut. Out an interpolated second becomes these selected samples Data value derived for each pixel or display point that in the undercut is included so that a true Reconstruction of the image generated over the entire area becomes. Generally, but not necessarily the selected samples at the intersection of two radial arcs with two radial lines so that the Reference area inner and outer radial and angular limits Has. It can be used to interpolate the first data or Samples a first and a second interpolated Intermediate data value at the radial position of each display point from the pair of samples along each radial line or at the angular position of each display point from the pairs of Samples along each radial arc are derived. If these first and second intermediate data values at the radial Position of a display point will be derived from them a final interpolated data value at the angular position of the sampling point. If the first and second Intermediate data values at the angular position of a display point can be derived from them, a final interpolated Data value at the radial position of the display point derived. The radial position of a display point is his radial location in relation to the radial arcs that are on its two sides are located, and its angular position is an angular location with respect to the radial lines that are on its two sides. As will be explained later can derive more than one pair of data samples of the first and the second interpolated intermediate data value to be used. The interpolation in one or both of the radial and angular directions can be done with an arbitrarily chosen interpolation function. In the present Example, interpolation with a straight line was chosen, however, it would also be possible with a cosine function.

When the areas of an image are reconstructed in this way the problems with Moir´ patterns and others disappear above-mentioned interference signals in a simple manner, provided that every display point in the sector is addressed.

Since there are approximately 125,000 display points in a sector, it is obvious that the determination of their radial and angular positions and the said interpolation cannot be carried out in a thirtieth of a second during which the sector is scanned by direct calculations based on the x and y coordinates of the display points and the R and R positions of the data samples are based.

An important embodiment of this invention is therefore that Means are provided by means of which these calculations can be done in real time. This configuration is the subject of subclaims 7 to 11 for which Protection only in combination with the overarching requirements is desired. In this embodiment of the invention scanned sector divided into sections, each between successive radial lines lie, and there will be Scan control signals are provided for the display points, which is a step-by-step scan along the lines and display columns of display points in succession in each section.

The radial position of each display point within a sub-cut is determined by recursively adding or subtracting a known value for each step along a row of display points and another stored value for each step along a column of display points to and from the known radius one in advance scanned display point. The fraction of the recursive addition is the desired radial weighting and is referred to below as RERR .

The angular position of each display point within a sub-cut is determined by recursively adding a stored value for each cut along a row of display points and another stored value for each step along a column of display points to a known distance (called COUNT) from a previously sampled display point from one of the radial lines of a section measured along a line of display points in which the display point is located, such that the signal or the value of the COUNT for each display point is derived. Another recursive addition is performed with a given stored value for each step along a column of display points to the known distance between the radial lines of a cut along a given line of display points such that a signal or value XHAT is derived for each display point . The signals COUNT for each display point can be divided by the signal XHAT for that point, whereby a signal or value R ERR is obtained which represents the angular position. There is a minimal error with respect to the true angular position, expressed as the ratio of arc lengths between a display point and the radial lines of the cut when the angle between the radial lines is small.

The time saved for these calculations results from the short time required for each recursive addition, in contrast to the time that would otherwise be required for a forward calculation of the radius and angle. Please refer to the calculations of RERR and R ERR described below.

If the data samples represent brightness, e.g. B. in an ultrasound system, only five bits are required to represent the 32 different brightness levels that can be reproduced on a cathode ray tube. Therefore, only five bits are required to represent the final values of RERR, COUNT, XHAT and R EER . When performing the recursive addition, however, a larger number of bits, e.g. B. 12, used to keep the amount of accumulated error to an acceptable level.

The interpolations can be accomplished in a very short time by multiplication with read only memories (ROMs) and reasonably sized ROMs can be used, since both the brightness samples and the values of RERR and R EER used in the interpolations are only five bits to have.

Basics of the recursive calculations and stored values used

To make the notation easier, the middle radial line is defined as zero degrees. All angles are related to this and are considered positive, ie the plus sign 45 ° radial line lies along both sides of a 90 ° sector. With reference to a section, the "outer" radial line R ₀ has the larger angle designated R ₂ and the "inner" radial line R _I has the smaller angle designated R ₁.

RERR

The recursive relationship changes the previous radius value by an incremental amount determined by the direction traversed between the previous point (j) and the new point (j +1). If this movement is left or right in the x direction, K _y = 0. Conversely, if the movement goes in the y direction, up or down, K _x = 0. If the movement in the x direction is directed to the center line of the sector, K _{x is} positive, which leads to an incremental decrease in the radius by K _x sin R ₂. Conversely, for an outward movement in the x direction K _{x is} negative, which leads to an incremental increase by K _x sin R ₂. If the y- direction moves away from the sector's apex, K _{y is} negative and if the y- direction movement leads to the vertex, K _{y is} negative.

The error weights RERR and R ERR, which are required for each display point, apparently require the explicit calculation of the radius R and the angle R , where R is the angle between a vertical line through the center of the sector and a line through the display point to the vertex of the sector intersection is. This means for the jth display point

where x _j and y _{j are} the rectangular coordinates of the j th display point and

However, it can be shown that equation (1) alternatively consists of a recursive approximation that can be calculated from a Taylor series approximation results, which is given by

R _{j + 1} = R _j - K _x sin R ₂ + K _y cos R ₂ (3)

where R ₂ represents the angle of the outer beam of two radial beams that define the sector intersection.

R ERR

It can be shown that the stored value Δ XHAT, which is added at each step of the scanned paths along a column of display points to derive XHAT for each display point, is tan R ₂- tan R ₁, where R ₂ is the angle between the Ray R = 0 ° and the outer radial line of a cut, and R ₁ are the angle between the beam R = 0 ° and the inner radial line of a cut. The same applies accordingly

XHAT _{j + 1} = XHAT _j + XHAT K _y (4)

It can also be shown that

COUNT _{j + 1} = COUNT _j + K _x + K _y tan R ₂ (5)

the value of tan R ₂ is stored for each cut.

The invention is described in the following using exemplary embodiments in Connection explained with the accompanying drawing. In the drawing demonstrate

Fig. 1 shows the basic components of a scanning system (scan conversion);

Fig. 1A, B and C are graphical representations of the functions of the components in FIG. 1;

Fig. 2 illustrates radial lines and an array of rows and columns of display points used in explaining the interpolations to be performed in accordance with the invention;

FIG. 3 shows two pairs of radial lines, which is used to explain the basic calculations used according to the invention;

Fig. 4 is a general block diagram of a scanning system incorporating the subject of the invention;

FIG. M (in FIG. 7) shows the composition of FIGS. 5, 6, 7, 8 and 10 to form a complete block diagram of the preferred embodiment of the invention;

Figures 5, 6, 7, 8 and 10 show the details of the preferred embodiment of the invention;

FIG. 4A is an alternative interpolation that can be used in the circuit of Fig. 4;

5A in the form of digital information, such as may be supplied by a scanning system.

Fig. 6A and B truth tables for the multiplexer in Fig. 6;

Fig. 7A details of an address control counter in Fig. 7;

Fig. 7B, 7B₁, B₂ and B₃ the operation of a translation ROM in Fig. 7;

FIG. 8A is a truth table for the ROM in FIG. 8 used to calculate the radial position of a display point;

Fig. 8B shows the details of a radius counter in Fig. 8;

Fig. 8C is the truth table of a ROM in Fig. 8 used for calculating the angular position of a display point;

Fig. 9 graphically illustrates the operation of the preferred embodiment of the invention;

Fig. 11 and 12, timing diagrams of various signals;

Fig. 13 shows an alternative embodiment of the invention needed to perform the interpolation fewer components;

Fig. 14 shows a further alternative embodiment of the invention that requires a single ROM for the implementation of interpolation; and

Fig. 15 shows a further alternative embodiment of the invention, in which the values of RERR and R ERR and the interpolation can be determined with a single ROM.

The block diagram of FIG. 1 shows the basic components of a digital scan converter imaging system of the type to which the invention relates. A scanner 20 sends acoustic pulses into a patient's body by means not shown, and generates an analog signal representing the amplitudes of echoes received from structures of the body along a number of radial lines of a sector shown in Figure 1A lie. Only a few radial lines are shown. When the analog signal is received, uniformly spaced digital samples (indicated by the dots in FIG. 1A) along each radial line are derived by an A / D converter 22 and supplied to the scan converter system 24 . In general, as can occur in a system incorporating the invention, the first data sample at the origin is zero of the sector and the other samples are at the intersection of the radial lines of the sector with evenly spaced radial arcs so that the data samples are also distributed along the arches.

As stated above, the function of the scan converter system 24 is to write digital data values derived from the data samples into appropriate display points in a display memory 26 , which are effectively arranged along orthogonal rows and columns, such as by the characters + in Fig. 1B is illustrated. To do this, the scan converter system provides the data value to be written and the x and y coordinates of the display point in the display memory 26 where it is to be added. Once the data has been stored in the memory 26 , it can be read out from suitable x and y coordinate points by means of a reading device 28 and placed in corresponding coordinate points of a display device 30 , as indicated by the characters + in FIG. 1C.

Basic principles of the invention

Fig. 2 is an enlarged view of a portion of the sector shown in Fig. 1A, in which the data sampling points are shown as points appearing along radial lines R ₂ to R ₅ at the intersection of these radial lines with radial arcs A ₁₀ to A ₁₃, which have the uniform distance s from each other. Each data sample point is identified by the letter S with an index equal to the radial line on which it appears and an index equal to the arc on which it appears. The data sampling points are thus distributed along the arcs. The sampling points of the display memory ( 26 in FIG. 1) are represented by the characters +, which are arranged in orthogonal rows and columns which are parallel to the x and y axes. To simplify the drawing, parts of the radial lines R ₂ to R ₅ have been omitted, but the x axis, although not shown, goes through the origin zero, at which there is a display point. The distances between the rows of the display points are K _y and the distances between the columns of the display points are K _x .

In order to determine a final interpolated data value to be used as a display point such as DP , a signal RERR ' representing the radial distance between DP and the arc A ₁₁ and a signal R ERR' representing the angular displacement between DP and the represents radial line R ₃ derived. RERR ' and R ERR' thus represent the radial or angular position of the display point DP relative to A ₁₁ and R ₃. A first interpolated intermediate data value I ₁ can be at the radial position of DP along the radius R ₃ by linear interpolation between the Derive data samples at S ₃¹¹ and S ₃¹² according to the following expression, in which an * denotes the value of a data sample:

Similarly, a second interpolated intermediate data value I ₂ at the radial position of DP along the radius R ₄ can be derived by linear interpolation of the data samples at S ₄¹¹ and S ₄¹² according to the following expression:

The final interpolated data value FDP for DP can be derived at its angular position by linear interpolation of the first and second interpolated intermediate data values I ₁ and I ₂ in accordance with the expression:

instead of calculating R ERR ' , a value COUNT, which is the distance between DP and R ₃ measured along the line of display points by DP , and a value XHAT , which is the distance between R ₃ and R ₄ measured along the same line from Display points. It can be shown that COUNT is proportional to XHAT when R ERR 'is proportional to R. The final interpolated data value at the display point DP can be determined by the following expression, in which XHAT replaces the quantity R in equation (8) and COUNT replaces the R ERR ′ :

The final interpolated data value for the display point DP could be derived just as easily if the order of the interpolation were exchanged, ie a first interpolated intermediate data value I ₁ 'could be derived at the angular position DP along the arc A ₁₁ using the formula:

and a second interpolated intermediate data value I ₂ 'could be obtained at the angular position of DP along the arc A ₁₂ using the formula:

The final interpolated value FDP is then given by the following expression:

As is obvious, the calculation of these equations can be carried out more easily if the radial position is represented by a signal RERR = RERR ' / s and the angular position is represented by a signal R ERR' = COUNT / XHAT . RERR is the fractional position of DP between A ₁₁ and A ₁₂, and R ERR ' is the fractional position of DP between the radius lines R ₃ and R ₄. So z. B. from equation (6):

I ₁ = S ₃¹¹ * (1- RERR) + S ₃¹² * · RERR (6 ′)

and equation (1) becomes

FDP = I ₁ 1- (R ERR ') ₂ + I · R ERR' (9 ')

With both calculation methods, it should be noted that the first interpolated intermediate data value is derived by interpolating data samples along one of the radial or angular directions lying on one side of DP in the other direction and that the second interpolated intermediate data value is obtained by interpolating data -Samples are derived which are on the other side of DP in the same radial or angular direction. In the first method, the first interpolated intermediate data I ₁ was derived by finding an interpolated value of S ₃¹¹ * and S ₃¹² * lying on the left side of DP in an angular direction, and the second interpolated intermediate data I ₂ was derived by interpolating from S ₄¹¹ * and S ₄¹² *, which are on the right side of DP in an angular direction. If the angle between R ₃ and R ₄ is small, I ₁, I ₂ and DP lie on a substantially straight line since there is little difference between the chord and the bow. Similarly, in the second method, I ₁ 'was derived by interpolating S ₃¹¹ * and S ₄¹¹ * lying along the arc A ₁₁ and on one side of DP in a radial direction, and I ₂' was derived by interpolating from S ₃¹² * and S ₄¹² *, which lie along the arc A ₁₂ and on the other side of DP in the radial direction.

While the above description represents a manner in which a scan converter system according to the invention can operate, other possibilities are also easily conceivable, e.g. B. the derivation of I ₁ by interpolation of four data samples along R ₄, or in the second method by interpolation of four data samples along the arc A ₁₁ to derive I ₁ 'and by interpolation of four data samples along the arc A ₁₂ to derive of I ₂ ′. Another method is to derive additional interpolated values I ₁ _B and I₁ _C in the same way as I ₁ and I ₂ and to interpolate them all in the angular direction and thus to obtain the final interpolated value of DP . Similarly, interpolated values I ₁ _A 'could be derived from the data samples along A ₁₀ and I ₂ _B ' from the data samples along A ₁₃ and these could in turn be interpolated in the radial direction, thereby obtaining the final interpolated data at DP . Another method is to use data samples at four sample points further away from DP , e.g. B. S ₂¹⁰, S ₅¹⁰; S ₂¹³ and S ₅¹³, which define an area which contains DP .

An approximation by a straight line has been described for the described interpolation, however, any non-linear interpolation method can also be used to obtain an interpolated value at the radial or angular position of DP . The type of interpolation only changes the weighting factor that must be given to the data samples.

Basics of the calculation

As stated above, the calculations of all of the above interpolated display values in a sector by direct methods would take far too much time to allow real-time operation with instruments such as ultrasound scanning systems that scan a sector in a thirtieth of a second. For an explanation of the principles on which the calculations according to the invention are based, reference is made to FIG. 3. Two radius lines from a scanner, an outer line R ₀ and a linear line R _I , which define a section, are shown so that they form angles R ₂ and R ₁ with a column of display points along the y axis, which the Axis of the sector is. In order to be able to represent the concepts involved, the angle R ₂- R ₁ between the lines R ₀ and R ₁ has been greatly exaggerated (about 10 ° instead of the generally used ¾ ° or 1½ °).

Calculation of RERR

The basis of the calculation ofRERR can be understood if one at a display pointDP₁ inFig. 3 starts on the outer radius lineR₀ lies and watches what happens when one step along thex-Axis towards zero origin to a neighboring display pointDP₂ is made in one distanceK _x from the display pointDP₁ lies. If fromR₀ throughDP₂ one Is pulled perpendicular, is the acute angle of the so formed right triangleR₂ and theR₂ opposite side of this Triangle isK _x sinR₂. Subtract this amount from the radius of the Display pointDP₁ leads, no matter what it is, in our calculation to the smaller radius of the display pointDP₂ by the radius length R₂ is specified. That this is not completely correct arises from the fact that the actual radial distance fromDP₂ is the hypotenuse of the right triangle, of which R₂ is one side and therefore slightly smaller than the actual one Radius. If the step fromDP₂ afterDP₁ go, d. H. from the origin Zero away would be the amountK _x sinR₂ to that forDP₂ calculated Radius added. A step into the +y-Direction of lengthK _y to DP₃ adds a length of according to the calculation method K _y cosR₂, however, this also proves to be somewhat inaccurate because of radiusR₃ ofDP₃ is smaller than the real radius. It is however, a fact that these errors are negligible are whenR₂-R ₁ be 1½ ° or ¾ ° as usual.

Although the formulas and the device constructed according to them use the angle R ₂ of the outer radius line of each step in carrying out the radius calculation, one could also choose a different angle "close to" R ₂ which deviates from R ₂ by less than ΔR . Such a selection ensures that the errors are kept within acceptable tolerances.

The radius at origin 0 is zero. Therefore, if the above-mentioned sampling signals of the display point effect a step-by-step sampling of the sampling points of the section R ₀, R _I , starting from the origin 0, as shown by the broken line 31 , and if the value of K _x sin R ₂ is subtracted to the right for each step and added to the left for each step, and if K _y cos R ₂ is added for each step along the y axis from the origin, the radius of each display point in the scanning path can be sufficiently accurate according to quantitative errors can be determined for a display point that lies within the intersection limited by R ₀ and R _I.

While the value of the radius of a display point can be used in a manner yet to be described to prevent data from being written to the display memories , its more important function is to determine RERR so that the interpolations can be performed along the radial direction, described above.

For a format where | K _x | = | K _y | = | s | = 1, RERR is only a fraction of the number that represents the radius. However, if K _x is different from K _y and s , normalization methods can produce radius values measured in units of s so that the fraction is still RERR . This results in

R _{j + 1} = R _x - K _x sin R ₂ + K _y cos R ₂ (12)

Calculation of XHAT

XHAT was defined above as the distance between radius lines of a cut, e.g. B. R ₀ and R _I in Fig. 3, measured along a line of display points or along the x axis. When a perpendicular 32 is drawn from the y axis to the position of a display point 34 , the value of XHAT for display points in the same line can be derived as follows. If the number of increments of K _y between the origin 0 and the display point 34 is n , this results in accordance with FIG. 3

x = nK _y tan R ₂ (13)

and

x ′ = nK _y tan R ₁ (14)

and

XHAT = x - x ′ = nK _y tan R ₂- nK _y tan R ₁ (15)

A look at these equations shows that the value of XHAT increases by a constant amount Δ XHAT with every change of K _y along the y axis, so that:

Calculation of COUNT

As used in the system to be described, COUNT is the distance from the outer radius line z. B. R ₀ up to a display point measured along a row of display points that contains the display point for which the value of COUNT is sought. Since DP ₁ in Fig. 3 is on the outer line R ₀, its value COUNT is zero. The value of COUNT for DP ₂ is K _x . Accordingly, each step along a row of display points towards the centerline of the sector increases the value of COUNT by K _x (see DP ₄ ′ and DP ₄, in Fig. 3), and each step away from the centerline decreases the value of COUNT by K _x . However, if the step is along a row of display points or along the y axis in a direction away from origin 0, e.g. B. a step from DP ₁ to DP ₃, the value of COUNT is increased by K _y tan R ₂.

The value of COUNT for the display point at the origin is assumed to be zero. Therefore, if the values of + K _x , - K _x and K _y tan R ₂ are selected as mentioned above, the value of COUNT is obtained. Note that we are within the sector intersection whenever 0 COUNT < XHAT applies to each display point .

If COUNT is divided by XHAT, a fractional measure R ERR of the angular position of a display point between the radius lines R ₀ and R _{I of} a cut is obtained. Since RERR is a fraction of the radial distance of a display point between two data sample points, R ERR and RERR can be used in the same way in angular and radius interpolations.

If the value of COUNT is determined for steps in the right half of the sector, COUNT is still measured from the outer line, but as can be seen from Fig. 3, the outer line R ₀ 'is to the right of R _I ' instead left of it as in the case of R ₀ and R _I. If COUNT is still measured from the outer radius line R ₀ ′, the same calculation applies.

However, this does not mean that the fractional angular position of a display point must be measured from the outer line R ₀ or R ₀ '. You could e.g. B. also always be measured in relation to the left radius line, which is R ₀ in the left half of the sector and R _I in the right half. The calculations would be the same as just described for the left half, but one would have to swap + K _x and - K _x in the right half and -tan R ₂ would have to be used instead of + tan R ₂. As will be explained later, the latter could be entered into a ROM.

Although the final interpolated data values of the display points near the origin are generally unimportant, it is essential to obtain the values of RERR and R ERR for these points, since these values are used in the recursive addition to derive the values of RERR and R ERR are needed to calculate the final interpolated data values for display points of interest.

General system

The block diagram of FIG. 4 generally shows a scan converter system that incorporates the various aspects of the invention. Its function is to compute, on a real-time basis, the final interpolated data value for each of the approximately 125,000 display memory points that are within a 90 ° sector as shown in FIG. 1A and that is done approximately thirty times per second by a radial scanner ( 20 in Fig. 1) is scanned. This is achieved by determining the final interpolated data values for each display point of a section, ie the sampling points on or between a pair of radius lines and by repeating the operation for each subsequent section.

As shown in Fig. 4, a radial scanner 33 provides analog data obtained along each successive radius line to an A / D converter 35 which digitizes samples of the data occurring at uniformly spaced points along the radius lines, e.g. B. the samples S ₁₀, S ₁₁, S ₁₂, S ₁₃ on the radius line R ₀ and the samples S ₁₀ ', S ₁₁', S ₁₂ 'and S ₁₃' on the radius line R _I in Fig. 3. Since the A line identification device 36 is provided in the calculations used for each section of data, which derives an identification of the line just scanned from the signal of the scanner 33 . This can be done in a number of ways, e.g. By assigning a digital number to each line or by identifying a given line in a sector and counting the lines as they are scanned. The line identification signal thus derived is used by a write controller 38 to direct the digital data samples from the A / D converter 35 to memory locations in a memory 40 such that their radial positions along the lines are identifiable.

The following description relates to a device for deriving the signals RERR and R ERR, which represent the radial or angular position of a display point and are used in the interpolation process. Furthermore, the following description relates to a device for obtaining data samples from the memory 40 , which define an area which contains the sampling point.

A device 42 derives from the signal of the radial scanner 33 a signal STRTL which indicates the point in time at which the scanner begins the scanning process along a radius line. Upon each signal STRTL , a device DPSG generates display point scan control signals which represent the sequence of steps in one of the directions + x, - x, + y or - y , which must occur from a given display point, e.g. B. one at the origin of the radius lines when scanning over the display points of the cut that correspond to the line identified by the signal provided by the line identifier 36 .

Although the sequence of steps normally includes those in the + x -, -x and + y directions, as shown by the scan path for the display dots indicated by the dashed line 31 in FIG. 3, it would also be possible for steps in -y direction would be made. Means 46 emits a signal indicating that a step is being taken along the x axis; means 48 generates a signal indicating whether the step should be taken in the + x - or - x direction; means 50 outputs a signal indicating that a step is being taken along the y- axis, and means Ω outputs a signal indicating whether the step should go in the + y - or - y direction. The output signals of the devices 46 and 48 are fed to an x address counter 54 , and the x coordinate of the display point for which a final interpolated data value is to be calculated in a manner still to be explained is identified in relation to the x coordinate of the original display point. The output signals of devices 50 and 52 are fed to a y address counter 26 and the y coordinate of the same display point is identified with respect to the y coordinate of the original display point. The output signals of the x and y address counters 54 and 56 are given to address lines of a display memory DM in such a way that the final interpolated data value FDP for this point is put into the correct memory location after it has been determined.

Calculation of the radii

The determination of the radius of each display point, which is identified by the display point scanning signal from the generator DPSG , can be carried out as follows. The signal from the device 36 which identifies the line along which the radial position is to be determined in cooperation with the display point scan control signal from the generator DPSG selects from a memory 58 which may or may not be a ROM, the appropriate one of the values + K _x sin R , - K _x sin R , + K _y cos R or - K _y cos R , as explained in connection with FIG. 3, for the feed to the input of an adder 60 . The angle R is the angle of a radius line that is sufficiently close to the center line of the cut. How close it lies is determined by the error that can be tolerated in the angular position. The output of adder 60 is fed to a latch 62 which operates whenever a step is taken along the x or y axis, regardless of its direction. For this purpose, its clock input is connected to the output of an OR gate 64 , the inputs of which are connected to the outputs of the x counter 46 and the y counter 50 . The output of the buffer 62 is connected to a further input of the adder 60 . Together, the adder 60 and the buffer store 62 form an accumulator, which generates a signal at the output of the buffer store 62 , which increases the radius of the display point by adding all values of + K _x sin R , - K _x sin R , + K _y cos R or - represents K _y cos R , which were generated on all previous steps in the + x -, - x -, + y - and - y direction along the scan path which is predetermined by the scan control generator DPSG .

Selection of display points

At this point, it should be noted that while a final interpolated data value for each display point can be derived in the scan path determined by the signals from the DPSG , the time for this calculation to be performed for display points outside the cut (hereinafter referred to as overhang) using the following rules should be minimized.

• 1. At the sector vertex, where all scanning begins, increment outside the outline in the x direction.
• 2. Outside the outline and facing outwards, bend vertically and return in the transverse direction in the x direction ( change XDIR ).
• 3. If you are moving in the direction outside of a cut and there are no further points within the cut further outside on the currently crossed grid and there are no further points on the following line to cross, bend vertically and reverse direction ( change XDIR ). However, if there is another point within the intersection on the following line, continue crossing the current line for another point and then follow rule 2.
• 4. If moving towards the center of the sector, until the inside of the cut or inner line is reached, then bend vertically and reverse direction ( change XDIR ) after addressing the last display point within the current crossing, which lies within the cut.

In the case of points outside the cut, the final interpolated data value for this point should not be entered into the display memory DM , since it may very well be incorrect and can be read by a display memory scanner 66 and can be fed to the display device 68 . It would be in accordance with the spirit of the invention to lock the means for calculating the final interpolated data values for out-of-cut display points, rather than calculating the values and preventing the incorrect data from being stored in the display memory DM , thereby saving no time would. These considerations apply to all calculations.

Use of the radius R

As described above, the value of the radius R of the display point designated by the DPSG appears at the output of the buffer store 62 . Bits corresponding to R are fed to a comparator 70 where they are compared to the value of the maximum radius R _max which defines the outer radial boundary of the sector. If this comparison shows that the radius R of a display point is smaller than R _max , the comparator 70 supplies a signal ROK to an input of an AND gate 72 , the output signal of which is fed to an enable input of the display memory DM . In a manner yet to be described, a signal THETOK is derived which indicates that the display point is in the process of being cut, and this signal is fed to the other input of the AND gate 72 . Both signals ROK and THETOK must therefore be affirmative if the data value is to be written into the memory DM . The ROK signal is not as important as THETOK because incorrect final interpolated data values at some display points at the end of a cut do not pose as much of a problem as an incorrect data value inside the cut. The main advantage of ROK is that it smoothes the outer periphery of the sector.

Calculation of RERR

The value of R cannot be used directly for interpolation since equation (6) shows that a signal must be derived which represents the relative radial position of the display point with respect to data sample points used in the interpolation, ie the relative radial Position of the display point DP in Fig. 2 with respect to the data sampling points S ₃¹¹ and S ₃¹² when the interpolated intermediate values I ₁ and I ₂ are calculated. It would be possible to derive a signal which represents the radial distance between the outer data sampling point S ₃¹² and DP and use this for interpolation according to the invention, or to derive a signal RERR ' which represents the radial distance between DP and the inner data sampling point S ₃¹¹ represents.

In the preferred embodiment of the invention, as will be described below, K _x = K _y = s, so that the fraction of the values appearing at the output of the buffer 62 is RERR , ie the ratio between the distance between the display point and the inside Arc to the distance s between adjacent arcs. In general, however, K _x and K _y can be different from each other and from s . In this case, it is easier if K _x and K _{y are} both less than s , since a change in K _x or K _y that occurs when moving from one display point to the next could change the calculated radius by an amount, which is greater than s , so it would be necessary to take this fact into account when calculating RERR ' .

In the general case, as shown in Fig. 4, K _y , K _x and s can all have different values. The signal R at the output of the buffer 62 is fed to an input of a differential computer 74 and the output signal of a buffer 76 is fed to the other. At the starting point of each radius line, all buffers are cleared by applying the STRTL signal to their clear inputs so that the initial output of buffer 76 is zero. A difference signal RERR ' which is equal to the value of R minus the output signal of the buffer memory 76 appears at an output 78 of the differential calculator 74 , and a signal RDIR, which indicates whether R rises or falls, appears at another output 80 . The difference signal RERR ' is fed to an input of a comparator 81 , and a value corresponding to s is fed to the other input. If RERR ' < s, the comparator 81 outputs a CROSSs signal. If RERR ' <0, the comparator 81 also outputs the signal CROSSs , which indicates that the value of RERR ' goes through an integer multiple of s in an increasing or decreasing direction. So z. B. a signal CROSSs either when scanning display point DP ₄ ( Fig. 2) to display point DP ₃, both of which are between the radius lines R ₂ and R ₃, or when scanning in the opposite direction from DP ₃ to DP ₄ generated.

The input of the latch 76 is connected to the output of an addition / subtraction circuit 83 , one input of which is connected to the output of the latch 76 , the other input of which receives the value of s and the control input of which receives the signal RDIR . Whenever RDIR indicates that R is increasing, the addition / subtraction circuit 83 generates at its output and at the input of the buffer 76 the sum of the output signal of the buffer 76 and s . Whenever RDIR indicates that R is dropping , the addition / subtraction circuit 83 produces at its output and at the input of the latch 76 the difference between the output of the latch 76 and s . The clock input of the buffer memory 76 receives the signal CROSSs , so that when CROSSs occur, the input signal of the buffer memory is transmitted to its output and to an input of the differential computer 74 .

The signal RERR, which represents the fractional distance of a display point such as DP in Fig. 2 between A ₁₁ and A ₁₂, is derived in that RERR 'is divided by s by means of a divider 77 . However, if s = K _y = K _x , then RERR is simply the fraction of R at the output of the buffer 62 , in which case the buffer 76 , the addition / subtraction circuit 83 , the difference calculator 74 , the comparator 81 and the divider circuit 84 are not are needed. Calculation of XHAT

The value of XHAT is the distance between radius lines, measured along a row of display points, which contains the one in question, as shown in Fig. 2, or as is more clearly from Fig. 3 for the display points DP ₄ 'and DP ₄, results. XHAT is equal to the sum of + Δ XHAT, where Δ XHAT is tan R ₂-tan R ₁ for each step in the y direction away from the origin, and - Δ XHAT for each step in the y direction towards the origin. Since the value of XHAT varies for each cut, it is only necessary to supply the line identification signal from circuit 36 to ROM 88 and thus to select the value of Δ XHAT for that line.

The output signal of the ROM 88 is fed to an accumulator, which consists of an adder 19 and a buffer 92 . This accumulator operates in a similar manner to the adder 60 with the buffer 62 , which are used in the radius calculation. However, instead of being updated with every movement in the x and y directions, the buffer 92 is only updated for movements in the y direction.

Calculation of COUNT

The signal COUNT can be a distance measured along a line of display points between a display point in that line and another radius line of the cut. The line identification signal from circuit 36 , the display point scan control signal from DPSG and the y up -down signal from circuit 52 are supplied to a ROM 96 so that one of the values + K _x , - K _x , + K _y tan R or - K _y tan R is selected and fed to the input of an adder 98 . The line identification signal selects an expression that has a tan R ₂ that corresponds to the angle R ₂ used for the cut and the signal of the y up -down circuit 52 in conjunction with the DPSG display dot scan control signal Value of + K _y tan R and - K _y tan R. The value of + K _x or - K _x is selected by the steps along the x direction made by the scan control signal. The following tables show the input selection matrix for the ROM 96 under the specified conditions. Recall that + x is a step to the right with increasing value of x , - x is a step to the left along the x axis, - y is a step towards the origin and + y is a step from the origin towards the y axis is.

COUNT measured from the outer line in both quadrants

COUNT measured from the left line in both quadrants

COUNT measured from the right line in both quadrans

The output signal of the ROM 36 is fed to an adder 98 , the output of which is connected to a buffer memory 100 which is clocked by a step in the y or x direction by connecting its clock input via a line 102 to the output of the OR gate 64 is. The output of the buffer 100 is connected to an input of the adder 98 , so that an accumulator is formed which produces at its output a signal COUNT which is equal to the sum of all changes in the value of COUNT resulting from all previous steps of one Have yielded display point to another, including negative values.

Determination of R ERR

Although the values of XHAT and COUNT could be used directly by interpolation circuits by simply making the angular distances used in the interpolation formula COUNT and XHAT - COUNT (see equations (9), (10), (11) and (11 ′)) , it is generally easier to derive a signal R ERR representing the fractional distance of a display point from one line to another, the particular signal used being based on the selection made above, where COUNT is divided in a division circuit 104 by XHAT . Equation (9) becomes equation (9 ') using R ERR .

The display point is between the radius lines of a section

To determine whether a given display point is between the radius lines of a cut, the following means are provided. The most significant bit of COUNT at the output of the buffer 100 is fed to an input of an AND gate 108 via an inverter 106 . As is known, this bit goes to "1" when the digital signal from COUNT goes negative, so that the output of inverter 106 goes low. In addition, the values of XHAT and COUNT are supplied to a decision circuit 110 which outputs a high level signal when COUNT is less than XHAT and a low level signal when COUNT is greater than XHAT . Thus, if COUNT is negative or greater than XHAT, a situation that only occurs when the display point is angularly out of the cut, the output signal THETOK from AND gate 108 goes low. THETOK ? is fed to an input of the AND gate 72 , the other input of which, as can be remembered, ROK ? is fed. If as just THETOK ? is at a high level, indicating that the display point is angularly within the cut and ROK ? is also at a high level, indicating that the radius of the display point is less than R _MAX , the AND gate 72 outputs a signal at a high level, causing the display memory DM to supply a final interpolated data value to it displayed x - y address.

interpolation

A read controller 82 receives a plurality of data samples from a plurality of radius lines from memory 40 under the control of RDIR and CROSSs and simultaneously makes them available on the inputs of interpolators 112 and 114 . Two of the data points are where an arc with a smaller radius than the display point intersects the radius line of a cut, and two of the data points are where the arc intersects with larger radius lines of a cut. When the DPSG display point scan control signal causes the scan to intersect the outer or inner arc, the CROSSs signal informs the read controller 82 that an intersection has occurred and the RDIR signal determines whether the intersection is inward or inward radial direction has taken place. The read controller 82 then selects the appropriate data points so that the four data samples always define an area that contains the display point. The newly selected data points can be the same as before, further out or further in towards the sector's apex, depending on RDIR and the value of s. If e.g. Are, and for example, the initial four data samples S ₃¹¹ *, S ₃¹² *, S ₄ ^{11 *} and S ₄¹² * (Fig. 2) the scanning of a display point within the range defined by these points range extends to a point outside the arc A ¹² , the read controller 82 neglects the inner data samples S ₃¹¹ * and S ₄¹² *, keeps the samples S ₃¹² * and S ₄¹² * and adds samples S ₃¹³ * and S ₄¹³ *. If the scanning path again crosses the line A ₁₂, the original four samples are used. The interpolated intermediate values supplied by the interpolators 112 and 114 are fed to an interpolator 116 . If switches s ₁ and s ₂ are in the position shown, interpolators 112 and 114 radially interpolate, interpolator 116 interpolates angularly, and s ₃ gives data samples on R ₃ to interpolator 112 and data samples on R ₄ on interpolator 114 . If s ₁ and s ₂ are in the other position, the order of the interpolation is reversed, and s ₃ supplies inner data samples to the interpolator 112 and outer data samples to the interpolator 114 . When performing interpolations that contain other or additional display points, such as B. has been described in conjunction with Fig. 2, it is apparent that more interpolators than those designated by 112 and 114 are needed and that the read controller 82 must hold the data samples from the memory 40 and make them available to the interpolators at the same time . Since a person skilled in the art can easily make the required selection of data samples and interpolator devices, only another combination is shown ( FIG. 4A). In the Anord voltage of FIG. 4A, the first and second intermediate interpolated data value from the data samples at four sampling points along the radii R ₃ and R ₄ (Fig. 2) is derived. Data samples S ₃¹⁰ *, S ₃¹³ * are fed to an interpolator 118 , data samples S ₃¹¹ *, S ₃¹² * to an interpolator 120 , data samples S ₄¹⁰ *, S ₄¹³ * to an interpolator 122 and data samples S ₄¹¹ *, S ₄¹² * to an interpolator 124 . The RERR signal is applied to all of these interpolators. The outputs of the interpolators 118 and 120 are connected to an adder 126 , which generates a first interpolated intermediate data value I 1 , and the outputs of the interpolators 122 and 124 are connected to an adder 128 , which outputs a second interpolated data sample. The interpolators 118 and 122 may take into account the different distances between the inner and outer data samples of DP, as well as various weighting factors to be supplied to them if necessary.

Preferred embodiments, scanner busbar (bus) signal

In view of the fact that the various trigonometric functions used in carrying out the interpolations according to the invention required information such as angles related to the radius lines, along which radius lines a scanner produces the data, it is essential that means for identifying the scanned line are provided . Various options are possible, e.g. B. generating a pulse on the first line of a sector and providing a count that is updated each time the scanner sends an acoustic pulse into a patient's body. However, to provide the ability to format the sector under software control, each angle immediately before receiving data for that angle is clearly labeled with a seven-bit word. The data is quantized in five bits. In order to minimize the number of particular signal collections between a scanner and the scan converter according to the invention, the angle and data bits share a common data transfer bus 113 ( FIG. 5) which is 12 bits wide. The output of a scanner 134 ( FIG. 5) is shown in FIG. 5A, where it can be seen that if MSB is 1, bits 2 through 8 represent the line number, and if s is 0, bits 2 through 6 represent one of 32 levels for a data sample. To reduce the trigonometric data that must be stored in the ROMs, one takes advantage of the angular symmetry around the central radius line of the sector, and accordingly bit number 1 has the value 1 arbitrarily if the line is in the left half of the sector and the value 0 if it is in the right half. In the center line of the sector, the bit is set to 1. The LSB , bit 11 in this case, contains pulses labeled "STROBE" that occur during the time when the word contains line identification information and during the time when the word represents the value of a data sample.

Timer signals

The scan converter system is triggered by pulses CLK generated by a clock 136 . However, in order to provide sufficient time for each circuit to function, the frequency of the output signal of the clock generator 136 is halved by means of a divider 138 , and the signal ENABL is thus derived. The complement of this signal, NENBL , is generated by connecting an inverter 140 to the output of the divider 138 .

Since the clock of the scanner 134 does not necessarily have to run synchronously with the clock generator 136 of the scan converter, LSB , STROBE is fed from the scanner 134 to a synchronizer 135 . The synchronizer 135 can be constructed in various ways, but in the present example consists of a pair of D flip-flops 132 , 139 and an AND gate 141 , which are connected to one another as shown. In order to control the sequence of operations of various parts of the scan converter circuit upon receipt of a word from the scanner 134 , the output signal of the AND gate 141 (designated INENABLE ) is a synchronized STROBE and is fed to a shift register 142 which is clocked by the pulses CLK is. When the frequency of the clock 136 is 12.4 MHz, the STROBE signal is designed to have an active high level for at least 80 ns and an active low level for at least 80 ns so that the successive pulses NINEN 0 , NINEN 1 and NINEN 2 at the output of the register are synchronous with CLK . Each pulse is low for 80 ns, with the three pulses lasting no longer than 240 ns. The inverted forms INEN 0 , INEN 1 and INEN 2 are derived by inverters 144 , 146 and 148 , respectively. As can be seen , NINEN 0 or INEN 0 are used for the release of buffers , NINEN 1 or INEN 1 for the control of the write functions and NINEN 2 or INEN 2 for the control of counters.

Identification of the line number

The output signal INENABLE from the AND gate 141 is fed via an inverter 150 to the enable input of a buffer 152 , so that the word pending at the output of the scanner is temporarily stored . Bit number 1, SIGN , which designates the half sector in which the line is located, and bits 2 to 8, which designate the line number, are fed to a buffer 154 , so that when the buffer 154 is released, they represent the line number L # Bits appear on one output and bits SIGN appear on the other.

Since bits 2 through 6 represent line identification information at certain times and the value of a data sample at other times, it is essential that latch 154 only release if these bits represent the line number. This is achieved by ANDing in a NAND gate 158 , the MSB , here designated HDR 1 , with the signal ENABLE and the output of an OR gate 156 , to which INEN 1 and INEN 2 are supplied. The reason for using INEN 1 and INEN 2 in this way is that INEN 1 can occur in one of two stable states with respect to the ENABL signal. ENABLE has a period of 160 ns, while INEN 0 has a width of 80 ns. To ensure that the line number is buffered synchronously with the ENABLE signal, both INEN 0 and INEN 1 are required. It should also be noted that the STRTL signal is generated in a similar way. This signal is explained in more detail below. The reason for using ENABLE is to manage the total time for the working intervals of the hardware. Due to the essential division of the 12.4 MHz clock by 2, a working interval time of 160 ns is specified. Each synchronous operation therefore has 160 ns available, within which it must be completed with execution, transmission delay and hold time. NAND gate 158 can only generate the low level signal needed to enable latch 124 when HDR 1 , the most significant bit, is 1. The data then present at the input of a buffer 154 represent the scan line information.

Elaboration of the data

Bits 2 through 6 are applied to the input of a latch 160 which is released by NINEN 0 so that they are transferred as data to a data bus 162 whether they represent line information or the value of the data samples. If these bits represent line information, they are prevented from being written to the line memories of Fig. 6 in a manner to be explained. This is done by a qualification signal SWE , which is derived in that an inverter 164 between an HDR 1 leading line 166 and an input of an AND gate 168 is connected, the other input of which is connected to INEN 1 . When the word scanner 134 represents line information, HDR 1 is at a high level, so SWE must be at a low level. However, when the word represents data, HDR 1 is at a low level so that SWE can go high when INEN 1 occurs.

Start of a line

As previously stated, the calculations of RERR and R ERR , which are used for the interpolation function, are derived by successively adding or subtracting certain stored values to or from corresponding known starting values. Although these known starting values can be those for any display point, it is easier to use the origin of the sector as the starting point since the known values for RERR and R ERR are 0 at origin. However, when doing this, it is essential to know the data sample that occurs at the beginning of a line. Since HDR 1 occurs at every line start, it can be used to generate a STRTL (line start) signal. One possibility for this is to connect an inverter 170 between the output of the NAND gate 158 and the input of a buffer 172 . While data is being received, HDR 1 is at a low level so that the output of latch 172 is also at a low level. However, when an L # is received, HDR 1 is high, so when NENBL releases this latch, STRTL appears high at its output. In Fig. 10, STRTL is used to initiate the calculations mentioned.

Write the samples

To explain a method of storing the data samples, reference is now made to FIGS. 5 and 6. In the circuit of FIG. 6, the data bus 162 of FIG. 5 is connected to tri-state buffers or gates 174 , 176 and 178 , which in turn are connected to the I / O digital line memory 180 , 182 and 184 , respectively. Each line memory can store the 396 samples along a line, and it is desirable that samples from a radial line be written into a memory by scanner 134 while the two previously written radial lines are read out to provide the samples needed for interpolation deliver. The tri-state buffers require a low level signal to be applied to their enable inputs to pass the data to the line memories. A device for the department of the appropriate release signal NLD is shown in FIG. 5. HDR 1 from line 166 is fed to one input of a NAND gate 186 , INEN 0 is fed to the other, and the output signal is fed to a modulo 3 counter 188 which is activated by a low level signal and a signal with outputs high level on one of its three output lines M 1 , M 2 or M 3 . Each received HDR 1 causes the NAND gate 186 to output an NLD signal to the counter 188 and cause the counter 188 to shift the high level signal to the next output line. After three signals HDR 1 , the sequence is repeated.

Enabling line memories 180 , 182 , 184 so that data pending at their I / O can be written to them requires that a low level signal be applied to their write enable inputs. Such signals are derived by appropriate supply M 1 , M 2 and M 3 to inputs of NAND gates 19 82914 00070 552 001000280000000200012000285918280300040 0002003143429 00004 827950 , 192 and 194 and by supplying SWE to their other inputs. It should be remembered that SWE is only at a high level when there are samples on data bus 162 , so that the output signals of NAND gates 190 , 192 and 194 can go to the never-ending level and thus the enrollment Allow data to be stored in the line memory only if there are samples on the data busbar. This prevents line number data from being written into memories 180 , 182 and 184 . The signal of M 1 , M 2 and M 3 , which is in each case at a high level, has the effect that its associated NAND gate emits a low output signal and thus releases the associated line memory for registration. If e.g. B. M 1 is at a high level, the line memory 180 is released for data reception.

However, since each line memory has a common I / O, it is also necessary that the output channel be blocked by applying a high level signal to its output enable terminal OE while this memory is receiving samples. This is achieved by placing M 1 , M 2 and M 3 on the OE connections of the line memories 180 , 182 and 184 , respectively. If e.g. B. M 1 is at a high level, the output channel of the line memory 180 is blocked.

In summary, it can be said that M 1 , M 2 and M 3 successively assume a high level. When M 1 is high, the tri-state buffer 174 allows samples to access the I / O of line memory 180 , but tri-state buffers 176 and 178 prevent samples from accessing the I / O of their corresponding line memories 182 and 184, respectively. At the same time, the write enable input of line memory 180 receives a low level signal so that samples can be written to line memory 180 . The output channel of line memory 180 is blocked, while the output channels of line memory 182 and 184 are enabled. Thus, if M 1 is high, samples can only be stored in line memory 180 . M 2 and M 3 are then at a low level, so that samples previously stored in line memories 182 and 184 can be read out.

The question arises of how the samples can be stored at consecutively arranged addresses. This is controlled by up / down counters 196 , 198 and 200 . It should first be noted that the NLD signal at the output of NAND gate 186 is fed to a load input of the counters so that they are all reset to zero at the start of each line. So that these counters can count at all, a signal with a low level must be present at both inverting inputs ENT and ENP . It is e.g. For example, assume that samples should be written into line memory 180 , that is, that M 1 is at a high level. Under this condition, the input ENP of the counter 196 for the entire line is at a low level, since a signal M 1 + SHIFT to be described is fed to the input ENP through an inverter 195 . M 1 is constantly at a high level during line scanning, which is why the state of SHIFT is irrelevant. When writing, the count always increases, so that AND 1 should be at a high level. AND 1 , AND 2 and AND 3 each with an input of OR gates 202 , 204 and 206 and a signal NMDECR to be described later with the other input. Since M 1 is high, the output of OR gate 202 is high regardless of the state of NMDECR and counter 196 counts up. The actual counting is based on the signal NM 1 + ADDEN , which is fed via an inverter 193 to the ENT input of the counter 196 . Since NM 1 is the negation of M 1 , at a low level and cannot set the ENT input of counter 196 to a low level, a count is made each time ADDEN goes high. NM 1 + ADDEN , NM 2 + ADDEN and NM 3 + ADDEN are derived as follows. HDR 1 is supplied through an inverter 203 to an input of an AND gate 205 , so that this input is at a high level during the time when the samples are received. Each sample is accompanied by a signal STROBE , which generates the synchronized STROBE INENABLE , which in turn generates INEN 2 . When INEN 2 goes high, the output signal of the AND gate 205 , which is the signal ADDEN , also goes high. ADDEN is fed to one input of the OR gates 207 , 208 and 210 , and signals NM 1 , NM 2 and NM 3 are fed to the other inputs. The latter signals are derived by feeding M 1 , M 2 and M 3 inverters 212 , 214 and 216, respectively. When writing to the line memory 180 , M 1 is at a high level and NM 1 at a low level for the entire line, and the output signal ADDEN from the AND gate 205 goes to a high level at each INEN 2 , so that the counter 196 counts . Since AND 1 , as described, is at a high level, it counts up. The effect of the various signals on the other line memories and counters is discussed below in a section on reading samples from the lines.

In the example just mentioned, the sample values were written into the line memory 180 . During the same time, sample values are read out from line memories 182 and 184 . If the reading sequence only ever went in one direction, the reading function would be explained here, but since this is not the case, it is necessary to explain how signals INCR , DECR and SHIFT are derived which control the reading function.

Display point scan control signal

In order to determine the signals just mentioned, means are provided for generating display point scan control signals which represent the step-by-step scan along the rows and columns of display points required for the progression from a given display point e.g. B. at the origin of the sector through the display points in a section corresponding to a given line number. As previously noted, the display point scan control signals can take various forms as a result of different sequences of x and y movements and can be generated by a computer or taken from memory, as discussed herein. The circuit to be described according to FIG. 7 contains a state machine 220 which outputs a series of individual bits which indicate by means of a zero that a step runs along the x axis and along a row of display points and indicate by a one, that the step away from the origin is along the y axis and along a column of display points. In this particular embodiment of the invention, the step goes from the origin of the sector to the left in a section that lies in the left half of the sector, as shown by the scan path 31 in FIG. 3, and to the right in a section in the right Half of the sector, as shown in Fig. 3 by the scanning path 31 ' . The scanning algorithm uses the concept that each time the y address is changed, the direction for the x counter is changed with respect to its last setting, that is, after the first y address change in path 31 , XDIR is changed to effect that the x- counter counts up, ie that there is a movement closer to the center of the sector. It should be noted that the y movements can be successively chained. However, any movement in the y direction implies a change in XDIR , so that when the state machine outputs a zero (x movement), the x counter moves in the direction of the last implied x direction. In addition, for cuts on both sides of the center line (y axis) with the same angles, the scanning paths are identical except that the directions of corresponding steps along the x axis are opposite. However, the one and zero signals from state machine 220 are identical. A signal XDIR , which is zero for one step towards the center line and one for one step towards the outside of the sector along the x axis, is derived from the output of the state machine 220 by means of an address counter controller 222 , and the bit SIGN from Buffer 230 . The address counter controller 222, the details of which are shown in FIG. 7A, also outputs a signal YINC / which represents the steps in the x or y direction.

FIG. 7 will now be discussed in detail. The line number representing bits L # and the bit representing SIGN at the output of the buffer 154 in FIG. 5 are fed to a scanner buffer 224 which is released by the signal STRTL from the buffer 272 in FIG. 5 and the bits for these signals passes through a FIFO buffer 226 which stores two line numbers because two successive radius lines of the scanner must be stored in two of the line memories 180 , 182 and 184 ( Fig. 6) before a cut is defined and ready for reading. Since each STRTL signal occurs on the radius line, the line number bits in FIFO buffer 226 are moved on. At the third STRTL of the sector, the L # for the first line of the sector is shifted to a line number translation ROM 228 . Its output signal is fed to a buffer 230 .

The purpose of the line number translation ROM 228 will be understood by considering the Fig. 7B₁, 7B₂ and 7B₃. In the particular format used in this embodiment of the invention, even numbers are assigned to the radius lines, starting with the outer line in the left half of the sector at 1/120 ( Fig. 7B), where 1 is the SIGN bit indicating that the line is in the left half and 120 is the line number. The center line is arbitrarily designated 1/0. The outermost line in the right half of the sector (not shown) is 0/120. FIG. 7B shows the outermost section in the left half of the sector, which is defined by radius lines 1/120 and 1/118. While samples are read out from two of the line memories 180 , 182 and 184 ( FIG. 6) in which the samples of the lines 1/120 and 1/118 were stored, samples from the dashed line 1/116 are written into the third line memory . The various angle measurements used in the determination of RERR , COUNT and XHAT in a manner to be described in this particular embodiment are based on the angle between the outer radius line R _O and the y axis.

The line number translation ROM 228 is required for the following reason. All trigonometric functions relate to the outer line, ie, in the left side of the sector, the one with the "oldest" line number in FIFO buffer 226 . If the current output cut is as shown in Fig. 7B₁, the current output from Fifo buffer 226 is line 1/2, which implies that the current angle is that of line 1/2. If the center line is crossed ( Fig. 7B₂), the output of the Fifo buffer 226 is 1/0. The angle of 0/2 should be used because it is the same as that of 1/2 in Fig. 7B₁. To achieve this result, the line number translation ROM 228 adds a number 2 to the line number ( Fig. 7B₃) and changes the sign to zero, ie, 0/2 is given by the ROM 228 instead of 1/0 and has the same L # as 1/2 in Fig. 7B₁. The SIGN bit has no effect on the L # to be used, but is delayed in the same way as the line number, for reasons that are described below. A two is added to the remaining lines on the right. All lines on the left with the exception of the center line are made transparent by the ROM 228 .

The state machine

The three most significant of the six bits at the output of latch 230 , which represent the line numbers, are provided to a ROM selector 232 which selects one of eight ROMs used in state memory 234 . Each ROM in state memory 234 contains up to eight cuts. The three least significant bits are fed to memory 234 , thereby selecting the part that relates to the particular cut within the selected ROM. Each cut contains 256 eight-bit words, so that there are a total of 2048 bits for the cut. Each bit corresponds to a step on the path to be scanned through the display points. It is 0 if the step is in a direction along the x axis and it is 1 if the step is along the y axis. Recall that the particular x direction is determined by the total number of y movements since the origin.

The signal STRTL at the output of the scanner buffer 224 is used to start a state machine address counter 236 to output an eleven-bit address with the frequency of the ENABLE pulses (the working interval). Eight of these eleven bits are used to sequentially select one of the 256 eight-bit words of each slice in memory 234 and feed them to a buffer 238 . The three least significant bits of these eleven bits at the output of the state machine address counter 236 are combined with ENABLE in an AND gate 240 , whereby the buffer 238 is released for the passage of the word supplied to it from the state machine memory 234 to a multiplexer 242 , which the Bits of the word are sequentially selected under the control of the three least significant bits and fed to the address counter controller 222 . The output of multiplexer 242 is YINC /.

State address decoder

The eleven-bit word at the output of the state machine address counter 236 is supplied to a state address decoder 246 , which is a ROM and develops certain timer signals. When the counter reading represented by the eleven-bit word reaches a predetermined value which occurs at a time so that the calculation of R ERR and RERR ( Fig. 8) has been carried out in a manner to be described, a signal STRTI ( Interpolation begin) given to the reset input of a buffer 248 ( Fig. 5), the purpose of which is described below. At a suitable time, the decoder 246 sends a signal NACCCLR for reasons to be shown , which clears a counter and three buffers in the circuits according to FIG. 8, which determine R , RERR , COUNT and XHAT . The decoder 246 also outputs a signal NINTL which is fed to the address counter controller 222 so that its output signal is initialized at a suitable time, and a signal CTRLD which repeats an x address counter 249 to the x address of the origin of the Sector sets as determined by a source 250 and sets a y address counter 252 to the y count of origin as determined by a source 254 at the beginning of each line.

Address control

As will be described in connection with FIG. 7A, the address counter controller 222 generates a signal XCNT for the counter 249 for every 0 in the output signal of the multiplexer 242 and a signal YCNT for the y counter 252 for every 1 in the output signal of the multiplexer 242 . Address counter controller 222 also provides an XU / D signal to x counter 249 . In addition, the address counter controller 222 generates a signal XDIR which, together with the signal YINC / from the multiplexer 242, defines paths 31 and 31 ' in FIG. 3 in response to the output signal of the multiplexer 242 and the signal SIGN from the buffer memory 230 . XDIR and YINC / are used in a manner to be described to identify the value of the trigonometric function used in the circuits of Figure 8, which determine the values R , RERR , XHAT and COUNT . A signal ACCCLK provided by the address counter controller 222 triggers the latches of the accumulators in Fig. 8 used in determining the values of R and COUNT , and a signal THETCLK provided by the controller 222 becomes triggering of a buffer of an accumulator in FIG. 8, which is used to determine the value of XHAT .

Referring now to Figure 7A. At the start of each line and thus at the start of each new cut, the signal NINTL from the state address decoder 246 ( FIG. 7) goes to a low level and is fed to the preset input of a D flip-flop 256 , where it goes high through XDIR Level goes, indicating that a step along the x axis is being made towards the outer radius line, but that the direction with respect to the origin has not been determined. NINTL also clears an eight-state delay circuit 258 , the output of which is connected to an input of an exclusive-OR gate 260 and whose input is connected to the output of flip-flop 256 , where XDIR is present. The other input of the exclusive OR gate 260 receives the SIGN bit from the buffer 230 ( FIG. 7). If the line is in the left half of the sector, SIGN is at a high level so that the output signal of the exclusive-OR gate 260 is at a low level, which means a downward count, ie to the left. When the line is in the right half of the sector, SIGN is high so that the output of exclusive OR gate 260 is high, which means an up count.

The control of XDIR is achieved as follows. YINC / from the multiplexer 242 ( FIG. 7) is supplied to an input of an AND gate 262 , the other input of which is supplied to ENABLE . If the next step continues to go outside, YINC is zero so that the output of AND gate 262 is at a low level. This output signal is fed to an input of an exclusive OR gate 264 , the other input of which is connected to XDIR at the output of the D flip-flop 256 . Since XDIR is high when moving outward, the output of exclusive OR gate 264 is high and XDIR remains high. However, if YINC / One, which indicates that there is movement away from the origin along the y axis, the output of AND gate 262 is now more high when an ENABLE occurs, causing the output of Exclusive-OR gate 264 goes low and thereby also lowers YDIR , which means a step towards the center of the sector on the next movement in the x direction.

Since the direction of a step along the x axis and XUP / is now known, it remains to generate the signal XCNT for each step in the x direction. To accomplish this, YINC / is applied to a nine-state delay circuit 266 , which is also cleared by NINTL . The output of the delay circuit 266 is connected to an input of an AND gate 268 and to an inverting input of an AND gate 270 , and ENABL is supplied to their other inputs. When YINC / is at a low level, the output of the AND gate 268 is at a low level so that no counting in the y direction takes place, but the output signal of the AND gate 270 is at a high level so that XCNT is also at a high level and causes the sector's x address counter to count up or down depending on whether XUP / is at a high or a low level.

If YINC / is high, indicating that a step is being taken in the y direction, the output of AND gate 268 goes high, causing the sector's y address counter to count up, which is the only possible direction in the present example.

The purpose of delay circuits 258 and 266 is to allow previous data to pass through the interpolators of FIG. 10. They are triggered by CLK according to ENABLE qualifications. However, the D flip-flop 256 is only triggered by CLK .

CLK is also fed to the clock input of a synchronizer 272 , which is connected to a D input with ENABL and generates an ACCCLK signal at the corresponding output. Another D input of the synchronizer 272 is connected to the output of the AND gate 262 , and the corresponding output is connected to a third D input, and its corresponding Q output generates the signal THETCLK .

The outputs of the x and y address counters 249 and 252 ( FIG. 7) are connected to buffers 274 and 276 , which in turn are connected to buffers 278 and 280 , the signal ENABLE being supplied to all of them at their enable input . With each signal ENABLE , the x and y addresses are given on lines 282 and 284 , which run in FIG. 10 below to a display memory DM ' in FIG. 11.

Determination of R and RERR

Reference is now made to FIG. 8. The L # bits from the output of the latch 230 in FIG. 7 and the display point scan control signals XDIR and YINC / from the address counter control 222 (also FIG. 7) are fed to the input addresses of a ROM 286 in which values of + sin R , -sin R , and x cos R are stored for the angle R to be used with each L #. Figure 8A shows the truth table for a given line which shows the outputs of the ROM 286 for the various combinations of the bit values of XDIR and YINC /. The ROM can be programmed to provide appropriate twelve-bit output signals. The twelve bits are used to define the fractional numbers coming from the ROM 286 and are fed to the input of a buffer 288 , the output of which is fed to the one input of an adder 290 . A latch 292 is connected between the output of adder 290 and the other input thereof, so that an accumulator is formed. The output signal of the buffer 292 therefore contains the fraction of the current radius, of which the five MSB bits are the desired signal RERR . It is expressed by five bits, which has been found to be sufficiently accurate, but the addition has used all twelve bits to avoid an overly large accumulative error. This situation can occur because more than 1000 sine and cosine values have to be added or subtracted. It should be noted that the latch 292 is cleared at the beginning of a line through NACCCLR, which signal is derived from state address decoder 246 (Fig. 7) and which is triggered by ACCCLK, which signal in turn from the address counter controller 222 (Fig. 7 ) is derived. As can be seen in Figure 7A, NACCCLR is derived from ENABLE , which controls the speed at which the steps through the display points take place. Every movement in the x and y directions thus causes an incremental amount (± sin R , + cos R ) to be added to the last calculations of the radius. As will be shown, the integer part of the radius calculation is held in a radius counter 294 under the control of accumulator transfer, XDIR and YINC /.

The values of K _x and K _y and the distance between samples along the radius lines are all one in the present example, so the connection of the signals YINC / and the carry output of the adder 290 to the radius counter 294 causes it to count the number of transfers and generates a signal R which is equal to the integer portion of the sample distances in the radius of each display point. Radius counter 294 also outputs an INCR signal when radius R exceeds an integer value of R and a DECR signal when radius decreases over an integer value of R. The signal R is compared in a comparator 296 to a radius limit signal from a source 298 such that a high level signal is generated whenever the radius R of a display point exceeds the specified limit. The output signal of the comparator is ROK? .

The signals RERR, INCR , DECR and ROK? are passed through buffers 300 and 302 . The signal RERR arrives at the interpolation device according to FIG. 4 and ROK? passes through delay elements 304 to an input of a NAND element 306 . A signal THETOK? , which is derived in a manner yet to be described, indicates by its high level that a display point is in the cut. THETOK is supplied to the other input of the NAND gate 306 via the delay circuits 304th The output signal of the NAND gate 306 is fed to a buffer memory 308 and its output signal to a buffer 210 . So if either ROK? or THETOK? are low, is the output signal NVALD? of buffer 310 at a high level. NVALD? is a display memory DM ' ( Fig. 10) supplied. If NVALD? is at a low level, the final interpolated data value derived from the interpolation device shown in FIG. 10 for the display point is input to the display memory DM ' . The INCR and DECR signals are used through the circuits in Fig. 5 to control the read function of two of the line memories 180 , 182 and 184 .

The radius counter 294

Fig. 8B shows an arrangement of logic circuits for deriving the signals R, INCR and DECR from YINC / and the carry signal of the adder 290th The carry signal is 1 when the radius in adder 290 increases and goes through an integer value. The carry signal is 0 if the radius increases and does not go through an integer value. Conversely, the carry signal is 0 when the radius in adder 290 becomes smaller and goes through an integer value, and the carry signal is 1 when the radius becomes smaller and does not go through an integer value. If the fraction of the radius is 0, the output of the radius counter indicates the radius of a display point that is equal to the radius of one of the sample points.

YINC / is supplied to one input of an OR gate 314 via a two-stage delay circuit 312 , and XDIR reaches its other input via a delay circuit 316 . The output of the OR gate 314 is connected to an up / down control input of an up / down counter 318 and to an input of an exclusive OR gate 312 . The other input of exclusive OR gate 320 is connected to the transmit output of adder 290 and its output is connected to inverting inputs of AND gates 322 and 324 which are the other inputs to those with which the OR gate is connected 314 is connected. The output of the OR gate 314 is connected to another inverting input of the AND gate 324 and a non-inverting input of the AND gate 322 . The NENBL signal of FIG. 5 is applied to the enable input of counter 318 , the output of exclusive OR gate 320 is connected to the enable input of the same counter. The signal INCR is connected at the output of a two-stage delay circuit 326 to the output of the AND gate 322, and the signal DECR is connected at the output of a two-stage delay circuit 328 to the output of the AND gate 324th The clock inputs of the delay circuits 312 , 316 , 326 and 328 and the clock input of the up / down counter 318 are supplied with the signal CLK , and the input (load) of the counter is supplied with NACCCLR . If the radius is not defined by a radial boundary e.g. For example, if the arcs in Figure 3 go both INCR and DECR zero, however, if it grows beyond a radial boundary, INCR becomes 1 and DECR becomes 0. If it decreases beyond a radial boundary, INCR becomes 0 and DECR to 1.

Determination of XHAT

Again, reference is made to FIG. 8. The values of XHAT , which in the present example are equal to tan R ₂-tan R ₁, where R ₂ is the angle from the center of the sector to the outer line of the cut and R ₁ is the angle of the inner line, are in one for each radius line ROM 330 saved. The corresponding value of XHAT is selected by feeding the L # signal from the output of the buffer memory 230 in FIG. 7 to the address input of the ROM 330 . The output signal of the ROM 330 lasts for an entire line and is fed to the input of an adder 332 . The output of adder 332 is provided to a latch 334 which is cleared by NACCCLR from state address decoder 246 and triggered by THETCLK from address counter controller 222 , both of which are shown in FIG. 7. The output of the buffer 234 is connected back to another input of the adder 232 , so that an accumulator is formed which generates the value of XHAT at the output of the buffer 334 , which is the sum of XHAT for each step in the y direction, since THETCLK triggers the accumulator with every y movement. A larger number of bits are used in the feedback to the adder 332 in order to avoid an accumulated error which is too great. 16 bits are used in this accumulator, which takes into account the fact that four MSB bits are used for the integer part of XHAT .

Determination of COUNT

The signals representing the line number from the buffer 230 in Fig. 7 and the signals YINC / from the address counter controller 222 in the same figure are supplied to a ROM 336 where one of the values +1, -1 and tan R ₂ is selected as is shown in Fig. 8C. The angle R ₂ is the angle between the outer line of a cut and the center line of the sector, and therefore the value of + tan R ₂ depends on the selected line number.

A latch 338 is connected between the output of the ROM 336 and the input of an adder 340 , and the output of the adder 340 is connected to a latch 342 . Buffer 342 is cleared by NACCCLR from state address decoder 246 ( FIG. 7) and triggered by ACCCLK from address counter controller 222 ( FIG. 7). The output of latch 342 is connected to another input of adder 340 so that all values selected from ROM 336 are summed for each step indicated by the display point scan control signals YINC / and XDIR . This is the COUNT value, measured from the outside line of a cut, regardless of whether it is in the right or left half of the sector. To reduce the accumulative error, 16 bits are used in the feedback loop compared to eight bits for the sum. Four bits are used for the integer part of COUNT . In contrast to RERR and XHAT , however, COUNT can have a negative value if the display point is outside the outer line of a cut. For this purpose, the MSB bit is provided at the output of the buffer 342 , which indicates whether the value of COUNT is positive or negative.

Determination of R ERR

R ERR is COUNT / XHAT , as previously explained. This division could be done directly, but then 16 bits would be divided by 16 bits. Since such an accuracy is not required in the above exemplary embodiment, but an accuracy of five bits is sufficient, a suitably selected five-bit field of both COUNT and XHAT provides the necessary bit resolution in the divider. Since XHAT is the larger of the two numbers and is not negative, it is simply shifted to the left until MSB is no longer zero, ie there is a simple change in scale. COUNT is then shifted by the same amount. The purpose of switching elements 334 , 346 and 348 is to create the possibility of zero to three shifts. The five-bit output signals of the ROMS 346 and 348 are fed through an intermediate tensioner 350 to a divider ROM 352 which divides the scaled COUNT by the scaled XHAT and enters the result into a buffer 354 which outputs the desired signal R ERR , which is placed in the interpolation device according to FIG. 10.

To derive the signal THETOK? , which indicates whether an indication point is angularly within the cut, the bit representing the sign of COUNT is passed through an inverter 349 and the buffer 350 to an AND gate 356 . If COUNT is positive, this bit is at a high level and indicates that the display point is not outside the outer line (R ₂ ) . However, if COUNT is negative, the input signal for 356 is low, causing THETOK? falls away.

A comparator 358 is connected to receive COUNT and XHAT and to output a high level output when COUNT is less than XHAT , indicating that the display point is not within the inner line of the cut, and a low bit Returns level when COUNT is greater than XHAT , indicating that the display point is within the inner line. This bit at the output of the comparator 358 passes through the buffer 350 and is fed to another input of the AND gate 356 . Its output signal passes through the buffer 354 , whereby the signal THETOK? which, as previously noted, goes through the delay circuits 304 to another input of the NAND gate 306 than that of the ROK? is fed.

Reading the line memory

As previously noted, according to the present embodiment of the invention, the final interpolated data value for each display point is derived by interpolating two pairs of samples that define the sub-intersection in which the point lies. As shown in Fig. 9, the values of DP ₅ and DP ₆ are derived from the samples S ₂, S ₃, S _{2 '} and S _3' , which define an undercut, but the final data value for DP ₇ derived from the samples S ₁, S ₂, S _{1 '} and S _2' , which define the previous subsection. Since DP ₈ is in the same subsection as DP ₅ and DP ₆, its final data value is derived from the same data samples as the latter, namely S ₂, S ₃, S _{2 '} and S _3' . Therefore, the means for reading the samples from the line memories 180 , 182 and 184 ( FIG. 6) must be able to hold, advance and delay the samples selected along each radius line of a section.

The selection of two of the line memories 180 , 182 and 184 from which the samples are to be read is determined by which two of the signals M 1 , M 2 and M 3 are at a low level. Referring to FIG. 6, the signal M 1, M 2 and M 3 are the off ratio enabling terminals of the line memories 180, 182 and 184, respectively. When M 1 is at a high level, line memory 180 is enabled to receive data while its output channel is blocked so that no data can be read from it. M 2 and M 3 are then low and prevent line memories 182 and 184 from receiving data. However, M 2 and M 3 open the output channel of the line memories 182 and 184 , respectively, so that data can be read out from them at addresses which are predetermined by the counters 198 and 200 .

It can be seen that the outer radius line is on the left side in the left half of a sector and on the right side in the right half of the sector. In the present specific embodiment of the invention, the signal COUNT always relates to the outer line, so that the samples from the outer line must be separated from those of the inner line. This function is performed by multiplexers 360 and 362 . Different inputs of each multiplexer are connected to the respective I / O channels of the line memories 180 , 182 and 184 and are controlled as described below so that the multiplexer gives 360 samples from the outer radius line to a bus OL and the multiplexer 362 samples from the inner radius line to an IL manifold.

The control for the multiplexer 360 consists of an inverter 363 , which is connected between a source for the signal M 2 and an input of an AND gate 366 , an inverter 368 , which is between the output of an exclusive-OR gate 370 and the is connected to the other input of the AND gate 366 , the signals SIGN and M 1 being fed to the inputs of the exclusive OR gate 370 . The output signal of the exclusive OR gate 370 is also fed to an input of an AND gate 372 , the other input of which is fed to the signal M 3 via an inverter 374 . The output signal of the AND gate 366 is fed to the input LSB , selection A of the multiplexer 360 , and the output signal of the AND gate 373 is fed to the input MSB , selection B of the multiplexer 360 . With these connections, the outer lines are selected as shown in the table according to FIG. 6A and fed to the collecting line OL for the outer line.

The control for the multiplexer 362 consists of an inverter 376 connected between a source for the signal M 3 and an input of an AND gate 378 , an inverter 380 which is connected between a source for M 2 and an input of an AND gate 382 is, and an exclusive OR gate 383 , one input with a source for SIGN , the other input with a source for M 1 and the output with an input of an AND gate 382 and also via an inverter 384 with an input of the AND gate 378 is connected. The output of the AND gate 378 is connected to the MSB selection B input of the multiplexer 382 , and the output of the AND gate 382 is connected to the LSB selection A input of the multiplexer 362 . With these connections, the inner line is selected as shown in Fig. 6B and supplied to the bus line IL for the inner line.

As is apparent from Fig. 10, the output line OL by the multiplexer 360 to the input of shift register 386 is connected ver, and the output line IL from the multiplexer 362 is connected to a shift register 388th The Q _A and Q _B outputs of shift register 386 provide successive data points on the outer line to a device to be described for deriving a first interpolated intermediate value, and the Q _A and Q _B outputs of shift register 388 provide successive data points on the inner line Line to a device to be described for deriving a second interpolated intermediate data value.

Selection of samples from the line memories

The INCR and DECR signals provided by radius counter 294 in Fig. 8 are used to cause the pair of counters 196 , 198 and 200 ( Fig. 6) connected to line memories to advance at one point stop or run back. Recall that INCR is high when the radius of a display point becomes larger than that of a sample, as in a step from DP ₇ to DP ₈ ( Fig. 9), and that DECR goes high when the radius of a display point becomes smaller than that of a sample, as in the step from DP ₆ to DP ₇. If the integer part of the radius remains unchanged, as in a step from DP ₅ to DP ₆, both INCR and DECR remain at a never-ending level so that the counter readings do not change. As will be described later, the counters cannot change until a SHIFT signal is given in a manner to be described. SHIFT is given to every high level of INCR and DECR .

At the beginning of a line there is a special situation because, as can be seen from Fig. 3, INCR and DECR are at a low level until a display point has a radius that is larger than that of the samples S ₁₁ and S _{11 '} . Therefore, neither INCR nor DECR can cause the signal SHIFT required to change the counts of the counters assigned to the two memories just read according to FIG. 6. Under these circumstances, the counters are controlled as follows.

At the beginning of each line of data received by the scanner 134 , a signal STRTL is generated at the output of the buffer 172 ( FIG. 5) and used to initiate the scanning of display points, as explained in connection with FIG. 7. The STRTL signal is also fed to the set input of the buffer 248 and a two-stage shift register 392 . The shift register 392 is enabled by NENBL , so that it delivers two successive pulses STRT 1 and STRT 2 at high levels to different inputs of an OR gate 396 . Essentially, STRTL is delayed in shift register 392 , creating two delayed versions of STRTL for input to OR gate 396 . The output signal of the OR gate 396 is fed to an input of an AND gate 398 , the other input of which is fed to ENABLE , so that when these two signals coincide, the AND gate 398 outputs a high-level signal, namely SHIFT , so that the counters can count.

When enough time has passed for the construction of the signals RERR and R ERR for the first two samples of each line of a section, which occur simultaneously with STRT 1 and STRT 2 , the first sample of each line being at the origin, a signal STRTI ( Start of interpolation) from the state address decoder 246 ( FIG. 7) to the reset input of the buffer memory 248 . Buffer 248 was set by STRTL and STRTI clears it. The time interval between STRTL and STRTI is designated by WAIT. When STRTI occurs, the latch 248 releases a latch 399 to which the INCR and DECR signals are fed from the radius counter 294 ( FIG. 8). After INCR and DECR have passed buffer 399 , they are supplied to MINCR and MDECR, respectively, and are applied to various inputs of OR gate 396 and, when at a high level, generate a SHIFT signal at the output of AND gate 398 . In addition, the MDECR signal is supplied to an inverter 395 which generates an NMDECR signal.

Control of the counters with SHIFT

In order for counters 196 , 198 and 200 to count, their ENT and ENP inputs must be at a low level. Assume that samples are read into line memory 180 so that M 1 and M 2 and M 3 are both low. In the explanation of the write function, it had been noted that if the signal M 1 is high, the ENP input of the counter 196 for the line memory 180 for the entire line is at a low level, so that its count has been advanced each time. when the ADDEN signal appeared which is fed to the ENT inputs. For the counters 198 and 200 , NM 2 and NM 3 are at a high level throughout an entire line and since they are fed to the corresponding ENT inputs via inverters 197 and 199 , these inputs are kept at a low level during the line.

Signals M 2 + SHIFT and M 3 + SHIFT are fed to the ENP inputs of counters 198 and 200 via inverters 400 and 402, respectively. M 2 and M 3 are at a low level for the entire line, so that the ENP inputs cannot go to a low level. Thus, only SHIFT can cause counters 198 and 200 to count. The signals M 1 + SHIFT , M 2 + SHIFT and M 3 + SHIFT are derived by supplying M 1 , M 2 and M 3 to inputs of OR gates 408 , 410 and 412 , the other inputs of which are supplied to SHIFT .

When a line memory 180 , 182 or 184 is read and the corresponding counters 196 , 198 and 200 count on the SHIFT signal as described, the counters count up when the signals AND ₁, AND ₂ and AND ₃ are high Find levels and count down when AND ₁, AND ₂ and AND ₃ are at a low level. As in the review of the write function, assume that the samples are being written into line memory 180 so that M 1 is high and M 2 and M 3 are low. It is also assumed that NMDECR are at a high level. Under these conditions, the output signal AND ₁ of the OR gate 202 ( Fig. 5) is at a high level, with the result that the counter 196 for the line memory in which is written, counts up as desired. The output signal AND ₂ of the OR gate 204 and the output signal AND ₃ of the OR gate 206 are also at a high level, so that the counters 198 and 200 are set to count up, but when NMDECR is at a low level set them to count down.

As counters 198 and 200 count up and down, the samples at the corresponding addresses of line memories 182 and 184 are entered into the Q _A section of shift registers 386 and 388 ( Fig. 10). The SHIFT signal also controls the shift registers 386 and 388 via the following logic circuit in Fig. 10. SHIFT is applied to one input of an AND gate 409 and one input of an AND gate 411 , while MDECR to the other input of the AND gate 409 and is fed to the other input of the AND gate 411 via an inverter 413 . The output of AND gate 409 is connected to the left shift inputs of shift registers 386 and 388 , while the output of AND gate 411 is connected to their right shift inputs. When the SHIFT signal goes high and MDECR is low, the AND gate 411 causes the registers to shift the samples they contain to the right and receive new samples at the inputs. However, if SHIFT and MDECR both go high, the AND gate 409 causes the samples in registers 386 and 388 to shift to the left, ie replace Q _A with Q _B , Q _B with Q _C , and so on. Shift registers 386 and 388 are eight words long and have the ability to additionally accommodate six samples while two words remain in the registers. SHIFT is set twice at the start of each line, in accordance with the effect of STRT 1 and STRT 2 , which are present at the input of OR gate 396 ( FIG. 5). Characterized the first two data points S ₁₀ and S ₁₁ of Fig. 3 for the line R ₀ and S _{10 '} and S _11' for the line R _I in the Q _B - and Q _A sections of their corresponding shift registers 386 and 388 entered . The interpolation can now proceed, but no further change occurs in the four samples until the display point scan signals YINC /, XDIR take a step to a display point that has a larger radius than that of the display point S ₁₁, S _{11 ′} , at which point the INCR signal goes high, causing SHIFT to go high and increments counters 198 and 200 and move the shift registers to the right so that samples S ₁₁ and S ₁₂ output Q _B and Q _{A of} the shift register 386 and samples S _{11 '} and S _12' the outputs Q _B and Q _{A of} the shift register 388 are supplied.

It is now assumed that the display point scanning signal effects a step to a display point whose radius is smaller than that of S ₁₁ and S _{11 '} , ie one step back over the respective inner radial limit. The DECR signal as well as the MDECR signal are now at a high level and, if one remembers that M 2 and M 3 are at a low level, it can be seen that the signals AND ₂ and AND ₃ are at a low level are located so that counters 198 and 200 are set to count down. The signal SHIFT causes the counters to count down and, in combination with MDECR , causes the shift registers 386 and 388 to shift left, causing the display points S ₁₀, S ₁₁ and S _{10 '} , S _11' back to the places Q _B or Q _A of registers 386 and 388 , respectively. If the step to the next display point causes a third crossing of the arc line on which S ₁₁ and S _{11 '} are located, the sample values S ₁₂ and S _12' lost from the registers cause no problem, since the next points from the line memories 182 and 184 the samples S ₁₂ and S _{12 '} are because the read address is controlled by SHIFT as previously described.

interpolation

Reference is now made to FIG. 10. The samples at outputs Q _A and Q _B of shift register 386 are applied to multiplier ROMs 414 and 416 , and the samples at outputs Q _A and Q _B of shift register 388 are supplied to multiplier ROMs 418 and 420, respectively. The signal RERR , which represents the radial position of the display point, is applied to all four ROMs after buffering in 415 . The data samples are represented by five-bit numbers, as is the case with the RERR signal, which is of course a fraction. The ROMs are programmed for the appropriate multiplication of RERR · Q _A value in 416 and 420 and of (1- RERR) · Q _B value in 414 and 418 . The output signal of the ROM 414 is given by a buffer 414 ' to one input of an adder 422 , and the output signal of the ROM 416 is given by a buffer 416' to the other input of the adder 422 , so that its output signal is the first interpolated intermediate data value. Similarly, the outputs of the ROMs 418 and 420 are fed through latches 418 ' and 420' to the inputs of an adder 424 so that its output is the second interpolated intermediate value.

The first and the second interpolated intermediate data I ₁ and I ₂ are supplied via latches 422 ' and 424' to the inputs of multiplier ROMs 426 and 428, respectively. Signal R ERR from the output of latch 354 in Fig. 8 is applied to multiplier ROMs 426 and 428 after passing through latches 430, 432 and 434 so that the outputs of ROMs 426 and 428 have the corresponding contributions of the first and second interpolated intermediate data value are generated to the final data value. The ROM 426 performs the multiplication of 1- R ERR by the output of the latch 422 ' , and the ROM 428 performs the multiplication of R ERR by the output of the latch 424' . Buffer 426 ' and 428' are connected between the outputs of the ROMs 426 and 428 and various inputs of an adder 436 , so that the final interpolated data value is generated at its output. After passing through buffers 438 and 440 and a buffer 441 , the final interpolated data is provided to the x and y addresses in display memory DM ' , which were determined by the x and y sector address counters 249 and 252 ( Fig. 7) that the display point is angularly and radially within the cut, a fact indicated by NVALD at the output of AND gate 306 ( FIG. 8) at a high level. The memory DM ' is scanned by a read controller 442 in any desired manner and the signals are applied to a display 444 so that an image is produced which is free from moiré patterns and other interference signals which are present in images from other imaging systems .

Summary of operation

The following table shows the values of the radius, COUNT and XHAT and the states of the display point scan control signals XDIR and YINC /, and INCR, DECR, XUP / DN, XCNT and YCNT for the display points DP ₅ to DP ₁₄ ( Fig. 9), where DP ₅ is the initial display point with the initial values for radius, COUNT and XHAT of R _i , C _i and XH _i . Usually the starting point is at the origin of the sector where all these values are zero, but the recursive addition could also start at any other display point for which the values are known accordingly. As previously stated, XDIR = 1 denotes a step away from the center of the sector, YINC / = 0 a step along the x axis and YINC / = 1 a step along the y axis from the origin. INCR and DECR can both be 0 if steps from one display point to another do not cross the radial boundary of an undercut . If one of these signals is 1, the step crosses such a limit, values of 1 for XCNT and YCNT indicate a step along the corresponding axis.

As a further aid to understanding the operation of the preferred embodiment according to Fig. 5, 6, 7, 8 and 10 serve Fig. 11 and 12, which show the timing of various signals used. The points in the circuit at which these signals occur are identified by corresponding letters in a circle.

Alternative embodiments and modes of operation

To increase the resolution of part of the image, e.g. B. in the middle, the radius lines of the scanner can be made closer together in this area. The scan converter system according to the invention could adapt to such a format by changing the ones and zeros in the memory of the state machine of Fig. 7 to provide scan control signals to select suitable display points, and by changing the stored values of the various trigonometric functions .

At the present time, the scanning speed of A / D converters is such that it is desirable to interpolate along the radial direction, but the progress in semiconductor technology is such that much higher scanning speeds can be expected so that such interpolation is not required . In such a case it would still be necessary to determine INCR and DECR so that correct samples, one from each radius line, can be selected. It would also be necessary to carry out the angular interpolation. The system described would work this way if the RERR signal were set to zero.

FIG. 13 shows a modification of the system in which the ROMs 414, 416 of FIG. 10 are replaced by a ROM 446 , the ROMs 418 and 420 by a ROM 448 and the ROMs 426 and 428 by a ROM 450 . The buffers have been omitted for the sake of clarity. ROMs 446, 448 and 450 are identical. Each contains a different stored output signal for all combinations of the error signal, be it RERR or R ERR , and the possible values of the samples. As shown, the RERR signal is applied to the ROMs 446 and 448 and the R ERR signal is applied to the ROM 450 so that the first interpolated intermediate data values I 1 and I 2 at the radial position of each display point are derived and the final interpolated data value FDP is derived at the angular position of the display point. In this case, the samples S ₁ and S ₂ would be those along one radius line of a section, and the samples S ₃ and S ₄ would be along the other radius line. However, as previously described, the signal R ERR could be supplied to the ROMs 446 and 448 and the signal RERR to the ROM 450 so that the first and second interpolated intermediate data values I ₁ 'and I ₂' are at the angular position of the display point. In this case there are S ₁ and S ₂ along one arc and S ₃ and S ₄ along another arc.

FIG. 14 shows a single semiconductor element 452 that internally performs all functions of the three elements 446, 448 and 450 in FIG. 13.

FIG. 15 shows an embodiment of the invention in which the signals RERR and R ERR are not actively derived when the display points of a cut are scanned. Rather, the values of RERR and R ERR for each display point were previously determined and are stored in a ROM 454 . The display point scan control signals XDIR and YINC / are provided by means 456 and the x, y address of each display point is determined by counters 458 and 460 in the manner explained above. The STRTL signal is applied to the ROM 454 , and to reduce the number of connections required, the word representing the first line of a sector can be used by means 462 for generating a signal at the start of each sector scan so that synchronization can be achieved. From the x, y address of a display point, the ROM 454 selects the appropriate stored values of INCR and DECR , which are used as explained in the description of FIGS. 5, 6, 8 and 10 to obtain the correct samples S. Select ₁, S ₂, S ₃ and S ₄ from the line memories. The final data values for all possible combinations of RERR , R ERR for each display point and DATA are stored in the ROM 454 . The appropriate final data value is selected for each point from the digital values of RERR , R ERR and DATA . The ROM 454 is thus a device that, based on the sample value and the display point sample control signals, determines the final interpolated data value for each display point.

The scanning transducer system according to the invention is suitable for enlarging a selected part of the image which lies between any two radius lines and within a given radius range. As will be described in a supplementary application, this can be achieved in that means are provided which contain a display mark for identifying the radius lines and the radius area, and means are provided for dividing RERR for each display point in the smaller part of the image by an enlargement factor m, and a device is provided for multiplying XHAT and COUNT for each display point in the smaller area by m. It would also be possible to scan the smaller part of the image faster in order to obtain clearer images of fast-moving objects there.

Instead of using a single radial position, two radial positions could also be calculated in the following way. For each line within the sector, two constants designated Δ R ₂ and Δ R ₁ would then be selected. Δ R ₂ would be a first accumulator and Δ R ₁ would be supplied to a second accumulator. These two accumulators would be updated whenever a movement in the y direction was indicated by the display point scanning signal. The first accumulator would use R ₂ in the calculation of the radius, which corresponds to the distance from the sector apex along the outer line to the intersection of the line where the current display point DP is located. The second accumulator would use R ₁ in the calculation of the radius corresponding to the distance from the sector apex along the inner line to the intersection of the same line, as described above. Each radius counter would generate its own INCR and DECR signals for the appropriate movement of the two shift registers so that the data pending at the Q _A and Q _B outputs of each shift register would limit their corresponding radius calculation. The two radius calculations would in turn generate two RERR signals, which one could call RERR ′ ′ _o for the outer line and RERR ′ ′ _i for the inner line. These signals would be used to interpolate the data pending at each shift register. The end result of the above procedure would be two interpolated intermediate data values, each of which would be limited by two samples, which do not necessarily have the same radial offset from the vertex. The interpolated intermediate data values would lie at the intersection of the current line of the output display and the two scan lines which are currently being read out from the line memories.

These two intermediate data values are then used in a manner which is analogous to the above-described method for correcting R ERR , the signals COUNT and XHAT being mainly used.

The end result is then a final data value, which is derived using COUNT and XHAT to interpolate the interpolated intermediate data values at the intersection of the current line of display points with the radius lines of an intersection.

As will be described in a supplementary application, the expansion of a selected area can be effected by multiplying R ERR for each display point in this area by an enlargement factor m and by dividing RERR by m.

Instead of scanning the display points contained within a pair of radius lines, it would be possible to identify display points in any desired sequence by their x and y addresses and to supply these addresses to a ROM which is programmed with R ERR, RERR, L # and the Number of the scan data. The L # and the sample data number are supplied to a ROM in which the sample data are stored so that the correct four sample data values are obtained for the interpolation. These and the values of R ERR and RERR are fed to an interpolation ROM, in which the final interpolated data values for each combination of the four sample data values and each combination of R ERR and RERR are programmed. It should be noted that the interpolated intermediate data values never appear, although they are used when programming the interpolation ROM.

Another possibility for the use of ROMs is to supply the x and y addresses of each display point to a ROM in which R ERR , RERR, INCR and DECR are stored. The sample data values are stored in a three-line buffer as described, and INCR and DECR are supplied to the buffer by an up / down counter so that a correct sequence of sample data values for each radius line is supplied to a different shift register. INCR and DECR are then used to operate the shift register as described so that the correct four samples are fed to the interpolation ROM. R ERR and RERR are also fed to the interpolation ROM, which is programmed so that all possible combinations of the four sample data values and R ERR and RERR can be achieved.

In all the embodiments of the invention described so far the signals that control the scan sequence of the display points, first derived and the corresponding data samples from which derive the final interpolated data values for the display points are derived in response to the scanning signals. It it is easy for the person skilled in the art to see that the sample data values could also be selected first while the display points, for deriving the final interpolated data values on which sample data values could be selected. It is only necessary that the sample data and the display points have such a relationship to one another that when deriving the final interpolated data values for a display point used samples define an area that is the display point contains.

Claims (11)

1. Circuit for transforming first data values, which are assigned to the intersection points between the radial rays and the arcs of a polar coordinate system concentric to the origin of the radial rays, into second data values, which are assigned to the pixels arranged in the rows and columns of a Cartesian coordinate system, with a memory for the first data values and a retrieval device for reading out selected first data values from the memory and forming the second data values depending on the representation of the pixels arranged in the Cartesian coordinate system, characterized in that the retrieval device read control ( 82) for each pixel from the memory ( 40 ) reads out at least four first data values, which are assigned to the intersection points between two radial beams and two circular arcs, which intersection points define a square enclosing the respective pixel, and that a computing circuit ( 112, 114, 116 ) is present which calculates the second data value assigned to the respective pixel by interpolation of the four first data values read out. 2. Circuit according to claim 1, characterized in that the computing circuit calculates a first device ( 112 ), a second device ( 114 ) from two first data values, which correspond to two intersection points lying on one side of the pixel, a first interpolated data value. which calculates a second interpolated intermediate data value from two other data values which correspond to two intersection points lying on the other side of the pixel, and means ( 116 ) which calculates the second data value assigned to the pixel from the two interpolated intermediate data values. 3. A circuit according to claim 2, characterized in that a device ( 104 ) is provided for generating a signal which represents the angular position of the respective pixel in relation to the distance between the two radial beams adjacent to this pixel, that the device ( 112 ) for Calculating the first interpolated intermediate data value carries out an interpolation between two data values which correspond to two intersection points on the one of the two radial beams of the polar coordinates adjacent to the pixel, so that the means ( 114 ) for calculating the second interpolated data intermediate value performs an interpolation between two data values, the two intersection points on the other of the two radial beams adjacent to the pixel correspond to the polar coordinates, and that the device ( 116 ) for calculating the second data value from the two interpolated intermediate data values corresponds to the final interpolation corresponding to that of the angular position of the corresponding signal. 4. A circuit according to claim 3, characterized in that means ( 84 ) are provided for generating a signal which represents the radial position of the respective pixel and that the means ( 112, 114 ) for calculating the interpolated intermediate data values correspond to the radial position of the image point in relation to the radial positions of the intersection points. 5. A circuit according to claim 2, characterized in that a device ( 84 ) is provided for generating a signal which represents the radial position of the respective pixel, that the device ( 112, S 1 ) for calculating the first interpolated intermediate data value an interpolation between makes two data values which correspond to two intersection points on the one of the two circular arcs of the polar coordinates adjacent to the pixel, that the device ( 114 , S 1 ) for calculating the second interpolated intermediate data value carries out an interpolation between two data values which two intersection points on the other of the two arcs of the polar coordinates adjacent to the pixel, and that the device ( 116 ) for calculating the second data value from the two interpolated intermediate data values carries out the final interpolation in accordance with the signal (S 2 ) corresponding to the radial position of the pixel. 6. A circuit according to claim 5, characterized in that means ( 104 ) are provided for generating a signal which indicates the angular position of the respective pixel and that the means ( 112, 114 ) for calculating the interpolated intermediate data values correspond to the angular position of the pixel with respect to the angular positions of the radial rays defining the intersection points. 7. A circuit according to claim 4 or 5, characterized in that the device ( 24 ) for generating the signal which indicates the radial position of the respective pixel has a device (DPSG) which generates scanning signals which identify the pixels which identify each other are on a predetermined path which leads from a predetermined pixel whose radial position is known to the respective pixel, and a further device ( 58, 60 ) for generating a sum signal indicating the radial position of the respective pixel which is a function of the Sampling signals for each step on the given path to which the signal indicating the known radial position of the given pixel adds one of the following values: + K _x sin R for each step along a line from one pixel to the next, if the step is from the center line of the sector, - K _x sin R for each step along a line from a B Image point to next as the step approaches the center line of the sector, + K _y cos R for each step along a column from one pixel to the next if the step moves away from the origin of the sector, and - K _y cos R for each Step along a column from one pixel to the next as the step approaches the origin of the sector, where R is the angle between the direction of the columns of the pixels and a radial beam of the polar coordinates adjacent to the respective pixel, K _x the distance between the columns and K _{y is} the distance between the rows of pixels. 8. The circuit according to claim 7, characterized in that the device ( 24 ) for generating the signal which represents the radial position of the respective pixel further comprises a device ( 84 ) which the difference between the sum signal assigned to the respective pixel and the Radius of one of the two arcs of the polar coordinate system adjacent to the respective image point forms as a fraction of the uniform radial distance S between the arcs of the polar coordinate system. 9. A circuit according to claim 8, characterized in that K _x and K _{y are} in such a ratio to the distance S that the difference as a fraction of S is equal to the fractional part of the sum. 10. The circuit according to claim 3, 4 or 6, characterized in that the means ( 24 ) for generating the signal which indicates the angular position of the respective pixel has a device (DPSG) which generates scanning signals which identify the pixels that are on a predetermined path that leads from a predetermined pixel, whose radial position is known, to the respective pixel, and a further device that produces a signal that indicates the known distance of the predetermined pixel from a radial beam that corresponds to the respective one Pixel is adjacent, one of the following values is added: + K _x for each step along a line from one pixel to the next when the step moves away from the radial beam, - K _x for each step along a line from one pixel to the next , when the step approaches the radial, + K _y tg R for each step along a column from a bil dpoint to the next, if the distance to the radial beam increases, and - K _y tg R for each step along a column from one pixel to the next, if the distance to the radial beam decreases, where R is the angle between the directions the columns of the pixels and the radial beam of the polar coordinates adjacent to the respective pixel,
K _{x is} the distance between the columns and K _{y is} the distance between the rows of the pixels. 11. The circuit according to claim 10, characterized in that the means ( 24 ) for generating the signal indicating the angular position of the respective pixel, the distance of the pixel from the adjacent radial beam as a fraction of the measured along the line containing the pixel distance between two determines the respective pixel between enclosing radial rays, which form the angle R ₁ or R ₂ with the columns of the pixels, and for this purpose a device ( 88 ) which has a signal Δ XHAT = K _y (tg R ₁-tg R ₂ ) generates a device ( 90, 92 ) for calculating a sum signal which, depending on the scanning signals for each step on the predetermined path, leads to a signal which contains the distance between the measured along the line of the Cartesian coordinate system which contains the predetermined pixel Radial rays, between which the respective pixel is located, adds one of the following values: + Δ XHAT for each Step from one line to the next when the step moves away from the origin of the sector, and - Δ XHAT for each step from one line to the next when the step approaches the origin of the sector, and further means comprising the distance of the respective pixel from the adjacent radial beam signal divided by the sum signal.