DE3065251D1 - First-come first-served resource allocation apparatus - Google Patents

First-come first-served resource allocation apparatus

Info

Publication number
DE3065251D1
DE3065251D1 DE8080901030T DE3065251T DE3065251D1 DE 3065251 D1 DE3065251 D1 DE 3065251D1 DE 8080901030 T DE8080901030 T DE 8080901030T DE 3065251 T DE3065251 T DE 3065251T DE 3065251 D1 DE3065251 D1 DE 3065251D1
Authority
DE
Germany
Prior art keywords
come
resource allocation
allocation apparatus
served
served resource
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8080901030T
Other languages
English (en)
Inventor
Sudhir Raman Ahuja
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Application granted granted Critical
Publication of DE3065251D1 publication Critical patent/DE3065251D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/3625—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using a time dependent access
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/372—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a time-dependent priority, e.g. individually loaded time counters or time slot

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Aerials With Secondary Devices (AREA)
DE8080901030T 1979-05-14 1980-04-29 First-come first-served resource allocation apparatus Expired DE3065251D1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/038,834 US4281381A (en) 1979-05-14 1979-05-14 Distributed first-come first-served bus allocation apparatus
PCT/US1980/000471 WO1980002608A1 (en) 1979-05-14 1980-04-29 Distributed first-come first-served bus allocation apparatus

Publications (1)

Publication Number Publication Date
DE3065251D1 true DE3065251D1 (en) 1983-11-17

Family

ID=21902168

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8080901030T Expired DE3065251D1 (en) 1979-05-14 1980-04-29 First-come first-served resource allocation apparatus

Country Status (8)

Country Link
US (1) US4281381A (de)
EP (1) EP0028631B1 (de)
JP (1) JPH0227697B2 (de)
AU (1) AU542508B2 (de)
BE (1) BE883264A (de)
CA (1) CA1129031A (de)
DE (1) DE3065251D1 (de)
WO (1) WO1980002608A1 (de)

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JPS564854A (en) * 1979-06-22 1981-01-19 Fanuc Ltd Control system for plural microprocessors
US4428046A (en) 1980-05-05 1984-01-24 Ncr Corporation Data processing system having a star coupler with contention circuitry
FR2490434B1 (fr) * 1980-09-12 1988-03-18 Quinquis Jean Paul Dispositif de resolution des conflits d'acces et d'allocation d'une liaison de type bus interconnectant un ensemble de processeurs non hierarchises
US4451880A (en) * 1980-10-31 1984-05-29 Honeywell Information Systems Inc. Memory controller with interleaved queuing apparatus
FR2503898B1 (fr) * 1981-04-08 1986-02-28 Thomson Csf Procede et dispositif d'allocation d'une ressource dans un systeme comportant des unites de traitement de donnees autonomes
US4630193A (en) * 1981-04-27 1986-12-16 Textron, Inc. Time multiplexed processor bus
US4451881A (en) * 1981-11-03 1984-05-29 International Business Machines Corp. Data processing system bus for multiple independent users
US4463445A (en) * 1982-01-07 1984-07-31 Bell Telephone Laboratories, Incorporated Circuitry for allocating access to a demand-shared bus
US4473880A (en) * 1982-01-26 1984-09-25 Intel Corporation Arbitration means for controlling access to a bus shared by a number of modules
US4536839A (en) * 1982-03-30 1985-08-20 Mai Basic Four, Inc. Memory request arbitrator
US4604689A (en) * 1983-04-15 1986-08-05 Convergent Technologies, Inc. Bus repeater
US4556939A (en) * 1983-04-29 1985-12-03 Honeywell Inc. Apparatus for providing conflict-free highway access
US4641266A (en) * 1983-11-28 1987-02-03 At&T Bell Laboratories Access-arbitration scheme
US4633394A (en) * 1984-04-24 1986-12-30 International Business Machines Corp. Distributed arbitration for multiple processors
EP0166062B1 (de) * 1984-06-29 1989-10-25 International Business Machines Corporation Arbitervorrichtung zum Zugriff an einem anteilig genutzten gemeinsamen Betriebsmittel
DE3432430A1 (de) * 1984-09-04 1986-03-13 Robert Bosch Gmbh, 7000 Stuttgart Verfahren zur ueberpruefung von steuergeraeten
US4817082A (en) * 1987-03-09 1989-03-28 American Telephone And Telegraph Company, At&T Bell Laboratories Crosspoint switching system using control rings with fast token circulation
BE1001290A4 (fr) * 1987-03-27 1989-09-19 Ibm Dispositif d'arbitrage d'acces a memoire direct.
US5241661A (en) * 1987-03-27 1993-08-31 International Business Machines Corporation DMA access arbitration device in which CPU can arbitrate on behalf of attachment having no arbiter
US4901234A (en) * 1987-03-27 1990-02-13 International Business Machines Corporation Computer system having programmable DMA control
US4933901A (en) * 1988-01-11 1990-06-12 Texas Instruments Incorporated Method for assigning priority to read and write requests received closely in time
AU582101B3 (en) * 1988-05-12 1989-02-28 Gregory John De Vere Computer share device
US5253343A (en) * 1988-08-18 1993-10-12 La Telemecanique Electric Method for the management of a memory of messages in a station of a data transmission network, and station designed for the implementation of the method
US5155854A (en) * 1989-02-03 1992-10-13 Digital Equipment Corporation System for arbitrating communication requests using multi-pass control unit based on availability of system resources
JPH0429767U (de) * 1990-06-29 1992-03-10
EP0464237A1 (de) * 1990-07-03 1992-01-08 International Business Machines Corporation Busarbitrierungsschema
US5522080A (en) * 1991-10-24 1996-05-28 Intel Corporation Centralized control SIMD processor having different priority levels set for each data transfer request type and successively repeating the servicing of data transfer request in a predetermined order
US5265211A (en) * 1992-01-02 1993-11-23 International Business Machines Corporation Arbitration control logic for computer system having dual bus architecture
EP0559408B1 (de) * 1992-03-04 1998-08-26 Motorola, Inc. Verfahren und Gerät zur Busarbitrierungsdurchführung mit einem Arbiter in einem Datenverarbeitungssystem
US5265212A (en) * 1992-04-01 1993-11-23 Digital Equipment Corporation Sharing of bus access among multiple state machines with minimal wait time and prioritization of like cycle types
JP2566719B2 (ja) * 1992-04-20 1996-12-25 インターナショナル・ビジネス・マシーンズ・コーポレイション データ通信インタフエース及びその動作方法
JP2591502B2 (ja) * 1994-12-09 1997-03-19 日本電気株式会社 情報処理システムおよびそのバス調停方式
US5740383A (en) * 1995-12-22 1998-04-14 Cirrus Logic, Inc. Dynamic arbitration priority
US7072817B1 (en) * 1999-10-01 2006-07-04 Stmicroelectronics Ltd. Method of designing an initiator in an integrated circuit
JP4182246B2 (ja) * 2002-11-27 2008-11-19 富士通マイクロエレクトロニクス株式会社 バス共有システム及びバス共有方法
US7275125B2 (en) * 2005-02-24 2007-09-25 International Business Machines Corporation Pipeline bit handling circuit and method for a bus bridge
US7206886B2 (en) * 2005-02-24 2007-04-17 International Business Machines Corporation Data ordering translation between linear and interleaved domains at a bus interface
US7330925B2 (en) * 2005-02-24 2008-02-12 International Business Machines Corporation Transaction flow control mechanism for a bus bridge
US7275124B2 (en) * 2005-02-24 2007-09-25 International Business Machines Corporation Method and system for controlling forwarding or terminating of a request at a bus interface based on buffer availability
US20060190655A1 (en) * 2005-02-24 2006-08-24 International Business Machines Corporation Apparatus and method for transaction tag mapping between bus domains
US7234017B2 (en) * 2005-02-24 2007-06-19 International Business Machines Corporation Computer system architecture for a processor connected to a high speed bus transceiver
US7194567B2 (en) * 2005-02-24 2007-03-20 International Business Machines Corporation Method and system for ordering requests at a bus interface

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3638198A (en) * 1969-07-09 1972-01-25 Burroughs Corp Priority resolution network for input/output exchange
US3689897A (en) * 1971-01-13 1972-09-05 Burroughs Corp Switching maxtrix control circuit for handling requests on a first-come first-serve priority basis
US4017841A (en) * 1973-11-23 1977-04-12 Honeywell Inc. Bus allocation control apparatus
US3999170A (en) * 1975-01-08 1976-12-21 Hewlett-Packard Company Multiple access interconnect system
US3978451A (en) * 1975-04-21 1976-08-31 Rca Corporation Controlling communications between computer devices over common bus
US4030075A (en) * 1975-06-30 1977-06-14 Honeywell Information Systems, Inc. Data processing system having distributed priority network
US3983540A (en) * 1975-09-08 1976-09-28 Honeywell Inc. Rapid bus priority resolution
US4096571A (en) * 1976-09-08 1978-06-20 Codex Corporation System for resolving memory access conflicts among processors and minimizing processor waiting times for access to memory by comparing waiting times and breaking ties by an arbitrary priority ranking
JPS5931736B2 (ja) * 1977-01-25 1984-08-03 株式会社東芝 待ち行列管理方式
US4148011A (en) * 1977-06-06 1979-04-03 General Automation, Inc. Asynchronous priority circuit for controlling access to a bus
US4161779A (en) * 1977-11-30 1979-07-17 Burroughs Corporation Dynamic priority system for controlling the access of stations to a shared device

Also Published As

Publication number Publication date
US4281381A (en) 1981-07-28
AU5997880A (en) 1981-01-15
CA1129031A (en) 1982-08-03
JPS56500552A (de) 1981-04-23
WO1980002608A1 (en) 1980-11-27
EP0028631A4 (de) 1981-09-21
AU542508B2 (en) 1985-02-21
EP0028631B1 (de) 1983-10-12
JPH0227697B2 (de) 1990-06-19
BE883264A (fr) 1980-09-01
EP0028631A1 (de) 1981-05-20

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee