DE2954746C3 - Method for generating incremental displays of analog operating parameters of a television receiver on its screen - Google Patents

Description

The invention relates to a method for generating incremental displays of analog operating parameters ter, namely volume, brightness and / or color intensity, of a television receiver on its screen and a television receiver capable of producing such a display as well as the use of the television receiver for incremental display.

From Grundig, Technical Information 3/76 "The Clock Building Block", pages 741 to 750, it is known for Tuning a television receiver to the tuning frequency of the television channel to a character generator use the so-called tuning lines as tick marks in the television picture on a display line Scaling fades in, and that additionally a tuning line is superimposed on these scaling lines, whereby the length of the tuning line is proportional to the tuning voltage. Each part corresponds to about one stroke Channel, the tuning line covers approximately one scaling line when a channel is newly set. With The display shown in this document is a rough estimate of the tuning voltage and thus of the tuning frequency possible, since the resolution of the display does not help with the fine tuning is sufficient to change the length of the line and not the number of the line change covered scale lines.

Furthermore, from DE-OS 24 32 600 is an arrangement for displaying various linear and digital signals sizes known on the screen of a color television receiver, by means of a color bar genes rators a color bar is generated, the length of the respective operating parameter value, z. B. the volume is proportional. In the known representation of operating parameter values using a continuous changeable color bar, the user sitting at a greater viewing distance has the problem with the fine adjustment to recognize changes in the color bar. With the calibration of the final value to the left or right edge of the image, the user is now able to estimate the current absolute value of the operating parameter approximately. The smaller the value, the greater the inaccuracy speed. Furthermore, an exact reproduction of analog parameters to certain values is not possible.

From DE-OS 24 32 600 it is also for the display of analog operating parameters in television receivers known to provide luminous lines of luminescence diodes on the front panel of the television receiver. This According to DE-OS 24 32 600, optical display devices already have the significant disadvantage that the display value for a remote control is no longer transmitted clearly enough over long distances can, since the size of the signal elements is not in the correct ratio to the screen size, the more well-known wise sets the viewing distance. In addition, the circuitry complexity increases disproportionately on if the electronic positions of several manipulated variables are to be displayed.

A color bar proportional display comparable to DE-OS 24 32 600 for color televisions is from Radio Mento Elektronik magazine, volume 41 (1975), pages 349-351. There is a gradual adjustable operating parameters, e.g. B. for volume, a television receiver via a color bar with a generated analog circuit, with the color bar gradually, but only continuously in length Lich can change due to the integration of the stage signal.

Furthermore, it is known from the data sheet MOS Data Spring 1977, Microelectronics, General Instrument Corp ,, to tune a television receiver using a character generator scaling lines on the picture screen of a television receiver and a bar display above the scaling lines see, the length of the bar depends on the tuning voltage. Again, the resolution is enough However, this display is not sufficient to change the tuning voltage during fine tuning indication by changing the length of the bar.

In addition, an advertisement is known from the 1977 SABA range, which in turn is only for voting purposes tion of a television set is used. For this purpose, a scaling of a multitude of vertically aligned scale lines and a cursor in green, showing the position the cursor, which is just the front end of a truncated bar, depending on the tuning voltage changes. Even with this display, it is not possible for the position of the cursor to change in just a few steps the fine-tuning changes, which changes the number of scale bars left and right of that Cursor would result. Both the scaling and the cursor are generated with an analog circuit, but not with a character generator in which alphanumeric characters for the time or channel display are saved.

From US-PS 4,025,945 there is also a display system for a television set using a character generator known, the character generator used to display the channel number on the screen. However, if an operating parameter, e.g. B. the color saturation, set the channel number in the for this Operating parameter type predetermined color faded in. For example, the channel number lights up on the color saturation blue, green for brightness and red for volume.

A display system is known from US Pat. No. 3,778,811, in which one also uses a character generator TV screen bars of different lengths and shapes can be generated, the bar length business information is assigned. The length of the bar corresponds to a value of the information.

Another method for generating displays of analog operating parameters of a television receiver on its screen by means of colored bars is known from Electronics, November 27, 1975, pages 6e and 8e. The bar assumes a specific color for each type of operating parameter. Overall, it is for all Known prior art displays only possible a more or less rough estimate of the value of the respective operating parameter and the circuitry is enormous.

The object of the invention compared to the displays and display devices described is in a method for generating displays of analog operating parameters of a television receiver whose screen or the operating parameters for a television receiver to carry out the method  display values more precisely with regard to their changes and / or absolute values.

The object is achieved according to the invention with a method for generating incremental displays ger operating parameters, namely volume, brightness and / or color intensity of a television receiver its screen using a character generation device connected to a microprocessor device with a character memory in which data of alphanumeric and abstract characters are stored, and a data memory connected to the microprocessor, in which volume, brightness and / or color intensity data are saved and the character generating device using the stored th data from the data memory is controlled so that it generates a screen display signal, which consists of a first sequence of a first number of characters, the first number of characters of the first Character string is proportional to the level of the operating parameter assigned to the display signal.

To carry out the method is a television receiver with a screen and one of one Microprocessor-controlled character generation device is provided, which has a character memory in the data of alphanumeric and abstract characters are stored, and the television receiver one with the data processor connected to the microprocessor, in the volume, brightness and / or color inks sity data are stored, and the character generation device can be controlled by the microprocessor in this way is that a display signal can be generated on the screen, which consists of a first sequence of a first number of characters where the first number of characters in the first string is proportional to the level of one Signal associated analog operating parameters, namely volume, brightness and / or color intensity, the TV receiver.

In an alternative solution, the television receiver is analog, step-by-step for generating advertisements adjustable operating parameters, namely volume, brightness and / or color intensity of the television receiver characterized on the television screen in that the television receiver one with a microprocessor connected character generator with a character memory in which data from alphanume Rical characters are stored, has a data memory connected to the microprocessor, in which Volume, brightness and / or color intensity data are stored and the character generator can be controlled by means of the microprocessor in such a way that it generates a screen display which consists of a there is a numerical specification, the numerical specification indicating the level of the operation assigned to the signal parameters is proportional.

The incremental display of an incrementally adjustable generated by the method according to claim 1 analog operating parameters, namely volume, brightness and / or color intensity of a television receiver on its screen is characterized in that the display consists of a sequence of a first number of there are characters next to each other, each character has a set increment of Be Drive parameters is assigned and the first number of characters in the first string to the level of Operating parameter is proportional.

Advantageous further developments and refinements of the invention are described in the subclaims.

The invention is based on the consideration of an incremental representation of operating parameter values le display in the form of a sequence of first characters, the number of which is the current set Corresponds to the operating parameters. In this way, the current absolute value as well as the finest change of the displayed operating parameter, even from a distance from the image display device NEN, which makes the setting of the operating parameters easier overall.

Known bar-generating devices can be dispensed with completely for the display, since alone with the data memory for the operating parameter data, the microprocessor and the associated characters generating device the incremental display is possible, which enables the viewer to each Perceiving a change in an operating parameter in the form of changing the number of first characters that then only need to be counted down, alternatively it is also possible to equal the number of characters of the play the first string in the form of a numerical specification on the screen.

The invention is explained in more detail with reference to the exemplary embodiments shown in the drawings.

Show it:

Fig. 1 is a block diagram of the essential assemblies of an image display device according to the invention;

FIGS . 2 to 4 are flow diagrams for explaining the logic processes carried out by the image display device according to FIG. 1;

FIGS. 5 and 6 details of individual functional blocks of the playback device according to FIG. 1; and

Fig. 7 is a block diagram of the essential assemblies of a further embodiment of an image display device designed in accordance with the invention.

In detail the block diagram of the reproducing apparatus 1 is shown in FIG. 1, a receiving antenna which is connected to a tuner 2 with variable capacitance diodes. A signal converted to an intermediate frequency IF is available at the output of tuner 2 . The tuner 2 can be constructed in a known manner and essentially consists of a selective amplifier stage, a mixer and an internal oscillator.

An output of the oscillator is connected to a first frequency divider 3 , which divides the output frequency of the oscillator by a predetermined divisor N1. The output of the first frequency divider 3 is connected to the signal input of a second frequency divider 4 , which divides the output frequency of the first frequency divider by a variable divisor N and which can be controlled with 12-bit programming signals, so that it can be controlled by each divisor N between 1 and 2 ^{12 can} share.

The output of the second frequency divider 4 is connected to a first input of a phase-frequency comparator 5 , at the second input of which a reference signal is present, which is supplied from a quartz generator 6 via a third frequency divider 7 . The output of the comparator 5 is connected to the control input of the tuner via an amplifier and filter circuit 8 .

Furthermore, a control unit 10 is provided which, in addition to the other control buttons for switching on and off, the volume, brightness, contrast and color matching, additionally has a field of ten numeric buttons, which with 0 to 9 (or as letters with the buttons Letters A to L) are designated. Seven auxiliary keys are also provided on the control unit 10 , which are identified by the symbols +, -, T, C. OR, M, CT (or +, -, R1, R2, R3, R4, CT).

The control unit 10 is connected to a first group of eight input / output connections of a processor 11 and to the address inputs of a memory 12 . The processor 11 also has a second set of eight input / output ports which are connected to the data input / output ports of the memory 12 and also to the inputs of a character generator 16 which is connected to a display unit (which is part of the picture tube of FIG Receiver unit). A third group of sixteen connections of the processor 11 is connected to the following connections of the further circuits:

• with twelve programming inputs of the second frequency divider 4 ,
• - with two band switch inputs (U and BIII) of tuner 2 ,
• with a control input of the character generator 16 ,
• with a first input of a combining circuit 14 .

The memory 12 also has two control inputs which are connected to the output of the combining circuit 14 , which receives a signal from the processor 11 at a second input and a signal from a switch-on detector 15 at a third input. The detector 15 in turn receives a signal from the main power supply of the television receiver while it is. Output is additionally connected to a reset input of the processor 11 . The memory 12 and the combining circuit 14 , which is made up of CMOS elements and has a low power consumption, are connected to an internal supply voltage source, in particular a battery 13 .

The circuit works as follows:
The circuits 3 , 4 , 5 and 8 together with the internal voltage-controlled oscillator (VCO) of the tuner 2 form a phase-locked loop which is controlled in a known manner by the output signal of the quartz generator 6 divided by the third frequency divider 7 .

The purpose of the first frequency divider 3 is to lower the frequencies that occur to a more manageable level, while the programmable second frequency divider 4 allows the loop to be adjusted to a number of frequencies of the internal oscillator; the second frequency divider 4 thus works as a frequency synthesizer circuit. Specifically, the phase-frequency comparator 5, after selection of a specific divisor N for the divider circuit 4, supplies the tuner 2 with a control voltage via the amplifier and filter circuit 8 , on the basis of which the following conditions are met:

where f2 = frequency of the internal oscillator of tuner 2 , where f6 = frequency of quartz generator 6 , where N ₂ , N ₁ and N are the divisors of frequency dividers 3 , 6 and 4 , respectively, and where p = f6 × N ₁ / N ₂ sensitivity of the system, sensitivity being the change in frequency of the internal oscillator as a function of changes in divisor N.

The receiver must be tunable to radio or television stations that send zen with predetermined frequencies, for example with the frequencies acc. the CCIR / BG standard established at the 1961 European Broadcasting Conference in Stockholm. According to the decisions made at this conference, the distance between adjacent channels in the VHF bands I and III is 7 MHz and in the UHF bands IV and V 8 MHz each with a video signal bandwidth of 5 MHz. The relevant radio stations are in the range of television channels 2-69 (corresponding to the video carrier frequencies of 48.25 and 855.25 MHz) with an intermediate frequency IF of 38.9 MHz. The internal oscillator of the tuner of a receiver must therefore be able to generate frequencies between 87.15 and 894.15 MHz. A step width of 0.25 MHz was selected so that the following equations are obtained for the two (limit) channels mentioned above:

By changing the divisor N between its maximum value and its minimum value, one can Tuning to every television channel in the VHF and UHF bands with a maximum error of 125 kHz gene.

Since the entire specified frequency band cannot be used, the tuner 2 is provided with two band switch inputs U (UHF / VHF) and B (BIII / BI), so that it is ensured that only the bands actually used are swept. The first frequency divider 3 is a fast ECL divider (type SP 8750) that divides by 64. The second frequency divider 4 is a programmable TTL divider (type: SN 74LS191, 3x), which can work with frequencies up to about 15 MHz. Circuits 5 , 6 and 7 consist of an integrated circuit (type: SP 8760). with a 250 kHz crystal and a divisor N ₂ of 64, so that the comparator operates at a frequency of 3906.25 Hz, which corresponds to a quarter of the line frequency. The purpose of the amplifier and filter circuit 8 is to adjust the output level of the comparator 5 (max. 5 V) to the needs of the tuner 2 (max. 30 V) while ensuring the best possible filtering and optimal stabilization of the loop frequency.

The processor 11 , a microprocessor, is used, among other things, to generate the programmed information for the divisor N and the switching signals for the band switching, so that a tuning can be carried out on certain television stations, on the basis of the data provided by the user can be entered on the keypad of the control unit 10 . The processor 11 can also send and receive signals to the memory 12 and also send signals to the character generator 16 .

The divisor N is calculated according to the following equation:

N = (K × F + C) × 4 + S.

The functions outlined above are performed as a series of elementary operations by a logic arithmetic logic unit (ALU) based on instructions contained in the program memory (ROM) of the processor 11 , which in the present case is an F8 type microprocessor . In equation (3) mean: C = constant correction factor; F = factor dependent on the selected band; K = channel number after Stockholm conference and S = variable, which can be changed for fine tuning.

If the channel number K is changed, only the frequencies that correspond to the standard channels are retained correspond, the step size being equal to F (8 MHz in the UHF band and 7 MHz in the VHF band), during one Changing the variable S by one unit results in a frequency shift of 0.25 MHz.

With suitable control via the keypad, various methods are used, some of which are customary ne modes of operation possible to tune to a given transmitter station.

Whenever one of the buttons is pressed, the processor 11 sends a 48-bit sequence in ISO code to the character generator 16 , whereupon the television screen displays three lines of sixteen characters each.

The specified data sequence contains a time specification (hours, minutes, seconds). In addition, the data sequence includes partially predefined data from the program memory (for example "CHANNEL" and "KEY" as indicated in FIG. 1) and partially variable data which are dependent on which control buttons are pressed by the user and the situation that then arises, the latter data being stored in a buffer memory of the processor 11 (for example, the letter T in the upper right corner of the display unit in FIG. 1 indicates the operating mode. Furthermore, the numbers 21 + 01 show the Number of channels and the tuning correction).

The time display is automatically corrected every second, even if there are none in between Button is pressed.

If one of the keys with the symbols T, C, OR or M is actuated, the corresponding operating mode is hereby set and stored in the buffer memory of the processor 11 . At the same time, one or more question marks are entered in the buffer memory at appropriate points in order to prompt the user to trigger the next control step. The content of the buffer memory is transferred to the character generator and displayed on the television screen.

A few examples will now be given with regard to the processes described above.

When the "T" key is pressed, the display unit provides the following display:

In this way, the user is informed that he has selected the operating mode "T" (selection from the memory) and that the arrangement is now waiting for a number key to be pressed (namely a Key with which a certain memory location is called up).

N.B .: In the example above, the string OO: MM: SS stands for the time display in hours, minutes and Seconds.

When the "C" key is pressed, the following is displayed:

This display informs the user that he is operating mode "C" (direct selection) has chosen and that the arrangement now expects the actuation of two number keys (keying in the channel number).

If the channel number entered by pressing the two buttons corresponds to one of the standard channels, this number is displayed instead of the two question marks next to the word "CHANNEL". If, on the other hand, the channel number entered does not correspond to a standard channel, the following is displayed:

In this way, the user is informed that the keyed control signals are not executed (there is no channel 88 according to the C.C.I.R. norm) and that the arrangement awaits further commands.

If the "OR" key is pressed, the following is displayed:

This display alerts the user that the television receiver is still is set to the operating mode "T" and that the channel 21 is set with tuning correction, the one Frequency shift corresponds to 250 kHz. (Storage of the fact that the 0 key was pressed). It also indicates to the user that the array is waiting for six number keys to be followed the other is pressed to set the "clock" to the time in hours, minutes and seconds. As soon as If the time is entered by pressing the six buttons, the corresponding number will be displayed instead of "OR" displayed. In addition, the pairs of "??" are represented by corresponding digit pairs representing the hours, minutes and seconds, replaced, provided that the keyed digits are possible.

The arrangement actually checks the numbers keyed in and leaves the "??" stand when an hour number over 23 or a ten-minute or ten-second number over 5. In this way the User pointed out that the arrangement is waiting for the input of a possible pair of digits. If once the time has been keyed in, the "clock" starts the time based on the entered time, display. The arrangement is designed so that after a power failure for hours, minutes and seconds of all zeros are displayed so that the user is alerted by this "time display" sam is made that there was a temporary power failure.

If the "M" key is pressed, the following is displayed:

This display shows the user that the television is still set to "T" mode, that the television is set to channel 21 with correction +01, and that the arrangement is waiting for a number key to be pressed to vote trigger on a saved channel. If, for example, the "0" key is now pressed, the display according to block 9 in FIG. 1 appears, which means that the "0" key is assigned the "CHANNEL 21 with correction + 1" vote. If you now press the "+" key, the following is displayed:

This display shows the user that the television is still set to the "T" mode and that an additional tuning correction was made, namely in the direction of the hearing frequency carrier of the received video signal. Depending on the key actuation, the programmed bare second frequency divider a suitably modified divisor N. In addition, the new tuning condition is automatically saved in the memory location assigned to the "0" key. The processes are running similarly when the "-" button is pressed, but with a tuning correction in the direction of the Video carrier is done. If there is a vote on the nominal frequency, the "+" sign disappears with the following digits. Then if a correction is made in the opposite direction, the character "-" appears with the associated digits, which indicate the number of correction steps. The The system is designed so that the number of correction steps is between -16 and +15. It goes without saying that the tuning correction can be carried out in the same way if the arrangement is in the operating mode "C" (Direct dialing) is set. In this case, however, the set values are not saved automatically Data and the correction. Rather, the key is used to save the tuning conditions "M" and the subsequent actuation of a number key required.

When the "CT" key is pressed, the following display appears:

This display shows the user by the symbols "+" next to the mode display that the arrangement is set so that it is ready for a number of other functions that correspond to a second symbol or a second indication on each of the keys. The actuation of the "CT" key also has the consequence that the processor 11 supplies the character generator 16 with a switching signal so that the latter changes the color in which the writing appears on the screen or the background color of the screen so that it is special for the user it becomes clear that from this point in time the control elements accessible to him are assigned to the second button function (the above information relates to color television sets). With black and white devices, it is possible to switch from a light to a dark background or vice versa and to switch the display of the characters accordingly.

If one of the keys "A" to "L" is pressed, the following display appears:

This indicates to the user that the television is operating in the "C" mode, but in In this case the channels can be selected directly according to the Italian standard by pressing a single button the display of the channel to be received is pressed.

If one of the buttons "R1";"R2","R3" or "R4" is pressed, the following display results, for example:

This indicates to the user that the device is performing an automatic search, for example a search of the Type 1 executes or scans all channels whose data are stored in memory.

The search is carried out automatically with a two-second time interval, whereby the number (for example "0") of the button and the number of the associated channel are always displayed. At the same time, the processor generates 1 l. in each case the corresponding divisor N for the channel on which tuning is to take place. The search ends when any other key is pressed. If one of the "+" or "-" keys is pressed, the arrangement is switched to manual advance or to the reversal of the search direction (each time the "+" key is pressed, the key number is increased, while with one Pressing the "-" key number is reduced). If the "CT" key is pressed, the arrangement switches back, so that the first symbol on the keys now applies again and awaits further commands, in particular tuning corrections or save commands. In a corresponding manner, after a switchover to the second key symbol by actuating the "CT" key when "R2" is actuated, a type 2 search is started, in which all standard channels are searched with switching intervals of one second. Such a search can be interrupted in the same way as a type 1 search.

If the "R3" key is pressed, this initiates a continuous search in the set one Frequency band with steps of 1 MHz (four fine-tuning steps are carried out per second), such a search is used to detect stations that do not work on one of the standard frequencies, The same type of search, but at a reduced speed (one switching step every two seconds den) is initiated by pressing the "R4" key.

During a search of type 2, 3 or 4, the word "KEY" is not displayed.

The display or omission of the words "CHANNEL" and "KEY" depends on whether in individual cases a command "display" or "non-display" is stored in the program memory. The processor also includes a timer that provides a switch signal (bit 6, port 1) to the character generator 16 15 seconds after the last key was pressed, reducing the display to one line and also halving the height of the displayed characters ( seven television lines instead of fourteen television lines) to reduce the disturbance of the picture.

Such a switching signal is preferred in an automatic search or when setting the time wise not generated.

In order to prevent the data stored in the event of a power failure from being lost, the memory 12 is designed as a battery-powered memory with random access. Whenever data is stored, the processor 11 also refreshes the data in the memory 12 . When the power failure is over, the processor 11 retrieves the data from the memory 12 (RAM) again.

The switch-on circuit 15 and the combining circuit 14 protect the data in the memory 12 in the transition phase between a mains failure and the return of the mains voltage.

The operation of the processor 11 is described in more detail below with reference to the elementary logic function block diagrams. Fig. 2-4 explained. Of these figures, FIG. 2 serves to explain the selection of the information to be displayed and the operating modes, while FIG. 3 serves to explain the data supplementation in the external RAM memory 12 and FIG. 4 explains the data retrieval from the memory 12 at the end of a power failure.

In particular, Fig. 2 shows a timer 20 , which is used to set a circuit 22 , the output signals are normally fed to a block 23 . In addition, the timer 20 supplies an RTI signal to a block 21 which is used to read out the control signals which are input on the keypad. Block 21 delivers a signal to block 23 via a switch 22 , which indicates that a new command is present. The NO output of block 23 supplies the RTI signal, which is supplied to block 21 , while signals at the YES output of block 23 activate a block 24 , according to which it is checked whether the key pressed was an operating mode key. A signal at the NO output of block 24 activates a block 25 which checks the selected operating mode and activates a block 26 which, depending on the selected operating mode, compiles a display sequence and feeds it to the character generator for display. The block 26 also activates a block 27 which checks which numeric keys have been pressed and which in turn activates a block 28 which checks whether the command in question can be executed.

The NO output of block 28 (control cannot be executed, for example because the number entered does not correspond to a standard channel number) activates a downstream block 34 , which stores question marks in suitable memory locations in the buffer memory in order to inform the user that the command cannot be executed, and which also transmits the question mark information to the character generator 16 . Block 34 then delivers the RTI signal to block 21 , which scans the keypad again and waits for further commands.

The YES output of block 24 activates block 36 , which then stores the information about the displays and question marks in the buffer memory and transfers this information to the character generator (as already described). Block 36 then delivers the signal RTI to block 21 . After a predetermined time interval (approx. 4 ms), which is set on the timer 20 , the circuit 22 switches over, so that its output is connected to a number circuit 31 which, after a predetermined number of pulses (approx. 250 per second) provides a signal to a block 32 which updates the number of clocks in the buffer memory and activates a block 33 which sends the data contained in the buffer memory to the character generator and then provides a signal RTI for the block 21 .

A block 40 is provided in FIG. 3, which checks whether data storage is required in the selected operating mode. A signal at the NO output of block 40 activates block 25 ( FIG. 2), while a signal at the YES output of block 40 leads to the following results:

• a block 41 is activated which checks the number of the key pressed;
• - A block 42 is activated, which the channel number and
• - The voting data in the memory location (or the memory locations) stores that of the concerned Key are assigned;
• a block 43 is activated, which supplies an enable signal (CE) and a first address for the external memory 1-2 ;
• a block 44 is activated, which supplies the channel number data and a save pulse (WRITE IN) to the memory 12 ;
• a block 45 is activated, which supplies the new address;
• - A block 46 is activated, which supplies the tuning data and the store pulse to the memory 12 .

FIG. 4 shows a block 50 which , depending on a signal from the detector 15 ( FIG. 1), which indicates that the mains voltage is returning, supplies an output enable signal (OE,) to the memory 12 and which also activates one after the other of the following blocks:

• Block 51 , which provides the address for the memory 12 ;
• Block 52 , which reads the data from the memory 12 and stores it in the registers of the processor 11 ( FIG. 1);
• Block 53 which calculates the new address;
• Block 54 , which checks whether all memory cells of memory 12 have been read out,

The NO output of block 54 provides a signal to reactivate block 51 . The YES output of block 54 activates block 55 , which sets the operating mode "T" (retrieval from memory) and also the key "0" and delivers an activation signal to block 25 ( FIG. 2).

Further information regarding the mode of operation of the device according to the invention can be found in IT patent application no. 69 950-A / 77, which has already been mentioned above and describes an arrangement which is partially similar to the arrangement according to the invention. In fact, a processor F8 from Fairchild was used as processor 11 , which consists of a unit 3850 (CPU), a unit 3861 (PIO), a unit 3853 (SMI) and two programmable read memories F 93 448 (PROM). Each of the two PROM memories essentially consists of a connection matrix of the format 512 × 8, input / output decoding circuits and output buffer circuits.

Each connection (at a matrix point) can be open or closed and represents permanent data Unit (bit) represents "1" or "0". Each group of eight connections, which are assigned by one of the 512 input addresses combinations can be called, represents an elementary 8 / -bit command or a word (byte). By creating all Possible or permitted address combinations at the inputs can all be in the read memory (ROM) data contained at the outputs of the same can be obtained in the form of words or bytes.

Fig. 5 is a more detailed explanation of the structure of the character generator 16 like. Fig. 1.

In detail, the circuit diagram according to Fig. 5 shows a character counter 60 for generating addresses for driving a character memory 61 , which is designed as a random access memory (RAM) and has the format 48 × 6, so that it can store 48 characters that are periodically sent by the processor 11 are transmitted.

The six INPUT / OUTPUT connections of the character memory 61 are connected to six output connections of a gate circuit 71 of the processor 11 . These output connections are also connected to the six inputs of a character read memory 62 .

The character read memory can be a Fairchild type 3258 (ROM) memory and serves the purpose of Storage of data from 64 different characters for each of which he has an image in one 5 × 7 point matrix provides. Each of the characters is displayed in the vertical direction from the next character separated by two free lines.

A built-in counter, which receives a clock signal at the horizontal scanning frequency FH of the television set and also a reset signal R1 from the character counter 60 , scans the successive dot lines of the character matrix.

The five outputs of the character memory 62 are connected to a parallel / series converter 63 , which converts the signals on the five outputs into a serial signal. The series / parallel converter also inserts a suitable number of spaces (e.g. 3) at the end of the five signals in order to separate the individual characters in the horizontal direction.

The converter 63 receives a clock signal from an oscillator 66 that determines the width of the characters that are displayed on the screen. In addition, the converter 63 receives a load signal L from a divider 67 for each character (in the example under consideration after every eighth clock pulse (8 = 5 + 3)), while the clock signal of the oscillator 66 is likewise fed to the divider 67 itself. The signals from the output of the converter 63 are fed to a combining circuit 64 which is built up from known logic modules (for example from three AND gates with two inputs each, of which the first with the output of the converter 63 and the second with one of the Outputs of a control circuit 65 is connected). The output signals of the converter circuit 64 appear at at least one of its three outputs R, G and B, depending on the same number of control signals that are supplied by the control unit 65 . The outputs R, G and B are connected in a known manner to the amplifiers for the color signals of the television, so that the signals supplied by the combining circuit 64 are superimposed on the video signals of the received television signal.

Depending on the commands from the control circuit 65 , it is possible to get the display in any of the three primary color combinations.

Referring to FIG. 5, the control circuit 65 receives a control signal from an output of a circuit 71 - terminal 4 of the processor 11 in Fig. 1 - so that the display is performed in green when the system operates in a mode in which the first label the keys applies while the display is in yellow when the second key label or the second key function is selected.

The reference numerals 68 , 69 and 70 denote three switch circuits which are similar to one another and which are controlled in parallel by a control signal DT which is formed by a bit at the connection 1 of the processor 11 in FIG. 1. Depending on the signal DT, the three switch circuits 68-70 give the circuit acc. Fig. 5 free for the storage of data in the memory 61 when the signal DT is present ("high"), while the circuit acc. 5, if the signal DT is missing ("low") or if the processor 11 does not transmit any characters to the memory 61 (for the addition of the information to be displayed) to release the data from the memory 61 to the outputs R, G and B. transferred to.

In order to achieve the function indicated above, the switch circuits 68-70 , when the signal DT is present, assume the switch position (not shown in FIG. 5) in which they rest on the contacts A. As a result, a reset pulse is applied to the reset inputs R2 and R3 of the counter 60 , while the memory 61 is set to the "INPUT" state by the same signal DT which is applied to its input / output control input (I / O).

The counter 60 also receives clock pulses DC from the output 4 of the processor 11 in FIG. 1 via the switching circuit 68. The clock signal DC is also fed to the write control input W of the memory 61 .

In this way it is achieved that the counter supplies one of the addresses 0-47 to the memory 61 as a function of each clock pulse which is supplied to it. At the same time, the processor 11 delivers at its output 4 the 48 signals which arrive at the data input of the memory 61 , so that these are stored in dependence on the write pulses at the input W in the corresponding memory cells.

If, on the other hand, the signal DT is not present - switches of the switch circuits 68-70 in the position shown in FIG. 5 at the contact B - the counter 60 receives clock signals from the oscillator 66 via the divider 67 , reset signals with the frame frequency FV at the reset input R2, Reset signals with the frequency of lines FH at the reset input R3 and a format change signal F from the processor 11 . In this way, the counter 60 is controlled so that it supplies suitable address signals for the memory 61 , so that it stores the 48 characters for the three lines of sixteen characters each when the signal F is present, or only the sixteen characters one if the signal F is absent Line, because in this case the counter only generates the sixteen corresponding addresses. Counter 60 also provides a lock signal to combiner 64 to deactivate it during the remainder of the television picture time.

In this way, only part of the screen is displayed, for example in the upper left Corner. If desired, the same lock signal can be used to point to an appropriate point Video fader chain of the television to supply a fade-out signal and so a dark background for the Obtain display so that the displayed characters are more visible.

Another output signal of the circuit 71 or the output 4 of the processor 11 controls a switch 72 to which a signal BIP is fed on the input side, which can be tapped at a suitable circuit point, for example at the output of the divider 7 in FIG. 1, and on the output side a first input of an adder 73 is connected, the second input of which the audio signal BF of the received television signal is supplied, the audio signal being tapped before the manually operated volume control. The output signal of the adder is fed to the input of an amplifier 74 which controls a loudspeaker 75 . In this way, the processor can, under the given circumstances, control the triggering of an alarm for the user. For example, an alarm can be triggered if the following occurs:

• - when the memory button M is pressed. In this case, the alarm reminds the user that the Button has been pressed to prevent him from accidentally changing the contents of the memory;
• - if a non-executable command is entered, for example the number one does not exist the channel or an obviously wrong time;
• - when the maximum permissible limit for an operation has been reached, for example when the largest permissible number of correction steps for a fine correction has been reached.

FIG. 6 shows a more detailed illustration of the details of the circuits 12-15 in FIG. 1 to explain the storage of the channel data in the external memory and to explain the data backup during a power failure. The circuits 12 , 13 , 14 and 15 mentioned roughly correspond to blocks 113 , 100 , 105 and 80 in FIG. 6.

The block 80 contains a Zener diode 83 , which lies between a +12 V output of a supply voltage source (AC connection AC, transformer 81 and rectifier 82 ) and the one connection of a resistor 84 , the other connection of which is grounded. The voltage across resistor 84 is integrated using an integrator, which consists of a resistor 86 , a diode 87 and a capacitor 85 .

The signal from the output of the integrator 85-87 is inverted with the aid of an inverter 88 and fed to a further inverter 95 via a further integrator comprising a resistor 93 and a capacitor 94 . The output signal of the first inverter 88 is also fed to the base of a transistor 90 operated in the base circuit via a series resistor 89 . The collector of transistor 90 is connected on the one hand via a resistor 92 to a +5 V connection and on the other hand to the one connection of a pushbutton switch 91 , the other connection of which is grounded and with the aid of which a reset signal for the processor ( FIG. 1) can be generated is.

The +12 V output is also connected to the input of a circuit 96 for voltage stabilization, the output of which is filtered with the aid of a capacitor 94 and an output voltage of +5 V is available as a supply voltage for the other circuits of the circuit. The output of inverter 95 is connected to a first input of two NAND gates 107 and 109 and to both inputs of a NAND gate 106 , which is connected as an inverter. The output of the NAND gate 106 is connected to the reset input R4 of an isolating circuit 112 , to which the output signal of the NAND gate 107 is fed to a lock input CD via an inverter 110 . The NAND gate 107 is supplied with a conditioning signal CS from the processor 11 in FIG. 1 at its second input. The output of NAND gate 107 is also a lock input CD. Memory 113 connected.

A "READ" signal from the processor 11 in FIG. 1 is fed via a NAND gate 108 , which is connected as an inverter, to the lock input NR for reading the memory 113 . The output of the NAND gate 108 is also connected to a second input of the NAND gate 109 , the output of which is connected to a lock input NW for writing the memory 113 .

The +5 V supply voltage is also fed to the anode of a diode 101 , the cathode of which is connected to the one terminal of a capacitor 104 , the second terminal of which is grounded. The series circuit of a resistor 102 and a 3 V battery 103 is connected in parallel with the capacitor 104 . The voltage across the capacitor 104 is supplied to the memory 113 , the isolating circuit 112 and the four NAND gates 106-109 , all of the circuits mentioned being combined into a single integrated circuit.

The isolation circuit 112 has five inputs which are connected to the five outputs of a control circuit 111 (keypad or remote control), and also five inputs which are connected to five connections of a circuit 114 (connection 5 of the processor 11 ).

The five outputs of the isolation circuit 112 are also connected to the five address inputs of the memory 113 .

The circuit described above works as follows:
When switching acc. Fig. 6, the block 100 is used to continuously generate a supply voltage that keeps the memory 113 in the on state. In the event of a power failure, the battery 103 supplies sufficient current via the resistor 102 to maintain the data in the memory 113 . If, on the other hand, the mains voltage is present, the supply voltage of +5 V is supplied via the diode 101 , the battery 103 being simultaneously recharged somewhat via the resistor 102 .

With the help of the Zener diode 83 and the integrator 85-87 , the block 80 delivers a signal at the output of the inverter 95 , which is delayed in relation to the supply voltage of +5 V if the supply is made directly from the mains, and which before Supply voltage failure of +5 V occurs when the mains voltage is interrupted. In this way it is ensured that the signals generated by the processor 11 cannot reach the memory 113 during a power failure and during the transition phases before and after a power failure.

In view of the above conditions, NAND gates 107-109 are designed to protect memory 113 , while inverting circuits 106 and 110 force isolating circuit 112 to generate a sequence of zeros at its output so that it is prevented that incorrect and confusing address signals are supplied to the memory 113 .

Block 80 also provides a similar signal at the output of transistor 90 as at the output of inverter 95 to keep processor 11 locked during the transition phases and thereby prevent it from operating in an uncontrolled manner. However, the push button 91 enables the generation of a reset signal for the processor 11 by hand, so that this can restart its operation based on predetermined operating conditions.

Fig. 7 shows an advantageous variant of part of the circuit shown. Fig. 1, but only the circuits are shown that are different or different from the corresponding circuits shown in FIG. 1.

In particular, FIG. 7 shows a control keypad, additionally comprising the explained with reference to Fig. 1 keys six other "V +" keys, "V", "L +", "L", "C +" and "C-" . The outputs of the keypad 120 are connected to a group of input / output connections 5 of the processor 121 , which corresponds in essence to the processor 11 , from which it differs only in that a further group of output connections 6 is provided.

Six connections of this group are connected to the six inputs of a digital / analog converter 123 of known design (for example with a resistor network made up of R / 2R resistors). The analog output signals of the converter 123 are fed to a switching circuit 124 with three outputs V, L and C, which are connected to three storage capacitors 125 , 126 and 127 , respectively. The switching circuit 124 also has two control inputs which are connected to the two remaining output connections of the connection group 6 of the processor 121 and to which control signals for switching the analog signals to one or the other of the storage capacitors 125 to 127 can be fed.

The port group 4 of the processor 121 is connected to eight input / output ports of a random access memory (RAM) 122 . This replaces the memory 12 in FIG. 1 from which it differs by the number of 8-bit memory cells (10 × 5 instead of 10 × 2). Memory 122 also receives six address bits (instead of 5) from the output ports of port group 5 of processor 121 .

The circuit acc. Fig. 7 works as follows:
If one of the six additional keys mentioned above is pressed (for example the "V +" key), the processor 121 supplies the character generator with a combination of, for example, the following symbols:

The line with the symbols corresponding to the pressed key (V, L, C) is shown with a different color than the others. The number of characters per line is also proportional to the corresponding analog signal level (V, L, C) at that time. If one of the "+" buttons is pressed, the corresponding analog level is increased by 1/64 of its maximum value. When an operation is performed that requires storage (for example, whenever a "KEY" mode is set or when the "M" key is pressed), the processor 121 provides the data in digital form to the Memory 122 , where data is stored in the same manner as explained with reference to FIG. 3. This means that the data memory 121 must store five data groups for each of the ten "KEYS", namely the channel data, the tuning data, the volume data, the brightness data and the color intensity data. For reasons of uniformity, 8-bit data is supplied to the memory 122 ; however, a sequence of 6-bit (64 levels) is more than sufficient for the analog setting, so that two bits are not used.

When using a character generator and the circuit according to the invention, there are also other possibilities for displaying the analog levels on the television screen. In addition to the ad described, one of the following ads can be delivered:

In the first form of the display, the number of asterisks is proportional to the relevant analog signal level, while the direction of the setting is indicated by the symbol "<". In the second type of display, the level is indicated by the number next to the relevant setting variable, while a question mark is displayed for the parameter for which a setting is currently being made. In the third type of display, the number of plus signs or minus signs is proportional to the increase or decrease in the parameter in question compared to a predetermined nominal value. The stored data about the predetermined levels are retained in the memory 122 even in the event of a power failure, thanks to the precautions explained above with reference to FIG. 7.

For the parameters for which analog values are set, it can also be advantageous if, as has been explained in connection with FIG. 5, an alarm can be generated when a predetermined maximum value is reached.

The advantages of the present invention will become apparent from the foregoing description. There are however, there are a number of possible changes. For example, was described in the description assume that an 8-bit microprocessor is used, in which the CPU and ROM units are separated available. It is possible and even advantageous to work with microprocessors that have a larger number internal registers (e.g. 128) with random access (RAM) or a so-called monochip, which, in addition to the read-only memory (ROM), has an internal random access memory (RAM) and a timer contains. A 16-bit microprocessor can also be used. It can also be advantageous to use the Example to equip the television receiver with a remote control. In this case there is a button Field, which is similar to that described above, is provided on a portable transmitter part of the remote control. There is also - if you want to avoid the need for two separate keypads Possibility to provide a receptacle with electrical contacts on the receiver housing, in which the transmitter part of the remote control can be used so that its keyboard can be operated like a fixed keyboard.

Claims (6)

1. Method for generating displays of analog incrementally adjustable operating parameters, namely volume, brightness and / or color intensity, of a television receiver on its screen using (a) a character generation device ( 16 ) connected to and controlled by a microprocessor ( 11 , 121 ) and controlled thereby , (b) a character memory ( 61 , 62 ) in which data of alphanumeric characters including special characters are stored, and (c) a data memory ( 12 , 122 ) connected to the microprocessor in which volume, brightness and / or color intensity data are stored in which the character generator ( 16 ) is controlled using the stored data from the data memory ( 12 , 122 ) to generate a screen display signal consisting of a sequence of a number of characters, the number of characters in the string proportional to the number of increments set for the display signal l assigned operating parameter. 2. The method according to claim 1, characterized in that the on-screen display signal generated by the character generating device ( 16 ) lies in a single screen display line. 3. The method according to claim 1 or 2, characterized in that the operating parameter currently displayed by a additional symbol is symbolized.   4. The method according to claim 1, characterized in that the characters of the string in the form of the symbolize assigned operating parameters. 5. TV receiver with a screen and with a microprocessor ( 11 , 121 ) connected and controlled by this character generator ( 16 ), which has a character memory ( 61 , 62 ) in which data of alphanumeric characters including special characters are stored, and with one the microprocessor ( 11 , 121 ) connected data memory ( 12 , 122 ) are stored in the volume, brightness and / or color intensity data, and wherein the character generation device ( 16 ) by the microprocessor ( 11 , 121 ) is controllable such that a display signal can be generated on the screen, which consists of a sequence of a number of characters, and wherein the number of characters in the string is proportional to the level of an analog operating parameter associated with the signal, namely volume, brightness and / or color intensity, of the television receiver. 6. TV receiver for generating displays of analog, step-by-step adjustable operating parameters, namely volume, brightness and / or color intensity of the television receiver on the television screen, characterized in that the television receiver is connected to a microprocessor ( 11 , 121 ) and controlled by this character generation device ( 16 ) with a character memory ( 61 , 62 ) in which data of alphanumeric characters including special characters are stored and also has a data memory ( 12 , 122 ) connected to the microprocessor ( 11 , 121 ), in which volume, brightness, and / or color intensity data are stored, the character generation device ( 16 ) being controllable by means of the microprocessor ( 11 , 121 ) in such a way that a screen display can be generated which consists of a numerical specification, and the numerical specification being the level of the signal assigned Operating parameters proportiona l is, the operating parameter just displayed being symbolized by at least one additional letter character.