DE2951938A1 - Semiconductor selective electrochemical etching equipment - giving two different anode potentials to allow control of etching rate and angle - Google Patents

Abstract

Selective electrochemical etching equipment consists of a supply of current, a cathode, means for connecting the workpiece as anode and provision for covering the surface to be etched with electrolyte. The supply (7) and connections (5,6; 12,16,13,17) are arranged so that there are two potentials at the workpiece (1,10,20), one of which is at least as positive as and the other more positive than the cathode potential. The equipment is specified for use in etching semiconductor material, including intrinsic Si, p- and n-doped Si, Ge and GaAs. It is used in the determn. of depth of penetration and doping profiles and in the prodn. of oxide-filled insulating grooves and V-grooves for very dense packing of semiconductor elements. Planar surfaces, inclined at various angles to the original surface, can be produced and p- and n-doped material can be etched equally rapidly if suitable radiation is employed during etching.

Description

Process for electrochemical etching of N- and P-doped

Silicon The invention relates to a method for electrochemical Etching of N- and P-doped silicon according to patent application P 29 17 654.3, in which the area to be etched is irradiated with near infrared light during the etching.

In the method described in patent application P 29 17 654.3 silicon is electrochemically etched by connecting the silicon sample as an anode, the surface to be etched with the preferably 5% by weight aqueous Hydrofluoric acid wets existing electrolytes in which a platinum cathode is immersed and an average (over 2 the area to be etched) current density of <200 mA / cm is set. It has been found to be beneficial if during of etching the surface to be etched with light, which has a high proportion in the near having infrared range, is irradiated. Such irradiation is particular important when etching N-doped silicon and is important when etching lightly N-doped silicon Silicon is necessary because this material has the hole conductivity without the irradiation is absent, with the result that when etching weakly N-doped silicon, the material is not removed homogeneously. If, on the other hand, was irradiated with near infrared light, so the results when etching N-doped silicon were just as favorable as when etching P-doped silicon. In all of the tests carried out, also found that if irradiated during etching, P- and N-doped Silicon with the same Speed were worn away. At later Experiments have shown, however, that this does not seem to be the case in every case, but in some cases inexplicable fluctuations in the etching speeds were found and the velocities at which P- and N-doped silicon were ablated, were also no longer the same in all cases.

It is therefore the object of the invention to provide a method for selective indicate electrochemical etching of N- and P-doped silicon, in which defines the speeds at which P- and N-doped silicon are etched have it adjusted.

This task is carried out with a method of the type mentioned at the beginning solved with the feature of the characterizing part of claim 1.

By means of the method according to the invention, fixed speeds, with which P- and N-doped silicon are to be etched, set quite precisely. It is possible to use the parameters influencing the removal rate, to which now also comes the irradiance, the removal rates of P- and N-doped silicon to vary in a defined manner within wide limits. Included a change in irradiance - different from a change in the others Parameters - the removal rates of P- and N-doped silicon are different be influenced, it is possible to change the irradiance Ratio of the removal rate of P-doped silicon to that of N-doped silicon Set silicon in a defined manner. Since the irradiance with which the to be etched The area is irradiated, by the lamp power, the distance of the lamp from the to corrosive surface and the thickness of the electrolyte between the lamp and depends on the area to be etched it simply a desired irradiance to adjust.

When setting a certain irradiance you go on best so that you can measure the distance between the lamp and the surface to be etched and the Leaves the layer thickness constant and then sets a value for the lamp power, which from a previously created calibration curve is taken in which irradiance levels are plotted against lamp powers. For example, it is recommended for irradiation a halogen lamp with gold reflector, which is made by Osram under the type number 64635 is offered.

s is advantageous when with irradiance in the range between > about 25 and <about 150 mW / cm2 is etched, this information being based on the Refers to the wavelength range from 720 to 800 nm, using a lamp, which emits continuously at least in the wavelength range from 700 to 1300 nm. The corresponding distribution temperatures of the lamp are between approximately 2550 and 3400 0K and the layer thickness of the electrolyte is 25 mm. Also all of the following Details of the irradiance relate to the specified wavelength range. At irradiance levels <approx. 25 mW / cm2, etching of N-doped material is obtained Silicon no longer has a homogeneous removal, rather the etched surface then has areas which have practically not been attacked, next to very deep trenches. at Irradiance levels> approximately 150 mW / cm2 is the result of etching N-doped silicon no longer easily reproducible.

It is particularly advantageous if at an irradiance of about 70 mW / cm is worked. At this level of irradiation is the removal not only particularly reproducible (<+ 5%), but also P- and N-doped Silicon removed at the same rate. An etch speed ratio of 1: 1 is not required for all applications (it is often sufficient if the ratio is sufficiently precisely defined), however, almost all etching applications in which it is based on defined erosion arrives, which makes it much easier. An etch rate ratio of 1: 1 is required if, for example in the manufacture of integrated circuits in silicon material, which is side by side Has P- and N-doped regions, which insulation wells are to be etched all are equally deep and their bottoms are completely flat and parallel to the surface, which has been assumed are. Another case in which it is absolutely necessary it is necessary that P- and N-doped silicon are etched at the same speed, is the one in which in a semiconductor substrate which has several on its surface For example, layers of different conductivity types applied by means of epitaxy has an inclined surface which intersects the layers and which is inherently flat and is uniformly steep, is to be etched.

To make a silicon surface uniform, i. H. to be removed so that the Etching parallel to the surface that is assumed to progress, it is most advantageous if only one potential is applied to the surface to be etched. This is realized in the arrangement described in patent application P 29 17 654.3, by applying the same potential to the conductor tracks 12 and 13. It is in this A simpler arrangement than the one in the case is also recommended Patent application P 29 17 654.3 is preferably used to apply. Such simplified arrangement would, for example, with only one connection to the one to be etched Area.

The invention is based on exemplary embodiments illustrated by drawings described.

The figures show: FIG. 1 in a schematic representation, one in cross section shown embodiment of an arrangement described in patent application P 29 17 654.3, with which the method according to the invention can be carried out; Fig. 2 a Diagram showing the layer thicknesses of N- and P-doped silicon at a specified etching duration and a specified current density as a function of the irradiance and FIG. 3 shows a section through a P-doped silicon wafer, on which N- and P-doped layers are applied and which according to the invention Procedure has been etched.

The arrangement shown in Fig. 1 is used for the selective etching of Surface of a silicon wafer 1. The arrangement includes a receptacle of the electrolyte 3 certain container 2, which consists of a material which is not attacked by the electrolyte. A suitable material, which opposite a lot of electrolytes, for example compared to those used for etching silicon The hydrofluoric acid used, which is etch-resistant, is Teflon. The container 2 has one in the bottom Opening 9, which is closed with the silicon wafer 1 to be etched. the Sealing between the container 2 and the silicon wafer 1 is by means of a Ring, not shown, made of Viton, a linear copolymer of vinylidene fluoride and Hexafluoropropylene, guaranteed. A cathode 4 is immersed in the electrolyte, Which consists of a conductive material that is not attacked by the electrolyte will. A material that meets this requirement in most cases, is platinum. The cathode need not be shaped in any particular way. For example, the cathode can consist of a thin wire. The cathode is connected to a power source 7, with which the silicon wafer 1 via clie Connections 5 and 6 is conductively connected. In Fig. 1 is the power supply shown in an operating state in which the cathode potential and that at the connection 5 lying potentials have the same level. The power supply 8 can also operated by the switch (see Fig. 1) in the power supply is operated that the potentials at the cathode 4 and at the connections 5 and 6 are different from each other. In any case, it must be ensured that the Connection 6 has the most positive potential. The usually rectangular area on the silicon wafer 1, which is etched, is limited by either the Viton ring or by masking the areas that are not to be etched a material that is preferably insulating and resistant to the electrolyte or - and this is the most common case - on two opposite sides by areas that are very conductive and are conductively connected to the silicon wafers 1, where one of the anode potentials is connected via lines to the connections 5 and 6 and which also have a masking effect, and otherwise by areas from the preferably insulating, etch-resistant mask material. The very conductive areas and the very good conductive lines between these areas and places where connections 5 and 6 connected to the die are preferred produced by an etch-resistant metal, z. B. gold, on the silicon wafer is evaporated and then by means of a very uncritical photolithographic Process the areas and the lines are generated.

Are those at cathode 4 and at points 5 and 6 different lying potentials, when etching takes place on the (entire exposed to the electrolyte Surface an erosion, with the side lying on the more positive potential the area to be etched, the greatest amount of removal and there where the other potential is the least. Since between the applied potentials within the If a voltage drop occurs on the surface to be etched, the rate of removal decreases - at least when the material has a uniform etching characteristic - linear to. The result of the etching is therefore one with respect to the original silicon surface linearly sloping surface.

Are the cathode potential and one of the on the silicon wafer If potentials are on the same level, the relationships are only insofar different than where the potential of the cathode is applied to the surface to be etched, there is not even a slight but no erosion at all. Here too one thus obtains - provided the condition given above is fulfilled - a regarding linearly sloping surface of the original silicon surface, with no step between the original silicon surface and the linearly sloping surface is present, as is the case when the three potentials are different.

Are the cathode potential and one of the ones on the silicon wafer? Potentials at the same level, the angle of inclination is the linearly decreasing one Area determined solely by the amount of material removed. Will be an ablation desired parallel to the original silicon surface, so must - when using the arrangement shown in Fig. 1 - both lying on the silicon wafers Potentials be the same. In general, in this case it will be easier to find a Use arrangement in which only one connection between power supply and the silicon wafer to be etched is provided. The lamp (not shown) is in the arrangement shown in Fig. 1 so attached above the electrolyte container, that the radiation strikes the surface to be etched approximately vertically from above.

When etching silicon, hydrofluoric acid is used as the electrolyte, whereby achieved particularly good results with about 5 percent by weight hydrofluoric acid will. It is etched at room temperature. In compliance with those listed below Conditions are good at average current densities of <200 mA / cm Results, d. H. Surfaces with a uniform angle of inclination to the original Silicon surface or areas which are exactly parallel to the original surface are aligned and preserved with a good surface quality. At a current density above 200 mA / cm2 the etching cannot be controlled very well. At a current density of 200 mA / cm2 and under irradiation with a strength in the optimal range the etch rate of silicon in depth is on the order of 0.06 µm per Second. Since the depressions to be etched are often on the order of 1 pin have, d. H. the etching times are on the order of 17 seconds, lights up it is difficult because of the dependence of the etching depth on the etching time, Generate recesses with a defined depth reproducibly, if so proceeded that the current is switched on once and then switched off again after 15 to 20 seconds will. For this reason, pulsed and etched are preferred. The pulse durations can be of the power supply used are between 0.1 and 1.5 seconds. By the pulsed etching will also cause excessive heating of the electrolyte during the etching avoided.

The influence of the irradiation on the etching is explained with reference to FIG will. Fig. 2 shows a diagram in which removed by electrochemical etching Layer thicknesses of P- and N-doped material above the irradiance levels, which exposed to the P- and N-doped silicon during the etch are. In the case of etching, the procedure was that on the material to be etched only a potential was applied so that the material was removed evenly, d. i.e. that during the etching, depressions with the surface from which it was started, parallel Soils emerged. An analog lamp was used to irradiate the samples to be etched with gold reflector, which is sold by Osram under the type number 64635 is used. The lamp is advantageous because in its light the part of its Wavelength corresponds to an energy which is slightly smaller than the band gap, is high. The band gap of silicon is around 1.1 eV, which is one wavelength of about 1.3 pm. The lamp was at a distance from the sample to be etched of 5.0 cm and the thickness of the layer consisting of 5 percent by weight hydrofluoric acid Electrolyte over the sample to be etched was 2.5 cm. In the electrolyte becomes Long-wave infrared light strongly absorbed. Each 0.5 mm2 in size was etched Surfaces by using the Electrolytes have been treated. The lamp power was in the range between 0 and 150 watts (corresponding to an irradiance from 0 to around 150 mW / cm2).

From the diagram you can see in the first place that - as already said - the rate at which both N-doped and P-doped silicon Silicon is removed, depend on the irradiance that there is an irradiance there, at the N- and P-doped Silicon at about the same speed are etched and which is approximately the upper limit of a larger irradiance range forms in which the etching speeds when removing P- and N-doped Material are not very different from each other and also relatively little of the irradiance are dependent. The mentioned irradiance is included 70 mW / cm2 (corresponding to a lamp power of 80 watts). In addition, Fig. 2 it can be seen that at irradiance levels w 150 mW / cm2 (corresponding to a lamp power of a 150 watt), the speed with which N-doped silicon is etched, is poorly reproducible, and that at irradiance levels <25 mW / cm2 (corresponding to a lamp power of approximately <50 watts) the speed with which N-doped silicon is removed, depends very much on the irradiance. The etching reproducibility has been found to be poor for small ones Irradiance levels can be attributed to the fact that there is no parallel layer removal takes place, but a surface is obtained, which in addition to areas which hardly are attacked, has very deep trenches.

The measurements on which FIG. 2 is based were carried out on samples from P- and N-doped silicon, each containing approximately 7 x 1015 doping atoms / cm³, however, the results shown in Fig. 2 are representative of a large one Range of both N and P doping concentrations.

This has been determined through tests in which 3 samples made of P-doped silicon, whose doping concentrations between 1 x 1015 and 1 x 1019 doping atoms / cm3 and 7 samples of N-doped silicon, their doping concentration between 1 x 1015 and 5 x 1019 doping atoms / cm3 layers, etched became. In all experiments, the same irradiance and otherwise etched under the same conditions. The samples were found to be the same Conductivity type within the measuring accuracy the removal rate constant, d. H.

was independent of the doping concentration.

With the method according to the invention, it is like those just discussed Measurements show possible P- and N-doped silicon with electrochemical accuracy to etch a defined removal rate. In particular, it is possible through a corresponding setting of the irradiance of P- and N-doped material to be removed at the same speed. This enables many uses at which P- and N-doped silicon regions either simultaneously or sequentially be etched, significantly simplified or even made possible in the first place. Should for example into a silicon wafer, which consists of a P-doped substrate, on which by means of the known epitaxy method one after the other an N, a P and finally an N-doped silicon layer has been applied again, so it is etched that a depression arises as it is shown in cross section in FIG. 3 it is necessary when etching an inclined surface with a uniform angle of inclination a should be obtained that the N- and the P-doped layers have the same speed be removed. In detail, one proceeds in the manufacture of that shown in FIG. 3 Structure so that on the surface 11 of the silicon substrate 10, which is etched is to be, conductor tracks 12 and 13, for example, through the use of photolithography can be generated on a vapor-deposited metal layer. The surface prepared in this way 11 is wetted with the electrolyte, in which the cathode is also immersed, and then the Conductor 13 has the same potential as to the Cathode and on conductor track 12 a potential which is more positive than the cathode placed. At the same time, according to the invention, the surface 11 is provided with an irradiance irradiated by 70 mW / cm2. Because under these conditions the etching rate only still depends on the current density, the silicon between the conductor tracks 12 is produced and 13 etched in such a way that the etching speed is perpendicular to the conductor tracks 12 and 13 increases linearly, the etching speed in the immediate vicinity of the conductor line 13 is zero.

It is then etched until the desired angle α has been produced is.

Even if the silicon wafer used in the example just discussed is to be etched selectively so that a uniform removal, d. H. an ablation parallel to surface 11, (this is achieved by, when etching the same potential is applied to the conductor tracks 12 and 13), it is advantageous if the N- and the P-doped layers on the one hand with defined and on the other hand can be removed at the same speed. Only if the removal rate is known and is the same for P- and N-doped silicon, can be simply Tests, for example on uniformly spiked test plates, determine the time which is required to selectively move the epitaxial layer down to the P-doped substrate to etch away.

The same removal rate when etching P- and N-silicon or at least one removal rate suitable for the two materials is clearly defined, is also necessary when measuring the vertical Doping profile in a semiconductor substrate, in which areas such. B. the Emitter and part of the base area in a bipolar transistor are superimposed, wel- If the conductivity type differs, proceed as follows is that the semiconductor material is removed layer by layer and after each Removal of a layer of the sheet resistance (R5) is measured. If not It is known exactly how thick the layers removed in each removal step are the determination of the diffusion profile, i. H. the curve which received when the doping concentration exceeds the associated distance to the substrate surface is not possible.

The method according to the invention is used in process controls in semiconductor manufacturing and also in the manufacture of integrated circuits.

In process control, the method according to the invention is used to on the one hand to etch surfaces that are inherently flat and with the substrate surface Form an acute angle and on the other hand - as already mentioned, to semiconductor material Layer by layer homogeneous, d. H. in such a way that the etching front is parallel to the substrate surface penetrates into the substrate to remove. The inclined, etched surface can on the one hand by means of a staining method to determine the penetration depths of P / N transitions and on the other hand, by pointwise along the line of greatest steepness the resistance to propagation is measured to determine the vertical doping profiles be used. The layer by layer, d. H. the one parallel to the original surface Removal of the semiconductor material is - as has already been pointed out - also for Determination of doping profiles used.

In the production of integrated circuits, the inventive Process on the one hand for etching insulation wells which are flat to the substrate surface parallel Have floors and also for etching depressions, which has a profile in the form of an asymmetrical V - as shown in Fig. 3 -, be used. Active elements, such as B.

Field effect transistors, can be generated in a space-saving manner. Here is that Method according to the invention, particularly advantageous because it - as in the context was explained with discussion of FIG. 3 - is possible, even then completely make flat, inclined surfaces with well-defined dimensions, if doing so P- and N-type areas need to be etched.

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Claims (4)

PATENT CLAIMS ~ 1 Process for electrochemical etching of N- and P-doped silicon according to patent application P 29 17 654.3, in which the Surface is irradiated with near infrared light during etching, characterized in that that the speeds at which P- and N-doped silicon are etched, apart from known parameters such as the current density, additionally via the irradiance, with which the area to be etched is irradiated is controlled. 2. The method according to claim 1, characterized in that the etching with a continuously emitting at least in the wavelength range from 700 to 1300 nm Lamp is irradiated with an irradiance which is in the wavelength range from 720 to 800 nm is between about 25 and about 150 mW / cm2, the corresponding Distribution temperatures of the lamp are between about 2550 and about 3400 0K, and the layer thickness of the electrolyte is 25 mm. 3. The method according to claim 2, characterized in that the etching with a continuously emitting at least in the wavelength range from 700 to 1300 nm Lamp with an irradiation strength is irradiated, which in the wavelength range from 720 to 800 nm is around 70 mW / cm2, the corresponding distribution temperature of the lamp is around 3030 0K, and the layer thickness of the electrolyte is 25 mm amounts to. 4. The method according to one or more of claims 1 to 3, characterized characterized in that only 1 potential is applied to the area to be etched.