DE2940439A1 - Transformation system for colour coordinate system - transforms digital chroma signal from rectangular coordinates into digital colour signal and saturation signal in polar coordinates - Google Patents

Abstract

The polar colour coordinate system is divided into quadrants, each identified by a number. The higher bits in the chrominance signal are evaluated first to determine the relevant quadrant. The equations for transforming the chrominance signal into colour signal and saturation signal for this quadrant are stored in a table memory. The colour signals for all quadrants are obtained from the quadrant number and the stored values. The amount of storage space required is reduced by subjecting the signals to a shift in position before addressing the table memory. This shift is reversed when the values are read from the table memory.. The system is fast, cheap and reliable.

Description

Features: Digital coordinate transformation

Method for converting digital chrominance signals of an r right-angled color coordinate system into digital hue signals and saturation signals a polar color coordinate system.

The invention relates to a method for converting digital Chrominance signals of a right-angled color coordinate system into digital color tone signals and saturation signals of a polar F.> ir!) coordinate system, in particular according to patent .... (patent application P 29 23 477.3) and a transformation circuit.

In the method for recognizing colors described in the main patent are before the actual color recognition for at least individual characteristics Sample point in each color to be distinguished, the color components optical-electrical determines which are the coordinates of the respective color locations in the three-dimensional Color space darstelierj.

The color component triples of the measured sample points are Color numbers assigned and the color numbers below with the associated color component triples matching addresses in one color. ID memory stored, in which each memory location corresponds to a color location of the color space. After that will be the color numbers of the other color locations are converted from the color numbers of the sample color locations the sample color locations are determined and under the associated storage locations of the color recognition memory stored, whereby the memory locations occupied with the same color number are each one Form color recognition space for a color within the color space.

During the actual later color recognition, the point-based and line-by-line optical-electrical scanning of the colored areas to be analyzed The color components obtained are continuously stored in the addresses of the color recognition memory, whereby the color numbers stored there are read out and the affiliation of the scanned ones Colors to the color recognition spaces is determined.

The color components can be derived from the three primary color measurement signals, the chrominance and luminance signals or the hue, saturation and Correspond to luminance signals. The primary color measurement signals are the rectangular ones Coordinates of the HGB color space and the chrominance and luminance signals the corresponding rectangular coordinates of the chrominance-luminance color space. The hue, saturation and luminance signals represent the cylinder coordinates of the hue-saturation-luminance color space where the hue signals the angles, the saturation signals the radii and the luminance signals form the third coordinates.

As stated in the main patent, the one described there n Processes for color recognition have proven to be particularly advantageous, i.e. hue, saturation and to use luminance signals. This is the case in FIG. 9 of the main patent an analog function generator for color space transformation is available, with which the analog chrominance and luminance signals in analog hue, saturation and luminance signals are converted. This conversion represents a transformation from right-angled color coordinates to cylindrical color coordinates or polar color coordinates because the luminance signals are identical in both color spaces.

Such analog function generators are complex and unstable and only have a slow working speed.

The invention specified in claim 1 is therefore based on the object a method and a digital transformation sound system for converting digital Chrominance signals of a right-angled color coordinate system in digital hue and to indicate saturation signals of a polar color coordinate system with which the disadvantages of the known analog function generators are avoided.

The invention is explained in more detail with reference to FIGS.

1 shows a three-dimensional representation of the chrominance-luminance color space and the hue-saturation-luminance color space; Fig. 2 shows a projection the color spaces; 3 shows an exemplary embodiment for a digital transformation circuit; 4 shows a further exemplary embodiment for a digital transformation circuit; 5 shows an exemplary embodiment for a correction stage.

To explain the coordinate transformation, FIG. 1 shows a right-angled transformation (Cartesian) XYZ coordinate system 1 with the coordinate zero point PO. By doing XYZ coordinate system 1 is the chrominance-luminance color space 2 spanned. A Any assumed color point F has the color coordinates X, Y and Z. The color coordinates X and Y correspond to the chrominance signals and the color coordinate Z to the luminance signal. The chrominance-luminance color space 2 is limited by the color coordinates Xn, Yn and Zn.

In the right-angled XYZ coordinate system 1 is a cylindrical one TSL coordinate system 3 inscribed with the coordinate zero point P10, which is in XYZ coordinate system 1 has the color coordinates Xn / 2, Yn / 2 and 0. The angle T corresponds to the hue signal T, the radius S to the saturation signal S and the Coordinate L is the luminance signal L, which corresponds to the luminance signal in the chrominance-luminance color space 2 is identical.

In the cylindrical TSL coordinate system 3 is the idealized Hue-saturation-luminance-color space 4 indicated by dashed lines as a double cone. By the coordinate zero point P'O runs the gray axis 5 with the white point 6 and the Black point 7.

Fig. 2 shows a projection of the spatial coordinate systems Fig. 1 in the XY plane, whereby the coordinates transform plumb bob on a two-dimensional Problem U returned and now the right-angled X # coordinate system 1 and that polar TS coordinate system 4 'is considered, since the luminance signals L in both Coordinate systems are identical anyway.

Through the coordinate zero point P10 of the polar TS coordinate system 4 'runs in relation to the XY coordinate system 1', around the values Xn / 2 and Y / 2 shifted X'V 'coordinate system 8.

The X'Y 'coordinate system 8 divides the polar TS coordinate system 4 'in the direction of increasing angle T in the four quadrants 0, I, II and III, where the angle T = O falls on the X 'axis. According to this numbering are the individual quadrants digital quadrant identification numbers of 2-bit assigned, namely the quadrant O the quadrant identification number LL, the quadrant I the quadrant identification number LH, the quadrant II the quadrant identification number HL and the quadrant III the quantum identification number HH.

The color point F projected into the XY plane is in the X1Y 'coordinate system 8 by the color coordinates X 'and Y' and in the polar TS coordinate system 4 ' characterized by the angle T and the radius S.

To determine the angle T and the radius' S of a color point F, according to the invention initially determined by examining the color coordinates X and Y, The quadrant in which the color point F falls and the relevant quadrant identification number marked, whereby the actual coordinate calculation in an advantageous manner a main quadrant, limited to quadrant 0 in the exemplary embodiment will.

Therefore, in a second step, the color coordinates X 'and Y' of the color locus F to be examined can be determined from the corresponding color coordinates X and Y without adding a sign. In a further step, the color coordinates X 'and Y' become the radii S or the sought-after saturation signal S according to the equation: and the associated angle T * initially related to the main quadrant O (angle 0o to 900) according to the equation: calculated. In the exemplary embodiment, S and T * have a resolution of 4 bits, so that a total of sixteen radii S and sixteen angles T * can be distinguished per quadrant, which in FIG. 2 for the main quadrant; 0 are indicated.

The angles T or the digital hue signals T sought for all four quadrants (angle 0 ° to 3600) result from the calculated angle T * 4 bits each and the preceding marked quadrant identification number each 2 bits, so that with a word length of 6 bits, a total of sixty-four angles or

Hue signals T can be distinguished.

For example, if the angle T * = HLLL (450) and the digital quadrant identifier LH (quadrant I) is determined, the result is the actual angle T = LHHLLL (1350). In Fig. 2, some characteristic angles T are given as 6-bit words, and although LLLLLL # 0 °; LLHLLL # 45 °; LHLLLL # 90 °; LHHLLL # 135 °; HLLLLL # 180 °; HLHLLL # 225 ° and HHLLLL # 270 °.

3 shows an exemplary embodiment for a digital coordinate transformation circuit for converting the digital chrominance signals X and Y into the digital color tone signals T and the digital saturation signals S. The coordinate transformation circuit consists of an inversion stage 10, a quadrant recognition stage 11, a Table memory 12 and from a further inversion stage 13.

The digital chrominance signals X and Y may in the exemplary embodiment each have a word length of 8 bits, the individual bits with small Letters and their valences are indicated by indices. In the 8-bit resolution are the final values in the XY coordinate system 1 X: Y = 255 and thus Xn / 2 = Yn / 2-127.

n n n n The most significant bits (MSB) X7 and y7 of the chrominance signals X and Y on lines 14 and 15 become exclusive-OR gate 16 and one Inverter 17 of the quadrant recognition stage 11 evaluated logically. The output signals t4 and t5 of the quadrant detection stage 11 on the lines 18 and 19 form the digital quadrant identification numbers a 2-bit of those quadrants in which the to investigating color locations F fall. The output signals t4 and t5 are simultaneous the most significant bits of the digital hue signals to be determined T.

As can be seen from FIG. 2, the values X # 128 and X <128 provide information about whether the color location F to be examined is on the right (quadrant O; III) or on the left (quadrant I; II) of the Y 'axis and the vest Y <128 and Y <128 the corresponding statement as to whether the color point F obe «-half (quadrant O; I) or below (quadrant II; III) is the X'-axis. The relevant quadrants are determined by examining the most significant bits (MSB) x7 and y7 according to the following table: X 2 128 # x7 = H (quadrant 0 or III) X <128 - x7 = L (quadrant I or II) (9) Y t # 128 = # y7 = H (quadrant 0 or I) Y 4 128 - y7 = L (quadrant II or III) These relationships are established in the exclusive OR gate 16 and the inverter 17 of the quadrant recognition stage 11 according to the following Truth table evaluated: MSB QK no. quadrant x7 y7 t4 t5 LHHLI LLLH II HLHH III In the inversion stage 10, according to FIG. 2, the digital color coordinates X 'and Y' of the X'Y 'coordinate system 8 are determined in terms of amount without the addition of a sign.

The remaining bits (LSB) x0 to x6 of the digital chrominance signal are used for this X in the inversion stage 10 to a first group of seven exclusive-OR gates 20 to 26 and the corresponding remaining bits y0 to y6 of the digital chrominance signal Y is given to a second group of seven further Exclusive-OR gates 27 to 33. All exclusive OR gates 20 to 26 of the first group are connected to an inverter 34, in which the most significant bit (MSB) x7 of the digital chrominance signal X is inverted will. All exclusive OR gates 27 to 33 of the second group are on another Inverter 35 connected, which is the most significant bit (MSB) y7 of the digital Chrominance signal Y inverted. Bits x'O to x'6 at the outputs of the exclusive OR gates 20 to 26 or the bits y'0 to y'6 at the outputs of the exclusive OR gates 27 to 33 form the digital color coordinates X 'and Y' of the shifted X'Y 'coordinate system 8 according to FIG. 2.

With the help of the exclusive OR gates 20 to 26 or 27 to 33, the most significant bits (MSB) x7 or Y7 are inverted or non-inverted of all less significant bits (LSB) x0 to x6 or y0 to y6 of the digital chrominance -Signals X and Y according to the tables: y7 L x0 to x6 L y0 to Y6 (11) H x0 to x6 H y0 to y6 If, for example, the most significant bit X7 = L, the corresponding color point F is in quadrant I or II, and the color coordinates X 'are calculated according to FIG (MSB) and inversion of all lower-order bits (LSB) is implemented. If, on the other hand, x7 = H, the color point F is in quadrant 0 or III, and the associated color coordinates X 'result from the equations X' = 128 - those in the digital domain by omitting the most significant bit (MSB) and not inverting all of them lower-order bits (LSB) is resolved. Bit y7 is evaluated in the same way.

The digital color coordinates obtained in the inversion stage 10 X 'and Y' of 7 bits call the 14-bit addresses of the table memory via the lines 36 12 on. In the table memory 12 with a storage capacity of 16 K x 8 is for each X'Y 'value combination has a 4-bit hue value T * (t0 to t3) and a 4-bit saturation value S (s0 to s3) stored according to the given equations (1) and (2) for the main quadrants were calculated. Thus, depending on the X'Y 'value combinations sixteen digital saturation values S and sixteen digital hue values TQ per quadrant can be retrieved from the table memory 12.

The color tone values T read out from the table memory 12 form the lower-order bits (to to t3) and those in the quadrant ~ detection level 11 obtained quadrant identification numbers (t4 and t5) the high quality bits of the digital hue signals T sought with a word length of 6 bits.

If the color point F to be examined lies in quadrant I or III, the digital hue signals T * are inverted in the inverting stage 13, which is connected to the output 37 of the table memory 12. The inversion stage 13 consists of four exclusive OR gates 39 to 42, which have a further inverter 43 can be controlled by the output # t11 of the quadrant recognition stage 11.

The controlled inversion ensures that the hue signals T * from 0 to 63 or the angles from 0 to 3600 increase steadily from quadrant to quadrant.

Fig. 4 shows a further embodiment of a coordinate transformation circuit.

While the table memory 12 in the embodiment according to FIG. 3 has a capacity of 16K x 8 bits, the table memory 12 'in Fig. 4 a lower capacity, e.g. B. of 1K x 8 bit. The lower capacity has under among other things, the advantage that the access time is shorter and thus the working speed the coordinate transformation circuit is larger.

While the color coordinates obtained in the inversion stage 10 X 'and Y' are still available as twice 7-bit information, can with the small table memory 12 'only twice 5-bit addresses are selected. In this In this case, the low-order bits of the color coordinates X 'and Y' would have to be disregarded stay ~ which would lead to an inaccurate coordinate conversion.

To improve the accuracy, in particular when calculating the digital hue signals T from small color coordinate values X 'and Y', a controllable shifting stage 46 (shifter) is connected upstream of the table memory 12 'according to the invention. With the shifting stage 116 an upwardly directed position shifting of the color coordinates X 'and Y' is carried out according to a multiplication by a factor a, the number of positions by which the shift is made of value ranges A, B and C for the digital color coordinates n X 'and Y' is dependent. After a position shift, the table memory 12 'is no longer addressed by the color coordinates X' and Y ', but by the enlarged color coordinates X "= aX' and Y = aY '. In this case, the digital hue signals T * result. and saturation signals S according to the relationships: The value ranges A, B and C are entered in FIG. 2 for quadrant I. In the value range A there were small, in the value range B medium and in the value range C large values of X 'and Y'.

In the value range A, the shift circuit 46 establishes the following connections: The digital color coordinates X 'and Y' are shifted up by two places (a = 11). The less significant bits x'0 and x 1 as well as y 'and Y'1 are evaluated. The high-value bits x'6 and x 'as well as y'6 and y15 are not taken into account because they are 0 anyway.

In the value range B, the shifting circuit 46 establishes the following connection: The digital color coordinates X 'and Y' are shifted up by one place (a = 2). In this case, only the lower-order bits x'O and y'O of the color coordinates are lost.

Your high-value bits x'6 and y'6 can be disregarded, since they are 0.

In the value range C, the shift circuit 116 produces the following connections: The digital color coordinates X 'and Y' are switched straight through (a = 1) and the lower-order bits x'0 and x'1 as well as y'0 and y'1 are dropped.

For example, an integrated four-bit shifter of the Am25S10 type from Advanced Micro Devices, Inc. can be used as the shifting stage 46. These blocks are controlled by 2-bit shift commands V1 and V2 to a control input 117 according to the following table: Shift value range Shift command V1 V2 A 2x HL W lx LH (17) c OLL The value ranges A, B and C can be defined by the bits Xt4, x'5, x'6, y'4, y'5 and y'6 of the digital color coordinates X 'and Y'. These bits address a read-only memory 118 (PROM) after the bits x'6 and y'6 have been linked in an OR gate 49 via the address inputs 50. The shift commands V1 and V2 are in the read-only memory 48 as a function of the value ranges A, B and C saved. These shift commands reach the control inputs 117 of the shift stage 116 via a line 51.

As can be seen from the given equations (12) and (13), gave for the value ranges A and B digital saturation signals S, dic: by the factor a are too big and need to be corrected. For this reason the output is 38 the table memory 12 'is followed by a corresponding correction stage 52, which are also sent by dfn shift commands V1 and V2 on lines 51 via the Control inputs 53 is controlled. The correction stage 52 takes a downward one Position shift which corresponds to a division by the factor "a".

The correction stage 52 can either be used as a shift stage (Shifr), which corresponds in its mode of operation to the shifting stage 116, or according to Fig. 5 be formed.

Instead of the table memory 12 in FIG. 3 with a capacity.

of 16 K x 8 bits or the table memory 12 'in Fig. 4 with a Of course, two separate table memories could also have a capacity of 1 K x 8 bits each with 16 K x 4 bits or

1 K x 4 bits are used, with in the first table memory the digital hue signals T and in the second table memory.

the digital saturation signals S are stored.

In this case, a variant of the coordinate transformation circuit shown in FIG consist in that only the first table memory, the shift circuit 46 is connected upstream, while the second table memory is directly from the inversion -Step 10 is addressed. Then, however, the least significant bits x'0 and x '1 as well as y'0 and y'1 of the color coordinates X' and Y 'are thrown off, whereby the coordinate calculation becomes less precise. The variant would have the advantage that a correction of the saturation signals S could be omitted. The rounding of the result could also be programmed into the second table memory.

An advantageous embodiment of the correction stage 52 is shown in FIG. 5.

The correction stage 52 consists essentially of four controllable ones Gates 54 to 57 and from a programmable read-only memory 58 (PROM).

The gates 54 to 57 (e.g. of the type SN74LS? 44 from Texas Instruments) are connected to the outputs 38 of the table memory 12 '. The gates have 3-state outputs, the states of which are derived from an enable input 59 are controlled in such a way that the lines at a log. L at the activation input 59 switched through (output low resistance) and with a log. H blocked (output high resistance) are.

The read-only memory 58 (z. B. of the type SN711S288) with a capacity of 32 x 8 bits also has 3-state outputs, the status of which is determined by an enable input 61 can be controlled here. Since both dc gates and the read-only memory have 3-state outputs the output lines can be connected directly.

The read-only memory 58 has two memory areas a16 bits in which in each case the data of the divided by a = 4 or a = 2 and rounded if necessary Table memory 12 'are stored. These data are received via four of the 5-bit address inputs 60, which are connected to the outputs 38 of the table memory 12 ', are selected.

The memory area is selected via the fifth address input 60 '.

The control inputs 53 of the correction stage 52, at which the shift commands V1 and V2 appear, are available via an OR gate 63 with the enable input 59 the gates 54 to 57 and via an inverter hll with the enable input 61 of the Read-only memory 58 in binding.

The address input 60 'of the read-only memory 58 is with the shift command V1 applied as a control bit.

The mode of operation of the correction stage 52 is as follows. In the case that no position shift has taken place in the shift circuit 46 (see Table 17; V1 = V2 = L), gates 54 to 57 are switched on and none are found Correction of the digital saturation signals read out from the * table memory 12 ' S. instead of. But if there is a position shift in the shift circuit 46 by "1" or "2" (Table 17; V1 H or L; V2 = L or H) the gates 54 to 57 blocked and the outputs 62 of the read-only memory 58 effective. Then address the digital saturation signals read out from the table memory 12 ' S # the read-only memory 58 and the shift command V1 at the address input 60 'are decisive as a control bit about whether the divided by the factor 2 or "4" and thus corrected saturation signals S are read from the read-only memory 58.

Claims (17)

Characteristic: Digital coordinate transformation "Patent claims 9 Method for converting digital chrominance signals of a right-angled color coordinate system into digital hue silks; nals and saturation signals of a polar color coordinate system, in particular according to patent ..... (patent application P 29 23 477.9), 3 characterized in that a second right-angled color coordinate system (8) running parallel to the first right-angled color coordinate system (1) is placed through the center point (Po) of the polar color coordinate system (4), which is the polar Color coordinate system (4) divided into four quadrants, the quadrants being assigned quadrant identification numbers, that the quadrants in which the digital chrominance signals (X; Y) fall are determined and the relevant digital QuadranLen identification numbers are marked that the chrominance signals (X; Y) are converted in terms of amount into corresponding coordinate values (X ';Y') of one of the quadrants, that from d en coordinate values (X ';Y') the saturation signal (S) according to the relationship: and the hue signal (T *) of the quadrant according to the relationship: is determined, and that the digital hue signals (T) for all quadrants are formed from the marked quadrant identification numbers and the hue signals (T) of the quadrant. 2. The method according to claim 1, characterized in that the individual Quadrant digital quadrant identification numbers increasing in the direction of increasing hue signals (T) are assigned and that the marked quadrant identification numbers are each the most significant Bits and the hue signals (T *) of the quadrant are the least significant bits of the color tone signals (T) to be determined for all quadrants. 3. The method according to claim 1 or 2, characterized in that the Coordinates of the center point (P'O) and the maximum radius of the polar color coordinate system (4) half the end values of the digital chrominance signals (X; Y) in the first right angle Color coordinate system (1) correspond. 4. The method according to any one of claims 1 to 3, characterized in ~ that the digital quadrant identification numbers from a logical combination of each most significant bits (MSB) of the digital chrominance signals (X; Y) can be determined. 5. The method according to any one of claims 1 to 4, characterized! that the digital coordinate values X '(Y') by omitting the most significant bits (MSB) and inverting old low-order bits (LSB) of the digital chrominance signals X (Y) can be obtained if the relevant chrominance signals X (Y) are to the left of the Y 'axis (below the X'-axis) of the second right-angled color coordinate system (8) lie, and that the digital coordinate values X '(Y') by omitting the most significant Bits (MSB) and non-inverting of all lower-order bits (LSB) of the digital chrominance signals X (Y) can be obtained if the relevant chrominance signals X (Y> to the right of the Y 'axis (above the X' axis) of the second color coordinate system (8). 6. The method according to claim 5, characterized in that the inversion or non-inverting of all low-order bits of the chrominance signals X and Y is controlled by the most significant bit in each case. 7. The method according to any one of claims 1 to 6, characterized in that the functions: and for one of the quadrants are stored in a table memory which is addressed by the digital coordinate values X 'and Y'. 8. The method according to any one of claims 1 to 7, characterized in that that the digital hue signals (T) are inverted if they are in the second or fourth quadrant fall. 9. The method according to claim 8, characterized in that the inversion of the digital color tone signals (T) depending on the marked quadrant identification numbers is controlled. 10. The method according to any one of claims 1 to 9, characterized in, that the digital coordinate values (X '; Y') before addressing the table memory be subjected to a position shift, and that the position shift at the values read out from the table memory are reversed. 11. The method according to claim 10, characterized in that the number of the places by which the coordinate values X 'and Y' are shifted from the Size of the relevant coordinate values X 'and Y' is dependent. 12. The method according to claim 10 or 11, characterized in that the coordinate values X 'and Y' divided into value ranges and in each value range a corresponding position shift is made. 13. Coordinate transformation circuit, especially for implementation of the method according to claim 1, characterized by one with the most significant Bits (MSB) of the digital chrominance signals X and Y applied to quadrant recognition stage (11) to determine the digital quadrant identification numbers, one with the digital Chrominance signals X and Y applied to transformation circuit (10) for determination the corresponding coordinate values X 'and Y' of the second right-angled color coordinate system (8), and one connected to the transformation circuit (10) and through the Coordinate values X 'and Y' addressable table memory (12) for the transformation equations for obtaining the digital color tone signals (T) at a first memory output and the digital saturation signals (S) at a second memory output. 14. Coordinate transformation circuit according to claim 13, characterized characterized L that the first memory output of the table memory (12) from the quadrant recognition stage (11) controlled inverter (13) for the color tone signals (T) is connected downstream. 15. Coordinate transformation circuit according to claim 13 or 14, dadurct indicates that the transformation circuit (10) is one of the respective most significant bits of the digital chrominance signals X and Y controlled inverter is designed for their low-order bits. 16. Coordinate transformation circuit according to one of the claims 13 to 15, characterized in that between the transformation circuit (10) and the table memory (12) has a controllable shifting stage (46) for shifting positions of the coordinate values X 'and Y' and that the second memory output the table memory (12) is followed by a controllable correction stage (52) is to undo the position shift. 17. Coordinate transformation circuit according to claim 16, characterized KS indicates that the control inputs of the shift stage (46) and the correction stage (52) are connected to a control generator (48) with the coordinate values X 'and Y' is applied.