DE2927104C2 - Device for detecting an interfering signal - Google Patents

Description

The invention relates to a device for detecting a present in a circuit, an interference signal of a predetermined frequency exceeding a permissible maximum level using a filter arrangement for decoupling signals of the predetermined frequency from the circuit.

AC-fed track circuits are used so that rail vehicles can travel safely on a route network used to determine the occupancy status. The proper functioning of the track circuits can be caused by harmonics of the drive currents with a frequency of the track circuits corresponding Frequency - especially when using chopper or thyristor-controlled vehicles - be disturbed. For this reason, devices of the type mentioned have been developed (DE-OS 24 44 251).

With such devices, however, it is not possible to constantly monitor the filter arrangement for failure monitor.

The object of the invention is to design a device of the type mentioned at the outset in such a way that a safety-related monitoring of the filter arrangement is made possible.

According to the invention, this object is achieved in that a generator for generating a Test interference signal with a test level that is relatively low compared to the maximum level and a clock for the Output one between a first and a second characteristic state with one compared to the predetermined Frequency relatively low clock frequency changing clock signal are provided that the test interference signal can be coupled into the circuit via switching means during each first characteristic state that from decoupled signal a first threshold level for outputting a first control signal when not undershot of the test level and not exceeding the maximum permissible level superimposed by the test level during each first identification state and a second

ίο Threshold level for issuing a second control signal controllable when the maximum permissible level is not exceeded during every second characteristic state are and that a reporting device for issuing a fault message in the event of failure of the first or second control signal is provided

An advantageous embodiment of the invention is characterized in that a clock generator Converter is provided for generating the clock signal from the test interference signal separate clock can be dispensed with.

An embodiment of the invention is shown in the drawing and is explained in more detail below
The illustration shows with a thick drawn out

Line a section of a circuit, not shown for the sake of clarity, which carries the drive current of a vehicle. In this section a coupling element K is arranged to which a test interference signal can be fed via a switch SCH. This has a relatively low test level compared to the maximum level and has the same frequency as an interfering signal that may be present in the circuit and affecting AC-fed track circuits, the presence of which must be reported for safety reasons when a permissible maximum level is exceeded.

The generator G also controls a converter U, which has the characteristic states logic "0" and logic "1" having a square wave signal with an opposite

The specified frequency generates a relatively low clock frequency. If the clock signal assumes the status logic "1", the switch SCH is closed.

A filter arrangement F, which is connected to two parallel threshold stages 51 and S2, is also provided in the circuit for decoupling the predetermined frequency. The threshold value S 1 emits a first control signal to a first input of an AND element U \ if the test level is not exceeded

and the maximum permissible level superimposed by the test level is not exceeded. The second threshold value stage 52 emits a second control signal to a first input of an AND element U2 if the maximum permissible level is not exceeded.

The second input of AND gate Ul is fed the clock signal directly so that the first control signal is switched only in the presence of the characteristic state logical "1" the clock signal to an OR gate O. The second input of AND gate Ul, the clock signal is inverted, so that the second control signal is switched the clock signal to the OR gate O during the characteristic state logical "0".

If there is no interference signal in the circuit that exceeds the maximum permissible level, a control signal is therefore always switched to a signaling device M. The failure of a control signal always triggers a message from the mouse signaling device based on the closed-circuit principle.

Sheet drawings.

Claims (2)

Patent claims: 1. A device for detecting a present in a circuit, a permissible maximum level exceeding interference signal of a predetermined frequency using a filter arrangement for decoupling signals of the predetermined frequency from the circuit, characterized in that a generator (G) for generating a test interference signal with a test level that is relatively low compared to the maximum level and a clock generator (U) for emitting a clock signal alternating between a first and a second characteristic state with a clock frequency that is relatively low compared to the predetermined frequency is provided that the test interference signal via switching means (SCH, K) during Each first characteristic state can be coupled into the circuit that the decoupled signal has a first threshold level (SX) for emitting a first control signal when the test level is not undershot and the maximum permissible level superimposed by the test level is not exceeded during each first characteristic state des and a second Schwellwertstufc (S 2) for issuing a second control signal when the maximum permissible level is not exceeded during every second characteristic state and that a reporting device (M) is provided for issuing a fault message when the first or second control signal fails. 2. Device according to claim 1, characterized in that a converter (U) is provided as a clock generator for generating the clock signal from the test interference signal.