DE2903308A1 - Integrated circuit wiring structure prodn. - by electron lithography, three anodising stages under different conditions and removal of oxide - Google Patents
Integrated circuit wiring structure prodn. - by electron lithography, three anodising stages under different conditions and removal of oxideInfo
- Publication number
- DE2903308A1 DE2903308A1 DE19792903308 DE2903308A DE2903308A1 DE 2903308 A1 DE2903308 A1 DE 2903308A1 DE 19792903308 DE19792903308 DE 19792903308 DE 2903308 A DE2903308 A DE 2903308A DE 2903308 A1 DE2903308 A1 DE 2903308A1
- Authority
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- Prior art keywords
- oxide
- layer
- electron beam
- porous
- exposed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
- 238000007743 anodising Methods 0.000 title claims description 22
- 238000001459 lithography Methods 0.000 title abstract 2
- 238000000034 method Methods 0.000 claims abstract description 47
- 239000004922 lacquer Substances 0.000 claims abstract description 15
- 229910052751 metal Inorganic materials 0.000 claims abstract description 11
- 239000002184 metal Substances 0.000 claims abstract description 11
- 238000000609 electron-beam lithography Methods 0.000 claims abstract description 10
- 230000004888 barrier function Effects 0.000 claims abstract description 9
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 8
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 8
- 238000002048 anodisation reaction Methods 0.000 claims abstract description 5
- 239000000758 substrate Substances 0.000 claims abstract description 5
- 238000010894 electron beam technology Methods 0.000 claims description 12
- 229910052782 aluminium Inorganic materials 0.000 claims description 11
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 11
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 10
- 229920003229 poly(methyl methacrylate) Polymers 0.000 claims description 10
- 239000004926 polymethyl methacrylate Substances 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 239000002966 varnish Substances 0.000 claims description 8
- 239000004065 semiconductor Substances 0.000 claims description 7
- 239000003792 electrolyte Substances 0.000 claims description 6
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 4
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 4
- 238000006243 chemical reaction Methods 0.000 claims description 3
- 230000001681 protective effect Effects 0.000 claims description 3
- 241000283707 Capra Species 0.000 claims description 2
- FEWJPZIEWOKRBE-UHFFFAOYSA-N Tartaric acid Natural products [H+].[H+].[O-]C(=O)C(O)C(O)C([O-])=O FEWJPZIEWOKRBE-UHFFFAOYSA-N 0.000 claims description 2
- 239000002253 acid Substances 0.000 claims description 2
- 229910021529 ammonia Inorganic materials 0.000 claims description 2
- 230000004048 modification Effects 0.000 claims description 2
- 238000012986 modification Methods 0.000 claims description 2
- 230000003647 oxidation Effects 0.000 claims description 2
- 238000007254 oxidation reaction Methods 0.000 claims description 2
- 239000003973 paint Substances 0.000 claims description 2
- 235000002906 tartaric acid Nutrition 0.000 claims description 2
- 239000011975 tartaric acid Substances 0.000 claims description 2
- NYQDCVLCJXRDSK-UHFFFAOYSA-N Bromofos Chemical compound COP(=S)(OC)OC1=CC(Cl)=C(Br)C=C1Cl NYQDCVLCJXRDSK-UHFFFAOYSA-N 0.000 claims 1
- RZKGRMKNKVMMAL-UHFFFAOYSA-N [O-2].[O-2].[O-2].[Cr+3].[Cr+3].OP(O)(O)=O Chemical compound [O-2].[O-2].[O-2].[Cr+3].[Cr+3].OP(O)(O)=O RZKGRMKNKVMMAL-UHFFFAOYSA-N 0.000 claims 1
- 239000002318 adhesion promoter Substances 0.000 claims 1
- 230000005855 radiation Effects 0.000 abstract 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
- 238000005530 etching Methods 0.000 description 3
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- WGLPBDUCMAPZCE-UHFFFAOYSA-N Trioxochromium Chemical compound O=[Cr](=O)=O WGLPBDUCMAPZCE-UHFFFAOYSA-N 0.000 description 1
- AZDRQVAHHNSJOQ-UHFFFAOYSA-N alumane Chemical group [AlH3] AZDRQVAHHNSJOQ-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 150000001450 anions Chemical class 0.000 description 1
- 239000010407 anodic oxide Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910000423 chromium oxide Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000007873 sieving Methods 0.000 description 1
- 239000002689 soil Substances 0.000 description 1
- 238000005496 tempering Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02258—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by anodic treatment, e.g. anodic oxidation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
- H01L21/76888—By rendering at least a portion of the conductor non conductive, e.g. oxidation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Verfahren zum Herstellen von Leitbahnstrukturen fürMethod for producing interconnect structures for
integrierte Halbleiterschiltungen.integrated semiconductor circuits.
Die Erfindung bezieht sich auf ein Verfahren zum Herstellen von Leitbahnstrukturen für integrierte Halbleiterschaltungen mit Hilfe der Elektronenstrahllithographie und Anodisierung von Metallschichten.The invention relates to a method for producing interconnect structures for integrated semiconductor circuits with the help of electron beam lithography and anodizing of metal layers.
In der Halbleitertechnologie werden die Muster auf den Kristallchips mittels optischer Methoden angebracht. Bei der derzeitigen Herstellung von integrierten Schaltkreisen werden diese Methoden durch ein Verfahren ersetzt, welches sich für die Fälle eignet, in denen eine höhere Auflösung erzielt werden soll. Dieses Verfahren, bei dem die Halbleiterchips mit Elektronen bestrahlt werden, erfordert die Anwendung von Elektronenstrahl empfindlichen Lacken, welche sich bei Bestrahlung von Elektronen genauso verhalten wie die wohlbekannten Fotolacke bei Bestrahlung mit ultraviolettem Licht.In semiconductor technology, the patterns are on the crystal chips attached using optical methods. In the current production of integrated Circuits, these methods are replaced by a procedure which is suitable for suitable for cases in which a higher resolution is to be achieved. This method, in which the semiconductor chips are irradiated with electrons, the application requires of electron beam sensitive lacquers, which are affected by the irradiation of electrons behave in the same way as the well-known photoresists when exposed to ultraviolet Light.
Aus der Zeitschrift Philips Technische Rundschau 35, Nr. 3, Seiten 72 bis 84 ist zu entnehmen, daß durch die Anwendung der Elektronenstrahltechnik Strukturen, z. B.From the magazine Philips Technische Rundschau 35, No. 3, pages 72 to 84 it can be seen that by using electron beam technology Structures, e.g. B.
Aluminiumleitbahnen, mit sehr guter Randschärfe und Details im Bereich von 0,1 /um herstellbar sind. Dabei wird der bereits im Handel erhältliche positiv-arbeitende elektronenstrahlempfindliche Lack auf der Basis Polymethylmethacrylat (= PMMA-Lack) angewandt.Aluminum conductor tracks, with very good edge definition and details in the area of 0.1 / µm can be produced. The positive-working Electron beam sensitive lacquer based on polymethyl methacrylate (= PMMA lacquer) applied.
Eine mögliche Anwendung des Elektronenstrahlschreibens in der Halbleitertechnologie ist die sogenannte individuelle Verdrahtung. Diese Art der Verdrahtung kann, da sie besser zur Automatisierung geeignet ist, rascher und einfacher als mit der herkömmlichen Fotolithographie, die einen relativ aufwendigen Maskenherstellungsprozeß erfordert, mit dem Elektronenstrahlsclireiben durchgeführt werden. Dabei wird die z. B. mit einem geeigneten Band rechnergesteuerte und mit einem Elektronenstrahl geschriebene und danach entwickelte, freigelegte Leiterbahn, die vorzugsweise aus Aluminium besteht, erhalten, wenn die übrige, meist ganzflächig über einer Schaltung vorhandene Metallschicht entfernt worden ist.One possible application of electron beam writing in semiconductor technology is the so-called individual wiring. This type of wiring can be there it is better suited for automation, faster and easier than with the conventional one Photolithography, which requires a relatively complex mask production process, can be performed with the electron beam rubbing. The z. B. with computer-controlled on a suitable tape and written with an electron beam and then developed, exposed conductor track, which is preferably made of aluminum, obtained when the rest of the metal layer, which is usually present over the entire surface of a circuit has been removed.
Das Elektronenstrahlverfahren arbeitet, wie bereits erwähnt, mit Positivlack unter Anwendung einer Abhebetechnik, die hier eine zur Bildung guter Kontaktwiderstände nötigen hohen Aufdampftemperatur nicht verträgt, da der PMMA-Lack zerstört wird.As already mentioned, the electron beam process works with positive resist using a lift-off technique, which is used here to form good contact resistances The necessary high vapor deposition temperature cannot be tolerated, as the PMMA lacquer will be destroyed.
Gleicherweise kann die Herstellung von Lackstrukturen für die Verdrahtungsebene mit Hilfe eines sogenannten "Negativlackes" erzeugt werden, dessen Resistenzverhalten und Haftung bei Ätz- und ähnlichen Prozessen noch wenig erprobt ist. Schließlich könnte bei Positivlack (= PMMA-Lack) mit der "Umkehrung" etwa des entsprechenden Maskenmagnetbandes gearbeitet werden, welches jedoch eine große Bedeckungsdichte und damit eine lange Schreib- zeit bewirkt. Dabei kann dann eine Ätztechnik zur Strukturierung der Leiterbahnen verwendet werden.Likewise, the production of lacquer structures for the wiring level can be used with the help of a so-called "negative varnish", its resistance behavior and adhesion in etching and similar processes has not yet been tried and tested. In the end could with positive varnish (= PMMA varnish) with the "inversion" about the corresponding Mask magnetic tape can be worked, which, however, has a large coverage density and thus a long writing time causes. A Etching technology can be used to structure the conductor tracks.
Die Erfindung macht sich die Erkenntnis dieses "Umkehrproblems" zunutze und koppelt das Verfahren der Strukturerzeugung von Leitbahnen mittels Elektronenstrahllithographie mit dem bereits aus der DT-OS 23 13 106 bekannten Verfahren der Aluminiumanodisierung. Beim Anlegen einer positiven Spannung (im Bereich von einigen Volt) an eine Aluminiumschicht, die in einem geeigneten Elektrolyten eingebracht wird, bildet sich zufolge der Reaktion des Aluminiums mit den Anionen des Elektrolyten eine Aluminiumoxidschicht aus. Bei unterschiedlichen Anodisierungsbedingungen kann sowohl poröses (porous) als auch nicht poröses bzw. porenfreies (sogenanntes barrier oxide) Oxid gezielt erzeugt werden.The invention makes use of the knowledge of this "inversion problem" and couples the process of creating structures for interconnects by means of electron beam lithography with the aluminum anodizing process already known from DT-OS 23 13 106. When applying a positive voltage (in the range of a few volts) to an aluminum layer, which is placed in a suitable electrolyte, forms as a result of the reaction of the aluminum forms an aluminum oxide layer with the anions of the electrolyte. at different anodizing conditions can be both porous (porous) and non-porous or non-porous (so-called barrier oxide) oxide specifically generated will.
Das Verfahren nach der Lehre der Erfindung ist nun gegenüber dem Stand der Technik dadurch gekennzeichnet, daß a) ein Elektronenstrahl- empfindlicher Lack verwendet wird, bei dem die durch den Elektronenstrahl geschriebenen und belichteten Teile einer vorher ganzflächig auf einem Substrat aufgebrachten und oberflächlich anodisch oxidierten Metallschichtbereiche freigelegt werden, b) im Anschluß an den Elektronenstrahllithographieprozeß die von der Lackschicht freien Metalloxidschichtbereiche zur Überführung in ein nicht poröses Metalloxid (barrier oxide) einem weiteren Anodisierungsprozeß unterworfen werden, c) nach Entfernen der Lackschichtbereiche ein dritter Anodisierungsprozeß durchgeführt wird, wobei die freigelegte Metallschicht in ihrer ganzen Dicke in eine poröse Oxidschicht übergeführt wird und d) abschließend die anodisch oxidierten Metallschichten entfernt werden.The method according to the teaching of the invention is now compared to the prior art the technology characterized in that a) an electron beam sensitive lacquer is used in which the written and exposed by the electron beam Parts of a previously applied over the entire surface of a substrate and superficially anodically oxidized metal layer areas are exposed, b) following the Electron beam lithography process the metal oxide layer areas free of the lacquer layer for conversion into a non-porous metal oxide (barrier oxide) in a further anodizing process be subjected, c) after removing the lacquer layer areas, a third anodizing process is carried out, with the exposed Metal layer in hers entire thickness is converted into a porous oxide layer and d) finally the anodically oxidized metal layers are removed.
In einer Weiterbildung des Erfindungsgedankens ist vorgesehen, in Abänderung des erfindungsgemäßen Verfahrens die durch anodische Oxidation erzeugten Schichten als Schutzoxide zu verwenden und die Kontakte durch Fototechnik freizulegen.In a further development of the inventive concept it is provided in Modification of the method according to the invention generated by anodic oxidation To use layers as protective oxides and to expose the contacts by photo technology.
Es liegt auch im Rahmen des Erfindungsgedankens, das Verfahren auf die erste Verdrahtungsebene auszudehnen, wobei das Oxid nicht entfernt wird und die nur noch geringfügig vorhandenen Erhöhungen eine problemlose und damit sichere Aufbringung der zweiten Verdrahtungsebene erlauben.It is also within the scope of the inventive concept, the method expand the first level of wiring without removing the oxide and the only slightly existing elevations a problem-free and therefore safe Allow application of the second wiring level.
Durch das Verfahren nach der Lehre der Erfindung können aufwendige Prozesse der bekannten Foto- und Elektronenstrahl-Lithographie vermieden werden. Es sind lediglich drei, nacheinander folgende Anodisierungsschritte erforderlich, welche gut zu handhaben und auch für eine Automatisierung geeignet sind. Durch die Verwendung des Positivlackes in Verbindung mit dem Elektronenstrahlschreiben ist eine gute Strukturierung bei einem breiten Variationsbereich der Flankenhöhe des Lackes durchführbar. Außerdem wird die für die Haftung bzw. Übergangswiderstände der Leitbahnen bis jetzt übliche Temperung überflüssig. Spezielle Verdrahtungswünsche können auf einfache Weise gelöst werden.The method according to the teaching of the invention can be expensive Processes of the known photo and electron beam lithography can be avoided. Only three consecutive anodizing steps are required, which are easy to handle and also suitable for automation. Through the Use of the positive resist in connection with electron beam writing is good structuring with a wide range of variation in the flank height of the Lacquer feasible. In addition, it is responsible for the adhesion or contact resistance of the interconnects, the usual tempering is superfluous. Special wiring requests can be solved in a simple way.
Die Erfindung wird im folgenden anhand eines Ausführungsbeispiels, welches eine Aluminiumanodisierung zur Herstellung von Aluminiumleitbahnstrukturen betrifft, und der Figuren 1 bis 4 noch näher erläutert. Dabei zeigen die Figuren 1 bis 3 im Schnittbild eine Anordnung nach dem ersten, zweiten und dritten Anodisierungsschritt und die Figur 4 im Profil die fertiggestellte Aluminiumleiterbahn.The invention is illustrated below using an exemplary embodiment, which is an anodizing of aluminum for the production of aluminum interconnect structures concerns, and Figures 1 to 4 explained in more detail. Show it Figures 1 to 3 in sectional view an arrangement according to the first, second and third Anodizing step and FIG. 4 shows the finished aluminum conductor track in profile.
Im ersten Anodisierungsprozeß wird, wie aus Figur 1 ersichtlich ist, eine, auf einem mit einer SiO2-Schicht 1 bedeckten Halbleitersubstrat ganzflächig aufgedampfte Aluminiumschicht 2 in der oberflächennahen Zone unter Verwendung von 2 zeiger Schwefelsäure als Elektrolyten bei einer Spannung von einigen Volt (3 V) und einer Dauer von 25 Min. in eine, aus porösem Aluminiumoxid bestehende Schicht 3 (0,1 bis 0,2 /um) übergeführt, da ein Oxid eine bessere Lackhaftung für den dann aufzubringenden Positivlack 4 (Polymethylmethacrylat-Lack = PMMA-Lack) bewirkt.In the first anodizing process, as can be seen from FIG. 1, one, on a semiconductor substrate covered with an SiO2 layer 1 over the entire area vapor-deposited aluminum layer 2 in the zone near the surface using 2 pointers sulfuric acid as an electrolyte at a voltage of a few volts (3 V) and a duration of 25 minutes in a layer consisting of porous aluminum oxide 3 (0.1 to 0.2 / µm) converted because an oxide gives better paint adhesion for the then to be applied positive varnish 4 (polymethyl methacrylate varnish = PMMA varnish) causes.
Daraufhin erfolgt, wie aus Figur 2 ersichtlich ist, der Elektronenstrahllithographieprozeß, wobei die belichteten und entwickelten Bereiche 5 freigelegt werden.As can be seen from FIG. 2, the electron beam lithography process then takes place, whereby the exposed and developed areas 5 are exposed.
In diesen freigelegten Bereichen 5 bewirkt nun ein zweiter Anodisierungsprozeß die Bildung eines sogenannten barrier oxide 6 in Form von nicht porösen Aluminiumoxid (Figur 2). Bei diesem Anodisierungsprozeß, bei dem die PMMA-Lackschicht als Maskierung gegen ein weiteres Wachstum des porösen, anodischen Oxids (pourous oxide) dient, werden die Anodisierungsbedingungen im Vergleich zum ersten Anodisierungsprozeß wie folgt geändert: Es wird hierfür verwendet eine 3 ziege Weinsäurelösung (60 gar/2 » mit Ammoniak auf einen Säurewert (pH) von 5,5 eingestellt. Dieser Prozeß wird mit einer (konstanten) Stromdichte von 3,5 mA/cm (angelegte Spannung»40 V) durchgeführt. Mit dieser Anodisierung wird eine 60 nm dicke barrier-Oxid-Schicht erzielt.(Generell gilt, daß das barrier oxide 6 sowohl bei Verwendung eines nicht-Oxid-lösenden Elektrolyten als auch bei einem Oxid-lösenden Anodisierungsprozeß entsteht, je nachdem, ob das gesamte poröse Oxid oder nur der Boden zu barrier Oxid verwandelt werden soll).A second anodizing process now takes place in these exposed areas 5 the formation of a so-called barrier oxide 6 in the form of non-porous aluminum oxide (Figure 2). In this anodizing process, in which the PMMA lacquer layer acts as a mask serves against further growth of the porous, anodic oxide (pourous oxide), become the anodizing conditions compared to the first anodizing process Changed as follows: A 3 goat tartaric acid solution is used for this (60 gar / 2 »Adjusted to an acid value (pH) of 5.5 with ammonia. This process will with a (constant) current density of 3.5 mA / cm (applied voltage> 40 V) carried out. With this anodization, a 60 nm thick barrier oxide layer is achieved (generally it applies that the barrier oxide 6 is used both when a non-oxide-dissolving electrolyte is used as well as in an oxide-dissolving anodizing process, depending on whether the entire porous oxide or just the soil should be transformed into barrier oxide).
Das auf diese Weise erzeugte Aluminiumoxid 6 dient in der Folge als resistente Maske (Barriere) gegenüber dem dritten Anodisierungsprozeß, welcher durchgeführt wird, nachdem die vorher als Maske dienende PMMA-Lackschicht 4 entfernt worden ist. Bei diesem Anodisierungsprozeß entsteht wieder ein poröses Aluminiumoxid 7, da ähnliche Anodisierungsbedingungen (niedrige Spannungswerte z. B.The alumina 6 produced in this way subsequently serves as Resistant mask (barrier) against the third anodizing process, which is carried out after the PMMA lacquer layer 4 previously used as a mask has been removed. In this anodizing process, a porous aluminum oxide 7 is formed again, since it is similar Anodizing conditions (low voltage values e.g.
von 20 V) angewandt werden, wie bei der ersten Anodisiebung. Dabei wird die gesamte freiliegende Aluminiumschicht 2, wie aus Figur 3 ersichtlich ist, in ein Oxid (7) umgewandelt. Dieser Prozeß ist besonders gut beherrschbar, da er sich selbst stoppt, wenn die Schicht durchoxidiert ist.of 20 V) can be used as with the first anodic sieving. Included the entire exposed aluminum layer 2, as can be seen from Figure 3, converted into an oxide (7). This process is particularly easy to control because he stops itself when the layer is completely oxidized.
Das mit -den drei Anodisierungsprozessen erzeugte Aluminiumoxid 3, 6, 7 wird schließlich mit einem geeigneten Ätzverfahrenßz. B. durch Behandlung mit einem Gemisch aus Chromoxid (Cr203) in Phosphorsäure (H3P04) weggeätzt, wobei das in Figur 4 abgebildete Aluminiumprofil 12 auf dem SiO2-Substrat 1 entsteht.The aluminum oxide 3 produced with the three anodizing processes, 6, 7 is finally with a suitable etching process. B. by treatment with a mixture of chromium oxide (Cr203) in phosphoric acid (H3P04) etched away, whereby the The aluminum profile 12 shown in FIG. 4 is produced on the SiO2 substrate 1.
Die genannten Oxidschichten können aber auch als Schutzoxid verwendet werden; dabei müssen die Kontakte mit einer Fototechnik freigelegt werden.The oxide layers mentioned can, however, also be used as protective oxide will; the contacts must be exposed using a photo technique.
9 Patentansprüche 4 Figuren Leerseite9 claims 4 figures Blank page
Claims (9)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19792903308 DE2903308A1 (en) | 1979-01-29 | 1979-01-29 | Integrated circuit wiring structure prodn. - by electron lithography, three anodising stages under different conditions and removal of oxide |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19792903308 DE2903308A1 (en) | 1979-01-29 | 1979-01-29 | Integrated circuit wiring structure prodn. - by electron lithography, three anodising stages under different conditions and removal of oxide |
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| Publication Number | Publication Date |
|---|---|
| DE2903308A1 true DE2903308A1 (en) | 1980-08-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19792903308 Withdrawn DE2903308A1 (en) | 1979-01-29 | 1979-01-29 | Integrated circuit wiring structure prodn. - by electron lithography, three anodising stages under different conditions and removal of oxide |
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| DE (1) | DE2903308A1 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3825454A (en) * | 1972-02-18 | 1974-07-23 | Hitachi Ltd | Method of forming interconnections |
-
1979
- 1979-01-29 DE DE19792903308 patent/DE2903308A1/en not_active Withdrawn
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3825454A (en) * | 1972-02-18 | 1974-07-23 | Hitachi Ltd | Method of forming interconnections |
Non-Patent Citations (2)
| Title |
|---|
| NL-Z: Philips techn. Rundschau, Bd.35, H.3, S.72-84 * |
| US-Z: IBM Technical Disclosure Bulletin, Bd. 16, H. 3, S. 1010-1011 * |
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