DE2819730C3 - Circuit arrangement for SECAM receivers with reference signals - Google Patents

Description

The invention relates to a CMC circuit arrangement for SECAM TV receivers with a clamping circuit arrangement for the color reference level and a band filter called a bell filter, which contains a generator from which reference signals periodically with the quiescent frequency cn fo (B-Y) or fo (R - Y) the color carrier signals generated and at times corresponding to a non-visible part of the

Image are introduced into the chrominance signals by electronic switching means in the signal path, whereby the reference signals after demodulation have a reference level for clamping (clamping level) deliver.

With the SECAM method, the color blanking levels in each of the two signal paths of the demodulated color difference signals B- '/ and R- K (which are often referred to as »black level -) correspond to the idle frequencies fo (B- Y) and ίο (Π- Y) des Auxiliary carrier of the chrominance signals D 'Bund D' R.

In the standardized signals transmitted by the transmitter, the rest frequencies So (B-Y) and fo (R-Y) are only transmitted for four microseconds alternately with each trailing edge of the horizontal sync pulse v:; As a result of the delay in the bell circuit and the demodulators, the voltages obtained by demodulating these rest frequencies during a time interval for a sufficiently short period of time cannot be used as reference voltages for an accurate clamping of the color reference levels! can be used after demodulation.

According to FR-PS 15 65 237 is the introduction of the Signals with quiescent frequencies during the Honzontal blanking intervals described in the chrominance signal to reference level for use after demodulation for a clamp. This introduction is starting either downstream of the switch by two controlled oscillators or upstream of the switch and downstream of the bell-shaped fire starting from a single oscillator, the frequency of which is switched. As it turned out Has. a correct reintroduction of the reference level is not guaranteed

The invention is based on the object of introducing the reference signals so that the of the Color barriers generated reference levels can be generated easily and safely and a special one Adjustment becomes superfluous.

This problem is solved according to the invention in that the switching means connected to at least one output of the (jencialor) are arranged in front of at least one selective filter in the signal path for at least one of the chrominance signals (B-Y) and (R ~ ! ^.

Investigations leading to the invention have achieved. that. when the reference signals are behind the selective filter, preferably the bell filter. are introduced, the values of the reference values the after demodulation have been obtained in Dependence on the harmonic behavior of the ref ren / signals fluctuate.

t rfindu.ig \ gemaü ensures that the chrominance signals are passed on and the reference signals through the same selective filter for the fact that the reference levels after the Demodulation for d «·. ! : .. n.i.) n; ', chenver! ". ul! n! S der Reference signals are insensitive, which also there is no need to set this level. This is how it is possible. Demodulators in integrated acoustic technology nik mn the designation "coincidence" or "quadrature" to use that for the harmonic behavior are extremely sensitive.

Hei the use of coincidence or quadrature demodulators there is no need for a zero adjustment, eliminating any change in the chromatic period Equilibrium of the received image is excluded.

Introducing the signals with a frequency. fo (B- Y) and fo (R- Y) upstream of the selective filter, i.e. in the signal flow upstream of this filter, which can be a bell circuit, in particular enables the use of an oscillator in integrated circuit technology without inductive elements, the output voltage of which is higher without disadvantage Harmonic ratio can show what happens when an oscillator produces output signals in a square or triangle shape; In addition, this results in transfer characteristics which are identical for the chrominance and the reference signals, as a result of which the highest accuracy is possible in the demodulation of the signals mentioned.

The switching means between the quiescent frequency generator and the input of the bell filter are advantageous arranged, and they redirect for a fraction of the periods called vertical blanking Phase jumps between the chrominance signal and the reference signal in the form of colored flags in the left part to avoid the image.

Preferential «. The quiescent fractions fo (B-Y) ii ,, ei fo (R-Y) are extracted from an oscillator. whose frequency is controlled by the horizontal deflection with the help of a programmable divider circuit.

The empathy of the signals with rest frequency fo (B- ϊ / and fo (R- Y) in the chrominance signal during the vertical blanking makes it possible to store the color reference voltages after the demodulation, which are therefore particularly stable and free from interference; these stored reference levels be at selected time punk en again in the demodulated ^c arbdifierenzsignaie bY and RY inserted, whereby the clamping circuit with high accuracy the relative balance of the three primary colors de; can generate · transferred image by use of the imported Referenzpegeis as a clamping level (see, DEOS 24 06 255 and. DE-OS 23 54 7J5).

In such a case, the regulation of the introduction of the reference signals and the sampling of the corresponding demodulated signals with the aid of a pilot signal results in a self-synchronization arrangement. which means that the points in time of the sampling of the reference level occur alternately in the B- Y- and RY- paths if the signals speak J of the demodulated resting frequencies (o (B- Y) and Fo (R- Y) are available in the relevant route: this also excludes any possibility of a jamming problem.

Embodiments of the invention are described below explained in more detail on the basis of the drawing. It shows

Fig. I is a block diagram of the color unit of a SEC AM color television receiver in a first embodiment according to the invention.

Fig ■ * <* ": Block circuit» of the color unit of a SECAM color television receiver according to a preferred embodiment of the invention,

1 a to 3 d show the process of introducing the frequencies fo (B-Y) and Fo (R-Y) using electrical signals with a circuit arrangement according to the invention in a SECAM receiver,

F i g. 4 is a block diagram of a preferred embodiment part of a SECAM receiver according to the invention,

F i g. 5a and 5b show the sampling process of the zero reference level in the (B-Y) and (R- V / transmission links) with the aid of electrical signals through the arrangement according to FIG.

6 and 7 the (R-Y) and (B- V> signals of a color bar pattern and, in connection with FIG. 4, the process when the zero reference level is set again during the horizontal blanking intervals.

F i g. 8 shows the basic circuit diagram of an introductory circuit for a receiver according to the invention.

9 shows the basic circuit diagram of an insert circuit for the zero reference level of one of the transmission links of the color difference signals of a SECAM television receiver according to the invention.

In Fig. I is an input terminal l for chrominance signals with one of the contacts of a first UmschaltsUife 2 connected by a switching signal fed to a control terminal 3 with a vertical cut-off frequency / is operated.

Another contact of the switching stage 2 is with the common contact of a second electrical one Switching stage 4 connected, the sound signal fed to a control terminal 5 with piner suitable frequency, e.g. B. half the frequency of the vertical deflection is actuated.

The / wci other contacts of UmschaliMufe 4 are with / wci oscillators 6 b / w. 7 for the quiescent frequencies fo (H- Y) and h) (R- Y) connected, the two frequency dividers 8 b / w in a generator. 9 and two frcqucn / comparison circuits 10 b / w. Il control whose other input is connected to a terminal 12 for the supply of a signal with the Horizontalabtasifrequcn /. The outputs of the comparison shells 10 and 11 are connected to frequency-matching inputs of the oscillators 6 b / w. 7 connected.

The common contact of Unischaltsitife 2 is with the input of the bandpass circuit 13, which is referred to as bell cladding, connected to the The output is divided into two ways, the first way directly with a first delimiter 14.) and the the second are connected to a second limiter 146 via a delay line 15.

The outputs of the two limiters 14. · »and 14i> are

! 6 »

Crowds with demodulators 17; » or Mb are connected, the aforementioned changeover switch being equipped with a control terminal 18. to which a switching signal with half the Zcilenfrcquenz is fed.

The demodulators 17a and Mb are connected to the circuit 28 which may contain circuits for mixing and amplifying and also a clamping circuit arrangement which has two outputs for color differences / signals B-Y and R- Vent. A signal that controls the clamping is fed to an input 30. The clamping should take place in time intervals in which the reference levels occur.

Except for special ones that are specific to the invention Arrangements that will be explained later, sees the effect of the circuit according to FIG. 1 as follows:

The chrominance signal to the input of the bell circuit 6 is divided into two parts, one directly and the other delayed by the duration of a horizontal deflection line (64 μ $). After passing through the limiters 14a and 14>, the direct and delayed signals from the switch 16 are fed to the correct demodulator and then demodulated to obtain the color difference signals B- V on the upper path and the color difference signals R-Y on the lower path : these signals from the demodulators 17a and Mb go to the clamping circuit 28 for clamping the color reference level in the color difference signals.

The arrangement according to FIG. I work as follows:

The input of the bell circuit is connected to terminal 1 via switching stage 2 outside the duration of the vertical blanking intervals, i.e. h outside the duration of the square pulse c Tin F i g. 3a; During the pulses Γ the input of the bell circuit is connected to a common contact of the switching pin 4. The state of this switching stage 4 is controlled by a signal of half the field frequency (Fig. 3b), which for the duration of a field the supply of the frequency fo (B-Y) from the generator 6 and for the duration of the following field of the frequency fo (R-Y) from the generator made possible (Fi g. 3c).

The resting frequencies fo (B-Y) and fo (R-Y) for introduction during the Vcricalaiistastimpulses are 4250 b / w. 4406.25 kHz: riinsicniin.! I ιίέί Zcnciiirc-tjucri? the corresponding division factors are 4250 000/15 625 = 272 and
44O6 25O / I5 625 = 282.

The output frequencies / cn of the oscillators 6 and 7 are compared via the dividers 8 and 9 by the comparison circuits 10 and II with the signals supplied to the terminal 12 with horizontal deflection frequency, which signals originate either from the llori / ontalsvnchronschaltun _t jii or directly from the horizontal deflection generator can. The voltages from the comparison stages 10 and H thus control the equilibrium frequencies of the oscillators 6 and 7 to the exact values for the FrcqiK-n / s Ui (B-Y) and fo (R-Y).

The rest frequencies Ui (B-Y) and Ht (R-Y) are alternately fed into the chrominance signal during the vertical blanking pulses (FIG. 3d).

In the arrangement according to FIG. 1, the signals with the rest frequencies Ui (B- Y) and Ut (R- Y) are supplied by the oscillators 6 and 7. which are controlled in a closed circuit with the Horizontalablenkfrequcnz. Of course, other types of oscillators that are open-loop stabilized can also be used, such as /. B. quar / stabilized oscillators.

In addition, as already stated above, the oscillators 6 and 7 can ripple without any disadvantage with any shape. Square or triangle pulses. deliver as they are, for example, from certain astable Devices in integrated circuits are supplied, their operation to be particularly economical can.

In Fig. 2. in which the reference numerals are the same as those in F i g. I is one of the contacts of the switching stage 2 with the output of an oscillator 21 with variable Frequency connected to one of the inputs of the comparator 10 via a programmable divider 22 is coupled. where the control input for a signal to control the division factor of this circuit with terminal 4 of the signals with half the vertical frequency connected is.

In the embodiment shown in Fig.2 Arrangement is the result of only one oscillator with variable frequency and one programmable Divider obtained, whereby the switching stage 4 according to F i g. 1 can be omitted.

The frequency of the controlled variable frequency oscillator 21 is set via the programmable Divider 22 compared with the line frequency fed to comparator 10 at terminal 12; the initial

The voltage of the comparison iO alternately controls the l'requen / of the oscillator 21; uif the values fo (li-Yj or U> (R -) '). wub "i the ratio of the divider 22 under the control of the terminal 5 is alternately 272 or 282.

It should be noted that the bypassing of the frequencies h> (li- >'_' and U) (N-Y) takes place directly before the next frequency change of the os / illaior 21: in this way the frequency introduced has the full duration of a field for the stabilization by the \ crglcicher 10

In I ι g 4. ir which the Hc / iigs / iffern are the same as those of I ι g I and 2, the detailed circuit diagram of the applicable embodiment of the crimping arrangement contains a stronger 21 for the crimping; i ching similar to the crimping 15 as well as cmc circuit 19. which the I unclion of the I innng of the Klcmmpegel aiisliihrl The outputs of the Demodiil.ilo reu I'.fund 1 Tb are with / uci I aslschaliungen 24.ι inn! 24 / ', which are followed by / wci new introductory circuits 25.f and 25 /', the connection between them being made by two storage condensers 2f> .f and 2 (Wi, which are blinded by a common ground contact 27 ν

The auxiliary noises 25, f and 25Λ mn ic an input in the connection with a terminal 20 for the supply / cilcnaiislastimpulscn are only a circuit 28 for the mixture. Gain and clamping of the I iirbdiffcrcnzsignale Ii-V and R V, wherein this circuit, further comprising a l'.mg.iiigsklcmmc $ 2 for I lelligkeitssignale V and a Fmgangsklcmmc H) for terminal signals enthüll that clamped blue, red and green Color signal Ii. R and I for the control of the electronic heat generator supplies

The control input of a bistable multivibrator 51 is mn of terminal 3 for the load pulse / tied together. Ι'.ιικ-r of the complementary outputs of the Multivibrators 51. of the terminal 5 in fig. I and 2 is only the control input of the programmable Divider 22 connected, which is part of the

- \ llirl / l / VlZfV - Vl

The complementary outputs of the multivibrator 31 are connected to the first inputs of the two AND gates 32.f and \ 2h , the second inputs of these gates being connected to terminal 3 for the Vcrtikalaustast pulses. The outputs of the gates 32, f and ~ i2b are connected to the sampling circuits 24; t and 24r>, respectively.

The Klenuiipegeleinselz circuit 19 works as follows: Based on the Vertikalaust.istimpulsen (Γ ι g. 5a), the multivibrator 31 generates two complementary status signals at its two outputs (Fig. 5b and 5c). which go to the two I'ND gates 32.1 and 32b , the other inputs of which receive Vcrtikalausiastimpulse via terminal 3.

As a result, terminals 32.7 and V2b each deliver a pulse that occurs every second tile image. thus with half the vertical deflection frequency ?. repeated (FIGS. 5d and 5e). which pulses in the circuits 24a and 24fc the reference voltages VRB [ Fig. 5f) and VRR (Fi g. 5g) sample the reference terminal signals introduced in the circuit 2 according to the invention, which result from the demodulation of the frequencies fo (B- > 7 and fo (R-Y) .

The sample levels taken for the voltages VRB and VRR. which form the reference level. Ground in the capacitors 266 or 26; i and re-introduced at each horizontal return path in the transmission path I- V (Fig. 7) or in the transmission path R-Y (I i g. B) by each of the circuits 256 and 25.1. which are controlled via terminal 20 by horizontal blanking pulses.

The reference levels VRIi and VRR are precisely defined for each Z-CiIe and are independent of the ratio of the harmonics of the oscillator 21; a setting of this reference level becomes superfluous, whereby the use of demodilators in integrated circuits of coincidence or (quadrature Ivp possible W III]

The re-introduction of the relevance level takes place wiih rend der I horizontal blanking intervalc. where it is possible is. to use the same signals as the input of the I frequency comparator 10 are fed: under these conditions, the terminals 20 and 12 can be combined, which is indicated by a dashed line in Circuit diagram according to I ι g. 4 is shown.

The Klemmsignai Emsetz circuit 2 shown in I ι g H , in which the reference numbers are the same as those in Fig. 1.2 and 4, contains a positive conductor 33 and a negative 34th which are connected to two terminals 35 and 36 of a voltage source I b , where the negative ΙΌΙ of this (source is also connected to the common ground contact 27.

Between the conductors 33 and 34 there is a resistance cable 37, 18 and 19, with the common Point of the first two mn of the base of an Ir.insistor 40 connected by npn ivp. The common point of resistors 38 and 39 is at the base of a transistor 42 connected by the npn type, the emitter of which is connected to the emitter of a third transistor 42. also from npn Ivp. via a resistor 43 the conductor 34 is connected.

The collector of transistor 40 is connected directly to the positive conductor 33, while the emitter is connected to the collectors of transistors 41 and 42 through two resistors 44 and 45.

The bases of transistors 41 and 42 are connected via a k, .η, Ι, -ηι .i ,, r M-, mn <W Klrmino 3 fiir Hie Vcriik: il; ni <.- tasiimpulse coupled to the first via a resistor bridge 47 and 48 and the second directly.

Form transistors 49-50 and 51-52 of the npn type two groups, the emitters of which are connected to each other, the first to the terminal I for the Chrominance signals and the second are connected to the collector of a transistor 53 from npn-T \ p, whose The base is connected to the oscillator 21 and the emitter of which is connected to the conductor 34 via a resistor 54.

The bases of transistors 49 and 52 are connected to the collector of transistor 41 , while the bases of transistors 50 and 51 are connected to the collector of transistor 42.

The collectors of transistors 49 and 51 are connected directly to the positive conductor 33, while the collectors of transistors 50 and 52 are connected the F.mitter of a transistor 55 of the npn type are connected, the base of which is connected to a resistor bridge 56-57 / between the conductors 33 and 34 is.

The collector of the transistor 55 is connected on the one hand via the bell circuit 13 to the conductor 33 and on the other hand to the inputs of the limiter 14a and the delay line 15.

The clamp signal fin guide circuit in FIG. 8 works as follows: The transistors 49, 50, 51 and 52

form a changeover switch, which is controlled by the transistors 41 and 42 is controlled. If there is no vertical blanking pulse tan of terminal 3, the transistor conducts 41 and transistor 42 is blocked; under these conditions, transistors 50 and 51 conduct and are the transistors 49 and 52 blocked. As a result, the l'arbiirtSi'nale on terminal I are connected to the Transistors? C and 55 controlled on the direct and the delayed path (via 14, ib / w. 15); against it the signals generated by the oscillator 21 arrive directly / around the positive conductor 5) via the transistor 51.

With a positive vertical blanking pulse at terminal 1, the situation described is reversed, transistors 42, 49 and 52 conduct, and transistors 41, 50 and 51 are blocked; Under these conditions, it is the chrominance signals that reach the conductor Π, while the reference signals fo (H- Yy and fo (K - Y) are controlled via the direct and delayed paths (Fig. 3d) after every second field.

The buffer transistor 55 switched in cascode lowers the output impedance, the collectors of transistors 50 and 52 and suppresses also possible Crosstalk between the two signals due to the F.iuitter collector stray capacitance of the blocked transistor 50 or 52.

The in F i g. 4 illustrated clamping level sounding 19. in which the reference numbers are the same as those in length. 1.2 and 4, contains the two transistor pairs 58-59 and f »0-6l of npn-Tjp, whose Kmittcr are two and two with the collectors of two other transistors 62 and hl. also of the NPN type, one of the bases of which are connected to the output of the clatter J2 / 'and the other to the terminal 20 of the horizontal blanking signals, the limiters of which are also connected to the negative conductor 14 via two resistors 64 and 65 The bases of the transistors 58 and 58 are connected via a resistor 66, and one of them is connected to the output of the demodulator 17 / 'and the other to one of the channels of the circuit 28 for mixing and amplifying the Farhdiffcrcn / signals.

are with the collectors \ on two other transistor pair 67, 68, 64 or 70 \ inii pnp ivp connected, whose bases ic two ίιηΙ two connected and whose ! -! miners are connected directly to conductor Π

The collectors of four transistors 59 and 68 are across a resistor 71 to the bases of the transistors 54 and 60 connected, while the collectors of the Transistors 61 and 70 through a resistor 72 to the Base of transistor 61 is connected. In addition, the bases of transistors 59 and 60 are used positive plate of the storage capacitor 26 / 'connected.

The collectors of two transistors 7 5 and 74 from pnp Tvρ are connected directly to conductor 14, the I nutter directly to the corresponding bases of transistors 67-68 and 69-70, respectively, are connected; the collector of another transistor 75. also from the pnp type. is with the bases of transistors 69 and 70 connected, while his Fmitter is directly connected to the conductor 11 connected.

The bases of transistors 71 and 74 are directly on the collectors of transistors 58 and 67 or 60 and 69 are connected, while the base of transistor 75 with terminal 20 via a resistor 76 connected is

The illustrated ir Fig. ¹ I part of the clamping level insert circuit ar '.- sits as follows: In the absence of horizontal or vertical blanking signals at the bases of the transistors 62 and 61, these transistors and all others are blocked and the demodulating signals of the route used, z . B. on the blue route, via the resistor 66 to the (H- Yy f. Input of the circuit for mixing and amplification 28).

If the signal of the output gate 126 (cig. 3d) when a vertical blanking pulse T occurs is fed from the terminal 1 of the base of the transistor 62, the latter becomes conductive, as a result of which the transistors 58 and 59 are driven emitter. These two transistors form a differential amplifier, the one "Scrom mirror" from the transistors 67, 68 and 71 is assigned, the resistor 71 emt ensuring complete negative feedback; because of the very high gain of the fins and the reference voltage VRH [V ι g. ii) sampled at the iiasis Jes transistor SS and is also at the base of transistor 54. whereby it brings mi the capacitor 266 to the 1 '/ W voltage value. When the vertical kickback pulse to transistor 62 disappears, the charge on capacitor 266 remains at the IWrt value for the entire duration of two fields. This VWrt voltage stored in this way is now reduced with the aid of a wide differential amplifier for leather onial blanking intervals. whose structure is the same as that of the first. newly introduced into the signal. Such clamping level embring circuits are from the Df! () S 24 Od 255 and 2 S> 4 7 Γ> known per se.

Door the whole duration of the I lorizoni.ilaust.istmterv.die. which unlock the transistor 61. so cherishes them I'W / i reference voltage., Which over the Iransistur W) is tapped, .in the Iiasis of the transistor hl urul dealing with animal. Circuit 28 (Ii g. ti)

Due to the high value of the capacitor 2h / <and the very weak current that is grilled off from the base of the transistor hfl with leather I lori / oiitalaustasiinler vall, the I ft / J voltage is too constant between two successive charges of the . r "l .." _v , l ,, ri? M-

Is is! the task of the transistor 75. the memory th charges on the bases of the transistors h4 and 70 inferred otherwise after the disappearance of the I lorizonlalaustastmipulsc to maintain the senior /iist.indes tend to have been; to this / weck is generated by the positive impulses from the terminal 20 blocked transistor 75 when snoozing this Inipulse opened

In a completely identical second circuit .in Compared to that in Ii g. 4 is used for the treatment of the W Y ll reporting vehicles used to corresponding spring of the mixed race and amplification circuit 28 to feed.

Success in the preferred embodiment according to the description! the new introduction of the reference level in the f arhdifferen / sign.ile HY and H Y 'at every hon / onialausta.! interval; theoretically, nothing prevents this operation from being performed at a slower rate in terms of the limitation during the vertical blanking intervals.

Fs is sufficient in this Tall, the clamp nut 20 I lilfe the Wicderholungsfreciuenzsignale with appropriate Da-.ier / u versorgen.um the desired task / u reach.

In the above-mentioned explanations, the Reference signals according to the discovery upstream of the bell filter. in front of the feeder 1 i. in the

SIX'AM larbartsigna! cingeiiihrl. There the two (, irbdifferenzsignale d; i. Modulates a <if their respective carrier. Of course, it is possible to insert the reference signals in a different sidle if the modulated l / sigiuil are passed through the same selective filter before they are demodulated. The circuit ¹ · .mordmmgcn of the exemplary embodiments described has the advantage that no / common filters are required.

Pie KlemmpcriodcM can mim ile independently The periods of the introduction of the Kefere signals were chosen

if, as here, a terminal level input circuit is used. Also bniuehl dNNN cm Kciercnzsi gnal not re-introduced into the appropriately modulated I arbdifle rence signal / u, when the modulated larbdifferenzsignale and W.-Ie: cnzsig NALC by ilassclbc Selcklivfiltcr gefiif.rl w ith

If there is no interlocking loop, in turn ¹ , the hearing of the clergy signals and the clamping of the corresponding denominated signals will happen self-mutually in different hot periods.

llietzu I Hlatt

Claims (11)

Patent claims: 1. Circuit arrangement for SECAM television receivers with a clamping circuit arrangement for the color reference level and with a band filter called a bell filter, which contains a generator from which reference signals with the quiescent frequencies fo (B-Y) or fo (R-Y) generate the color carrier signals and are introduced into the chrominance signals at times corresponding to an invisible part of the image by electronic switching means located in the signal path, the reference signals after demodulation delivering a reference level for clamping (clamping level), characterized in that those with at least one output of the generator ( 5, 7 or 21) connected switching means (2) in front of at least one selective filter in the SigRüiweg for at least one of the chrominance signals (B-Y) and (R- V / 'angcordr.et). 2. Circuit arrangement according to claim!. Characterized in that the switching means between the generator (6, 7 or 21) for the rest frequencies / o (B-Y) and fo (R-Y) and the input of the edge filter designated with a bell filter ( 13) are arranged using the bell filter as a selective filter. 3. Circuit arrangement according to one of claims 1 or 2, characterized in that the Umschaltmi ' ¹ ?! are conductive for a fraction of the periods designated by vertical blanking. 4. Circuit arrangement according to one of claims I, 2 or 3, characterized in that a from the series frequency generator (6, 7 or 21) generated waveform is substantially rectangular. 5. Circuit arrangement according to one of claims 1. 2 or 3, characterized in that the from Resting frequency generator. (6, 7 and 21, respectively) is essentially triangular. 6 Circuit arrangement according to one of Claims 1, 2 or 3, characterized in that the generator for the quiescent frequencies fo (B-Y) and fo (R-Y) contains an oscillator (21), the output of which is connected to an input of a frequency divider (22 ) connected is. whose output mn is connected to the input of a frequency comparator (10). Another input terminal of which is connected to an output terminal (5) of a signal generalor with the horizontal scanning frequency. wherein the Ausgangsklemrne of Frequenzverglcichers (10) is connected to an i rcquenzsteuereingang the Os / ilhtors (21 ( 7 Circuit arrangement according to Claim 6, characterized in that the frequency divider (22) is of the programmable type and contains a control terminal. which is connected to a pulse generator (5). which periodically adapts the division factor of the circuit mentioned to the corresponding two values of the quotient of the horizontal scanning frequency and the quiescent frequencies fo (B-Y) and IO (R-Y) (FIG. 2). 8. Circuit arrangement according to one of claims I to 7, characterized in that the switching means contains two transistor pairs (49, 50; 51, 52) in a switching arrangement, the first input (emitter 49, 50) of which with a terminal (1) for video frequency -Color signals and whose second input (base 53) is connected to the output of the generator (21) for the rest frequencies fo (B-Y) and fo (R-Y) and whose third input (bases 49, 50) is a switching signal - -, input which is connected to a terminal for vertical scanning frequency signals (collector 41, 42), and whose output (collector 55) is coupled to the input terminal of the selective filter (13) (Fig. 8). in 9. Circuit arrangement according to claim 7 or 8, characterized in that the pulse generator is a bistable multivibrator (31) whose trigger terminal connected to a switching signal input (3) of the clamping signal input circuit (2) ι> is. one of the two complementary outputs of said multivibrator (31) simultaneously to the control terminal of the programmable divider and to one of the inputs of a first AND gate (32a / ¹ and the other output to one of the inputs 2 «of a second AND gate (Hb) are connected, the two other inputs of the mentioned AND gates (32a. Z2b) with the switching signal input (3) of the feeder circuit (2) and the outputs with corresponding control inputs >-> a circuit (19) for reinserting, for example, horizontal frequency color reference clamping levels in the color differences jgnale (B-Y) and (R-Y) are connected (Fig. 4). 10. Circuit arrangement according to claim 9. da »ι characterized in that the clamping signal introduction circuit (2) Contains a control signal terminal (3) which is connected to a signal generator for the vertical scanning frequency connected. 11. Circuit arrangement according to claim 9, daii characterized in that the circuit for reinserting the z. B. horizontal frequency Terminal reference level (19) contains a control signal terminal, the .in a signal generator (20) for the Horizontal scanning frequency is connected (Fig. 4). 4 »12. Circuit arrangement according to claim 9. 10 or 11. characterized in that the circuit to re-use the clamping reference level two Contains transistor pairs (58, 59; 60, 6t), which are arranged as a differential amplifier, with the one 4 '. Current mirror order (67, 73, 68; 69, 74, 70) one of the above pairs is combined between the two collectors of the transistors (Fig. 9). 1 5. Circuit arrangement according to one of claims ν before 1 to 7, characterized in that the demoduhcrtcn color difference signal (HY) and (R- Vy either for the duration of the visible Hildes (over 66) / u a mixing and clarification circuit (28) for the color signal or for the duration of the · "· Vertikalaustasiintcrvallc (over 71) / u a .Storage capacitor (26 / ^ get (f ι g 4)