DE2755584A1 - LOAD SWITCH FOR FLUORESCENT LAMPS - Google Patents

Description

GTE Sylvania Inc.

December 10, 1977

GTE-PA 124

PATENT APPLICATION

Load switching for fluorescent lamps

Description:

The invention relates to a load circuit for supplying fluorescent lamps according to the preamble of the first claim.

This invention is particularly concerned with a load circuit for fluorescent lamp types with 35 to 40 watts of power consumption .

Load circuits currently in production for fluorescent lamps are mostly 121) Hz autotransformer types. The Saturation characteristics of the transformer used to reduce the to obtain the currents required for supplying the lamps. However, these types of ballasts are autotransformers

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relatively heavy and take up a lot of space. Also have they have poor efficiency by generating useless heat generate and waste electrical energy. Furthermore is the working frequency of 120 Mz in the human hearing range and therefore annoying.

Another type of known load circuit uses a flip-flop oscillator circuit, which cooperates with a T ransFormat or, whose core can be saturated. This will make the The lamp is energized and the lamps are prevented from being destroyed. The satiety behavior, however, is somewhat erratic and not exactly predictable. Therefore, such devices are not popular.

In another load circuit it becomes a square wave shape generated and sine waveform by means of a filter circuit changes. But it turned out that it is more economical generate the sinusoidal waveform directly. In addition, the relatively high costs for the filter circuit can be saved.

Load circuits that contain 5-sine oscillator circuits and are designed for the supply of fluorescent lamps, have already been developed in the United States.

The prior art also includes separate circuits for short-lived or volatile signals in front of the load circuit (transient signals) and for high-frequency interference signals (RFI = radio frequency interference j were used. Known Filter circuits to reduce interference from transient or balancing processes used single or series-connected Circuits while the filter circuit for

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HF interference signals usually at least two inductors and one have bifilar wound transformer. All of these circuits are relatively expensive and their mode of action is satisfactory not.

The present invention was therefore based on the object of designing a load circuit in such a way that the harmonics and transient effects caused by transistors during switching operation ^! .nge are kept away from the network (to minimize power ransients) and that the transformers working together have inductive windings that are able to develop protective potentials when the load circuits are open, and that finally this load circuit has the capability of power factor correction.

This object is according to the invention for the preamble of claim 1 solved according to the license plate.

Further details and refinements are to be found in the remaining claims and to be taken from the description below.

According to the invention, a load circuit is matched with a Sine wave oscillator equipped by a rectifier circuit is fed, which via a power factor correction circuit connected to the network. The latter is connected to a filter circuit, which is a network conditioning circuit (power line conditioning circuitry). A first transformer contains windings that are connected to the oscillator in They are connected to a winding of a second transformer. This is in series with a capacitor and forms a resonance circuit. A load circuit is connected to the capacitor as a shunt. The second transformer owns Another winding that works together with a clamping circuit that is coupled to the Gloichrichterschnltung is. The first transformer is with a circuit

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connected that for the correction of the transistor storage time cares. Such a load circuit advantageously fulfills the object on which the invention is based.

Such a load circuit with a sinusoidal oscillator is in particular for use with fluorescent lamps that a power consumption of 35 to 40 watts is suitable. The whole circuit is light in weight, uses cheap Components, is economical and owns transmission. stocks and skills currently known with others Circuits are not attainable. This allows the invention Load switching not only beneficial use more efficient failure, but also owns a circuit-related compensation measure for the case of open load circuit.

The invention is described below with reference to the drawing. This shows in

Figure 1 shows a load circuit according to the invention; Figure 2 another version of the circuit)

Figure 3 is a graph of the currents in each transistor a sinusoidal oscillator that does not have a storage time correction circuit has j

FIG. 4 shows a current-voltage racing line of a transistor which an L-shaped and a switching curve for inductive loads having;

Figure 5 is a graph of the density of minority carriers in the base zone of a transistor.

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The load circuit according to FIG. 1 consists of the alternating current source 2, the network, to which a filter circuit 5 is connected, which is used for network conditioning and power factor correction is trained. The rectifier circuit 7 is connected to this. A sine wave oscillator 9 is connected to the rectifier circuit 7 coupled and works with a first transformer 11 and a second transformer 13 together.

In detail, the filter circuit 5 consists of a capacitor 15, which bridges the output of the rectifier circuit 7 as well as the two LC elements in each network input line the chokes 17 and 19 and the capacitors 21 and 23 against the reference voltage level or the circuit ground. Parallel A harmonic suppressor 25 (transient suppressor) is arranged in front of the mains switch 1 for the mains input. The latter is drawn in closed position. The rectifier circuit 7 contains the diodes 27, 29, 31 and 33 in a bridge circuit, the junction of the diodes 27 and 29 with the Choke 17 and the junction of the diodes 31 and 33 is connected to the choke 19 and forms the input. Dre junction the diodes 27 and 31 and the diodes 29 and represent the output dor and are at the input of the oscillator circuit 9 coupled. This contains two transistors 35 and 37 in 'series at this input. At transistor 35 is the Base bias generated by the resistor 39 that forms the base connects to the collector. A capacitor 41 and a diode 43 are parallel to one another at the base. The base bias of the transistor 37 is produced by the resistor 45 between the base and the collector. The capacitor 47 is located at the base and the diode 49 in parallel with each other.

The first transformer 11 has a split secondary winding with the first partial winding 51, the one hand on the emitter and on the other hand at the base of the transistor 3b via the parallel

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Connection of capacitor 41 and diode 43 is located. The second Partial winding 53 is to one with the Emit door of the transistor 37 and on the other hand via the parallel connection of capacitor 47 and diode 4ü connected to the oasis. The primary winding 55 of the first & n transistor 1'l is directly connected η it the primary winding 57 of the second transformer 13.

The second transformer 13 has a split primary winding 57 in series with the capacitor 59. A first secondary 'winding 61 of the second transformer 13 is connected to one Load consisting of two fluorescent lamps 63. Cie are coupled by capacitors 65 and 67. The one so formed Load forms a shunt to the capacitor 59 of the Series resonance circle.

The second secondary winding 69 of the second transformer has a flitten tap that connects to one output of the Rectifier circuit 7 is connected to the emitter of the Transistor 37 is located. The outer ends of the coil 69 are connected to the choke 75 via a diode 71 and 73, which in turn at the other output of the rectifier circuit is coupled.

In addition, the subcircuits 77 and 78 are provided for influencing the memory time of the transistors 35 and 37, which consist of a series connection of a resistor and a diode, 77 and 81 and 85 and 83 respectively. The subcircuit connects the parallel connection of the diode 43 and capacitor 41 at the Winding 51 with resistor 39. Subcircuit 78 is located between the parallel connection of the diode and capacitor 47 on winding 53 and the resistor at its junction with winding 51. Other circuit variants to compensate for the storage time are possible, as will be explained below.

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Another exemplary embodiment of a load circuit is shown in FIG. 2. The circuit has the same item numbers for sub-circuits and components to the extent that they correspond to FIG. 1. In contrast to FIG. 1, the harmonic suppressor 25 is here connected to a rectifier input at the junction of choke 17 and capacitor 21. Because of the symmetry of the filter circuit 5, the harmonic suppressor ZS could also be connected the other way round, namely at the junction of mains switch 1 and choke 17 and with its other connection at the junction between choke It) and capacitor 23.

In addition, the second transformer 13 has a further secondary winding 07 in series with a resistor 69, as well as an additional primary winding 91 of the transformer 11. A different circuit is therefore provided to compensate for the storage time. Subcircuits 77 and 78 are missing.

The network conditioner 5 fulfills two tasks as a filter for harmonics or transients and as an RF interference filter. In the embodiment according to FIG. 2, undesired frequencies at the network input 3 are subjected to two-stage filtering subject. The harmonic suppressor 25 works as a "clipper" and thus as an active filter. Then acts the filter circuit 5 with the chokes 17 and 19 as a passive low-pass filter and the actual load in the form of two fluorescent lamps 63 and its connection circuit.

This double filtering makes it possible for the harmonic suppressor 25 a relatively cheap component with ': less pronounced To use kink characteristic. With the less expended digsn, previously used single filter circuits, was a must sharp bend in the characteristic are required because rela-

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ORIGINAL INSPECTED

tively large changes in potential occur when harmonics or Transients are present.

The gear circuit 5 r-. With the chokes and capacitors 17, 19, As a passive low-pass filter, 21 and 23 block all RF interference signals off, if they occur at network input 3. You can neither to the load nor to the rectifier circuit 7.

The two chokes 17 and 19 also act as a high impedance for signals that are directed towards the mains input 3. The mains input 3 and the rectifier circuit 7 are so to speak by the network conditioner 5 of HF-I nterference ignalen isolated.

Since the two Drosoeln 17 and 19 by structural arrangement are loosely coupled to one another, currents that occur cancel each other through corresponding oppositely directed currents in the other Component from each other. This way every imbalance becomes of the currents extinguished and the currents tied to the circuit mass.

Regarding the function of the sine oscillator 9, it should be noted that it fed by a DC voltage potential pulsed at 12U Hz will. It has the series resonance circuit consisting of the Primary winding 55 of the first transformer 11, the primary winding 57 of the second transformer 13 and the capacitor 59. Its working frequency is around 33 KHz.

The one from the lamps 63 and the secondary winding 61 of the second Transformer 13 existing load is in parallel with the capacitor 59 via the capacitors 65 and 67. In the first moment after switching on, most of the current flows in the sense oscillator 9 through the series resonance circuit, which is a relative

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has a low impedance, while the lamps 63 connected in parallel appear to have a relatively large impedance. This initially prevents a current through the lamps 63. As soon as the lamps 63 are ionized, an increasing current flows through them and at the same time the current through the series resonant circuit decreases. The circular quality 0 of the series resonance ^circuit drops as soon as the available current is taken over by the lamp load.

Let it be assumed that the lamps 63 representing the load are an open circuit. Thereupon rises the current in the primary winding 57 of the second transformer 13. This increases the voltage on this winding and induces an increasing voltage on the secondary winding C? of second transformer 13. This rising tension penetrates the diodes 71 and 73 for conduction, which in turn apply the voltage to the transistors 35, 37 and to the primary winding 57 clamp a given value. This makes both transistors 35, 37 protected against destruction by excessively high currents, even when the load circuit is open.

It is known that transistors have a storage time which can be defined as the time it takes to remove excess Minority carriers at the base is required. In other words, a certain amount of time is required until after these excess minority carriers have been removed from the base circuit, a transistor can switch.

Earlier power shifts did not ensure that the shift curve was optimized. That is why it was common at Inverter circuits high collector currents and high collector

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Emitter voltages during the switching transitions as shown in FIG. The CoIlectorstrom I. of one transistor is an additional current I _c2 from the second transistor

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disturbance superimposed because kr; inc storage time compensation for the Transistors is provided. Thus, both transistors conduct at the switching transitions.

As a result of the high Co1Ie et υ rstromon during the switching strokes rgn ng η had to des hai ': over 1 i before rwn i nc transistors with high Oberwe1len power capability (high transient power capability) should never be used with this load curve is in Figure Ί by the; Curve Λ demon s t ri e rt.

However, it is the circuits to compensate for the memory bit possible, transistors with L-shaped Schü 11kenn 1iη ie for Harmonics or transients with low energy use. This is entered as curve Π in FIG. It is therefore used for circuits for storage time compensation sensible. Use transistors that are both cheap and quick to switch.

There is a technique to compensate for memory time that a circuit provides for the surplus of Minori tatst rägem before switching the transistor to decreased, i nd ° m dia conductivity of the transistor is changed from a saturation zone to an active zone. As Figure 5 shows, the Page 259 of the McGraw Hill publication "Electronic Devices and Circuits "1967, there is an excess of minority carriers in the base region between the conditions "Saturation" and "active" present.

In addition, an "active" condition indicates that the transistor is in an operating condition, the CoI lector junction is reverse biased. Therefore the reduction of the surplus of minority carriers like to resolve to one Value of about zero by going into the "active" condition before switching, essentially the storage time pro-

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bleme and allows transistors for harmonics or transient processes to use with low energy.

As already mentioned in the discussion of FIG. 1, a circuit 77 and 78 is assigned to each of the two transistors 35 and 37, each of which consists of a series connection of a resistor 81, 85 and a diode 79, 83. These circuits 77 and 78 work as a clamping circuit, which causes each of the two transistors 35 and 37 to enter the "active" condition shortly before switching. In other words, when one of the transistors 35 or 37 approaches the switching condition, the circuits Π or 78 reduce the current in the base circuit to such an extent that the coil voltage is essentially the same as the base voltage. In this way the "active" condition is achieved, the excess of minority carriers is reduced to almost zero, the storage time is reduced at the same time and switching therefore takes place at essentially a zero value of the collector current.

Another technique for influencing storage time is in Figure 2 shown. Here the same current flows through the primary windings 55 and 57 of the first and second transistors 11 and 13. The voltage in the secondary winding 87 of the second transformer 13 is shifted by 90 ° with respect to the current in the primary winding 57. The current passing through the secondary winding 87, the resistor 89 and the primary winding 91 of the

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Transformer 11 is out of phase by one 90 leading Supply current prior to current through primary windings 55 and 57.

This current leading by 90 is wiraderurn that in the primary winding 91 flows is vectorial with the current in the secondary windings 51 and 53 combined. This combined

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Current represents a resulting current to the respective base of one of the transistors 35, 37, which leads the collector current by a phase angle that is determined by the winding data and primarily by the value of the resistor 09. As a result, the current , which is fed to the base of one of the two transistors 35, respectively ? 7 , is adjusted in phase so that it leads the collector current sufficiently to compensate for the storage time of the transistor. The transistors 35 and 37 are thereby each switched at zero collector current, whereby the use of cheap transistors is made possible.

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Claims (9)

GTE-PA 124 Patent claims: (1. λ load circuit for fluorescent lamp supply using a matched sine oscillating gate circuit, characterized in that the following sub-circuits and assemblies are included: A. A power factor correction circuit connects a Rectifier circuit with the mains voltage; B. The sine wave oscillator circuit includes a pair of in Series of transistors that make up the rectifier circuit bridge; C. A first transformer with a primary and a Secondary winding, the latter being connected directly to the sine wave oscillator circuit communicates; D. A second transformer with one primary and two Secondary windings, this primary winding and that of the first transformer are in series with a capacitor switched and form a resonance circuit in cooperation with the oscillator circuit, furthermore the first of the two secondary windings of the second transformer coupled with a lamp circuit and thus forms a load circuit parallel to the aforementioned capacitor of the resonant circuit and the second secondary winding of the second transformer is via a pair Diodes connected to the rectifier circuit in order to 809825/0820 BATH ORIGINAL so as a clamping circuit for a given potential level to work, with this particular potential as well is held when the load circuit is open; E. Circuit means are coupled to the oscillator circuit, diü a correction 'of the storage time of the two Transistors cause that to the oscillator circuit belong. 2. Load circuit according to claim 1, characterized in that the Schaltmi tt e 1, ″ coupled to the oscillator circuit and the correction of the storage time of the two transistors cause from a series connection of a second Primary winding of the first transformer, an impedance and a third secondary winding of the second transformer exists and a phase shift of the transistor current caused in such a way that the base current leads the collector current so as to reduce the storage time of the transistor to compensate. 3. Load circuit according to claim 1, characterized in that the correction circuit a series connection one in only a directional device and an impedance, which the secondary winding of the first transformer to ever an output electrode of the two transistors couples, wherein the transistors before switching from the state of conductivity to that of non-conductivity between one Saturation and an active guiding zone. 4. Load circuit according to claim 1, characterized in that the power factor correction circuit composed of a capacitor parallel to the rectifier circuit and from an inductance, which connects to the mains voltage, is composed. 809825/0820 BATH ORIGINAL «J 5. Load circuit according to claim 1, characterized in that a filter circuit is present, which is between the mains input and the rectifier circuit and a consator each between a voltage reference level and each of the two mains connections of the rectifier circuit and one choke in series with each network input between each network connection point and the connection point of the respective one Capacitor at the mains input of the rectifier circuit and finally, a harmonic suppressor is in parallel connected to the mains input. 6. Load circuit according to claim 1, characterized in that the harmonic suppression device consists of a rietailoxydvaristor (MCV) or a series connection of two oppositely polarized Zener diodes. 7. Load circuit according to claim 5, characterized in that the harmonic suppression device between a network connection point and the connection point of the choke with the Capacitor is connected to the other network connection point. 8. Load circuit according to claim 1, characterized in that the rectifier circuit is a pulse direct current rectifier circuit (pulsed DC rectifier meansj and consequently the oscillator circuit at a pulse-shaped DC voltage source is connected. 9. Load circuit according to claim 1 and 8, characterized in that the second transformer is equipped with a third secondary winding in series with an impedance and a second primary winding of the first transformer so as to shift the phase of the oscillator feeding 809825/0820 275SS84 To effect the current and so the storage time of the oscillator to compensate and to effect the switching of the same in each case at essentially a zero current level, whereby the switching losses are minimized. 809825/0820