DE2718902A1 - TRANSFORATION GENERATOR AND ITS USE IN THE CONSTRUCTION OF DIGITAL FILTERS - Google Patents

Description

Boeblingen, April 27, 1977

Applicant; International Business Machines Corporation, Armonk, N.Y. 1O5O4

Official file number:

New entry

Applicant's file number: FR 976 OO6

Representative:

Patent assessor Dipl.-Ing. Heinz Gaugel 7030 Boeblingen

Description:

Transformation generator and its use in the construction of digital filters

709848/0772

_ / 5 271890?

The construction of digital filters can be considerably simplified, if the corresponding filter operations are not in the area of the actual probe signals, but in a transformed one Area to be carried out.

It is known that a large number of operations are carried out to determine the η-th value y of a filtered signal is when direct methods are used. This follows from

^h i * ^a (ni) ⁽¹⁾

H. (i = 0, 1, ... p) the desired filter characteristic defined filter coefficients and

: a represent the η-th key word fed to the filter.

ι η

The operation indicated by equation (1) is called a convolution operation.

There are several known solutions is required of such to carry Konvolutionsoperationen computational effort ■ reduced to a minimum. For example, you have superiors _j propose to use mathematical operators to the filter coefficients and the separated to filter input signals \ ie to bring the ^area! The actual sample values in a transformed form of the original processing level (and then combine them there suitable. To To get back to the level of the actual sample values, which lead to the output signals y, reverse transformations have to be carried out at the end of the operation.

rrm-oM 7098 * 8/0772

With a suitable choice of the type of transformation,
the operations to be performed in the transformed area
simplify. This applies, for example, when transformations of the so-called Fourier type are used, i.e.. for example the Fourier transformation itself, the Mersenne transformation or the Fermat transformation. The computational effort required naturally depends on the simplicity of the j associated with the direct and inverse transformations!

Operations. I.

Several methods are already known for performing such transformations. Such a procedure is from ■ LI Bluestein in NEREM Record. Vol. 10, pages 218 to 219; Published November 1968 by the Boston Section of Electrical and Electronic Engineers. The one described there
The transformer generator for generating the Fourler transformation has susceptibility to interference in the area of the individual branches, the avoidance of which is an extension of the definition
of the values to be processed and thus an extension of these
Makes values itself necessary. In addition, the operational sequence requires a relatively large computing capacity.

It is the underlying object of the invention to provide a

Transformation generator for transformations of the Fourier j to indicate types, especially in the application for digital filters, which has no sources of interference and in which the circuits used are optimally used.

The solution to this problem is laid down in the claims.

The invention is explained in more detail below with reference to the drawings
explained.

Show it:

Figs. 1 and 2 the basic structure of Transformations-FR 976 006 TO9848 / 0772 '

generators,

3 shows a first exemplary embodiment according to the invention of a transformation generator,

4 shows a partial circuit of the exemplary embodiment

according to Fig. 3,

5 shows a flow chart for the exemplary embodiment

according to Fig. 3,

Figs. 6, 7 and 8 show a second exemplary embodiment according to the invention and its flowcharts,

Figs. 9 and 10 show a digital filter using the one according to the invention Transformation generator and

11 shows a third embodiment according to the invention
; example.

The transformations of the so-called Fourier type contain the! Conversion of N sample values {a} into N values A., accordingly,

■ Xl Jv

the relationship

i i

N _f 1 ^ - j

«= Σ a · W ¹ * (2)!

n = o ι

with n, k = 0, 1, ..., N-1 and W ^ = I.

The so-called convolution theorem is used for these transformations. The Fourier transform itself is below
defines the assumption that

FR ¥ 7F

709848/0772

271890Γ

The other transformations of this type considered in connection with the invention are defined modulo p, where ρ is an integer, for example ρ = 2 ^ + 1, W is a multiple of 2 and where the exponents modulo q or 2q are defined for the Mersenne and Fermat transformations.

Equation (2) can also be represented by

W ² N-1
n = o a
η n ² • W Accepted , that n ^{2 b} n = ^a n ' w ² , so receives man κ ² (Kn) ² w " ² " n = o ^b n • W 2

(3)

Equation (3) shows that the values Aj. with help of a Let the digital filter determine its coefficient

I-! - (N-2) ² _ (N-1) ²

1, W ² , w " ² , ..., W ² and W ² and which is arranged between two multipliers, one of which
n ²

a with W ² η

and the other with the values filtered by the filter

7Q98A8 / 0772

multiplied. FR 976 006

-ί- 2718907;

It is therefore possible to set up a transformation generator in the manner shown in FIG. 1. This transformation generator consists of a conventional transversal filter, at the input of which a multiplication device MP1 is arranged and at the output of which a multiplication device MP2 is arranged. The transversal filter comprises a shift register SREG1, multipliers X _Q to X _n-1 and an adder ADD1. The filter coefficients are

N
Since W = 1, these coefficients are symmetric, viz

(Nn) ² n ^

W ^l = W ^Δ

A two-pole switch SW completes the transformation generator. This switch is initially in the switching position 1, so that the values b, b _1, ..., B _M-i _ the register SREG1 be supplied. The adding device ADD1 is in the idle state and does not provide an output value. At the Nth point in time, the changeover switch SW is brought into switching position 2, so that the output of the shift register SREGI is connected to its input. The output of the transversal filter is connected to the output side multiplier MP2, ¹ that provides the transformed values _R A at its output after N revolutions. If circulations are to be avoided, it is sufficient to double the length of the shift register SREG1 and the number of multiplication devices in the filter. A corresponding transformation generator is shown in FIG. The z-transfer function of the filter constructed in this way is

709848/0772

FR 976 Öo6

H (Z) =

2N-1

I.
K = O

Kj 2

The practical importance of such a device is certainly small in view of the effort required to assess.

In order to filter a signal j defined by sample values a

To simplify, it is recommended to perform the appropriate operations! to perform in a transformed domain and to use a conventional filter for this conversion of the key signals. However, this does not prevent interest in the filter used as a transform generator in some applications will.

This is especially true when transformations apply are processed in which the operations modulo p are carried out. Equation (4) becomes

H (z) =

2N-1 - 9-

yw ² z " ^K

K = 5

where the symbol (()) means that the operations are processed according to modulo ρ.

If N = M and assuming that

u + vM

with K = O, 1, ..., 2M -1
u = 0, 1, ..., M-1
v = 0, 1, ..., ..., 2Μ-1,

i becomes from equation (5)

- 1

¹ ττ "? (U + VM) ^

W ^Δ

709848/0772

FR 976 006

X) - 2

271890

M-1 2M-1

H (z) -μ ι

U = O V = O

-MUv

V ² M ²

_z -u _z -Mv

Pa Vr = 1 (= meaning "congruent to")

M ² V ²

Nv

1st W

H (Z) =

M-1 2M-1

I I

U = O V = O

(-1) ^v = (-1) ^v

and

^V - H ^ "W ^Muv

7 m - 1
V = O

_{m Z}

-Mv

j represents a geometric series, results

" ^M

1 + W ^w ζ "1 + W" - ζ ϊ (ζ) can thus be represented as follows:

H (Z)

H (Z)

i ² ,

U = O

_{1 + w} -uM -M

.2 M-1 -u

U = O

" ^M

u_ 2

The transversal filter in the transformation generator according to FIG. 2 cann replaced by a series of M extremely simple filters

709848/0772

FR 976 OÖT

Al

-Vf-

as it is based on the exemplary embodiment according to FIG and for the case of a 16-value Fermat transformation is described with p = 2 +1 and W = 4.

The multiplication device MP1 receives the key signals a

fed sequentially. There these key signals are multiplied by 2, so that the values b result. These values

b are a shift register SR1 comprising 2M = 2N values and at the same time the positive input of a subtracter AD1 supplied. The output of the shift register SR1 is connected to the negative input of the subtracter AD1 tied together. The output of the subtracter is fed to the input of a series of M filters, each one Recursive filter with the transfer function

H '(z) = I.

include, to which a multiplier for a multi

u ²
-5-plikatlon followed by W. Each recursive filter is composed of a subtracter, a shift register comprising M values and a multiplier for a multiplication by W.

The embodiment shown in Fig. 3 is designed for a permat transformation with 16 points (N = 16), so that = 4 when W = 4 and p = 16. So it turns out

¹ | a - 2 ^2nk
n = o ⁿ

_1fi
2 ¹⁶ +1

The shift register SR1 thus has a length of 32 words, (i.e. two blocks of 16 words. Then the filter arrangement comprises four branches, with the recursive filter of each branch

^FRä7SO06 709fU8> 0772

_ ^. 271890T

a shift register (SR2, SR3, SR4 or SR5) of a length corresponding to four V7orts, a subtracter (AD2, AD3, AD4 or AD5) and a multiplier (FSH1, FSH2, FSH3 and FSH4). FSH1 multiplied by 1, so it is required that FSH2 by 2 ~ ⁸ , FSH3 by -1 and

FSH4 multiplied by -2 ~ ⁸ . The multipliers FSH5 to FSH8 multiplying by ^{W 2 multiply by}

- 1-4-9
1,2, 2 and 2. They are fed by taps of the assigned shift register in the first branch from the input of the shift register SR2, in the second branch from the output of the first word of the shift register SR3, in the third branch from the output of the second word of the shift register SR4 and in the fourth branch from the output of the third Word of the shift register SR5. The output signals of the individual filter branches are added up in adding devices AD6, AD7 and AD8. The output of the adding device AD8 is fed to the multiplication device MP2, at the other input of which the K ²

Factor 2 is added. The output of the multiplication device MP2 supplies the values A _{x of} the transformation.

It turns out that only multiplications with fixed coefficients, namely powers of 2, are required. It it can be shown that one arrives at a corresponding result [if a Mersenne transformation is applied, which is defined by

N-1
n = o

»Κ" I. ^a n

1 2 * -1

where p = = -γ-

is, q and 2 ^ -1 are not prime numbers, p1 is a divisor of 2 ^ -1, and W is a power of 2. Such transformations can be used as conventional Mersenne transformations ^{according to ^ modulo 2 q -1.}

70 984B / 0772

-U-

Calculate mation, plus a final operation

2 ^q -1

Modulo -— τ— P ¹

is performed.

If you choose, for example

N = 7 = 49 and ρ =

so you get

, nK

In this case, all calculations can be done according to modulo 2 - (1 can be carried out and it would be sufficient to carry out a final corrective operation after:

Modulo

lead out.

2 ⁴⁹ -1 127

When processing a Mersenne number according to modulo every multiplication by 2 is a simple permutation of the bits of the word to be multiplied by d. that such a permutation does not require any effort Wiring can be achieved. When processing a Fermat [number after modulo the situation is somewhat different. In this case, a multiplication by 2 requires a shift operation, a bit inversion and two additions.

However, it is possible to combine these operations by

FR 976 006

709848/0772

times that code conversion is applied. If you designate the binary values to be processed with "a", then the Code conversion by specifying the values B = a + 1, except the case with a = O, where B is equal to the weight of the highest order bit of "a".

Kun can be shown that a multiplication of B by 2
corresponds to a rotation of d bits with an inversion of the bits supplied to the rotation. For a = 0, the inversion must be
be blocked.

It should be noted, however, that the highest representable number in the B descriptive code is 2 ^a -1 when "a" reaches 2 ^a . Modified values B are therefore obtained by adding
α bits and an additional flag bit used for a = 0. The following table shows the relationship between a and B.

PR 57FW 10 «** / (WJ a-

- each -

(decimal)

B.
(decimal)

B code (binary)

O 1 2 3 4 5 6 7 8 9

10 11 12 13 14 15 16

16

15th

14th

13th

12th

11

10

0 O

1 1

0 1

1 O

0 O

1 1

0 1

1 O

0 O

1 1

0 1

1 O

0 O

1 1

0 1

1 O
OO

0 O

1 1 1 1 1 1 1 1 0 1 0 1 O 1

0 1

1 O 1 O 1 0 1 0 O O O O O O O O

1 0 O O O O O O O 0 O O

O O O 0

Because of this code conversion, the method is simplified and a multiplication by 2 ^d can be achieved in a simple manner with the device shown in FIG.

The device comprises 2ct AND circuits A ₁

_Q , A ' _Q ,

• · I

Vi

a-1 '

furthermore α + 1-OR circuits O _Q ,

O and an inverter I ₁ . Every bit of a value will

■ r

fed to one of the inputs E ₁ to E _a-1. The flag bit is fed to the input FJIi. The input E _Q is applied to the inputs of the AND circuits A _Q and A ^. E ₁ is in connection with A ₁ and A ' ₂ etc. The other connections are made in a corresponding manner up to and including the input

FR 975 ÖÖ6

271890?

E _ _{1 is} connected to the AND circuit A _, ^u ^ d one of the inputs of the OR circuit O, the second input of which is connected to FiI. The outputs of A and A ¹ are connected to the inputs of O. The outputs of A ₁ and A ¹ .. are at the inputs of O ₁ etc. The output of O is connected to the input of an inverter I ₁ , the output of which is fed back to the input of A '. The outputs of the multiplier are denoted by S ₁ , S-, ..., S _. and FAo. If the value given to the input is 0, the AND circuits A, A ₁ , A-, ..., A, due to T1 = 1, are open. A flag 1 is given to FJ i and goes to Fi-o. In all other cases a flag 0 is given to FÄi and T1 = 0, so that all bits of the value given to the input are shifted by one place in the direction of the higher place values, the bit of the highest place after inversion to the lowest value Body is returned.

The code conversion already specified is performed before the values {a} are fed to the convolution generator, then the arithmetic running in this generator are grounded Operations simplified. In particular, one achieves that the multiplication of a by 2 corresponds to d permutations and Shifts of the value A defined in the new code. For this purpose, the device according to FIG. 4 uses.

The transformation generator according to FIG. 3 is particularly economical, since it only requires an extremely small number of circuitry outlay. This transformation generator works but at a relatively slow speed. The corresponding flow chart is given in FIG. Will the Sample values a at time t with a period D on the

η ^c ο

Given input of the generator, the N sample values of the first group {a} are recorded within a period of time NT.

The corresponding transformed values {A ..} can only

709848/0772

FR 9 76 OO6

can be calculated from the point in time t + NT. During the time required to determine {A ^} no new Sample values are given to the input of the generator. The supply of group {a “} does not begin until time t + 2NT. The second group of transformed values {^! Appears first at time t + 3NT. The clear idling comprises 50% of the total operating time of the generator.

The exemplary embodiment of a transformation generator according to the invention shown in FIG. 6 does not have these idle times, so that the sequence diagram shown in FIG. 7 results. For this purpose, the recursive filter used in the embodiment according to FIG. 3 with the transfer function H ¹ (z) is replaced by an arrangement with two loops. One loop forms the recursive filter, while the other loop executes reciculations, a changeover switch being arranged between these two loops. The recursive filter comprises the following series of arranged parts: an adder (Ad ¹ 2, AD'3, AD'4 or AD'5), a shift register (SR'2, SR ¹ 3, SRM or SR'5) with an M values corresponding Length, a multiplier (FSH1, FSH2, FSH3 or FSH4) identical to the multiplier shown in Fig. 3, and;

an inverter (L, I _fi , I ₇ or I ₈ ). The output of the inverter j is connected to the adding device and at the same time to the connection of a switch (SW1, SW2, SW3 j or SW4) having three switching positions. Terminal 2 of changeover switch SW1 is no longer connected, while the corresponding connections of the other changeover switches are connected to the output of the adding device of the respective recursive filter. Each recirculation device, the input of which is connected to the movable contact of the respective changeover switch, comprises the following individual parts connected in series: A shift register (SR6, SR7, SR8 or SR9), the length of which corresponds to M values, a multiplication device (FSH1 ', FSH2 ¹ , FSH3 ¹ or FSH4 '), which is similar to the multirilication device of the recursive filter

FR 976 006. ^ - Aß / 0772

is in the same branch and therefore performs a multiplication with the same coefficient, and an inverter (I ₁ , I ₃ , I3 or I.), the output of which is connected to the terminal O of the corresponding switch. Finally, a multiplication device (FSH5, FSH6, FSH7 or FSH8) is arranged in each of the branches, which multiplies with a constant coefficient and is identical to the corresponding device with the same designation in the exemplary embodiment according to FIG. The input of this last-mentioned multiplication device is connected to the recirculation device at a point which is similar to that in the corresponding branch of the device according to FIG. 3. The remaining part of the generator comprises the adding devices iAD6, AD7 and AD8 and a multiplication device MP2, which are identical to those in FIG. Finally, it should be noted that in the transformer according to FIG. 6, the shift register SR1 of length J2N used in the transformer according to FIG. 3 has been replaced by a shift register SR'1 of length N. , I!

(such as the daraestellten in Fig. 7 flowchart for the execution ^{{approximately} example of FIG. 6 can be seen, are successive '

I ι

The following blocks of sample values {a}, ta _{+ N} >, i ^a _{n +} 2N ^ ' ^{etc. are} lined up directly, without any time gaps. Even

1 2 the blocks of values iK,) , (A «} etc. supplied in the output follow one another directly. Only during the beginning is a period between t and t ^ lost. The shift register 3R ^{1 is initially loaded in this space} The timing of the changeover switches connected between the filters and the recirculation devices is shown in the case of a Fermat transformation in Fig. 8. The numbers 0, 1 or 2 indicate the switching position of the changeover switches at.

flersenne or Fermat transformation generators are particularly suitable for setting up digital filters. The transformations {B _v } and {A ,,} of the two sequences {b_} and {a_} are the

represent the filter coefficients and the key signal to be filtered to determine. Then C _x , = A ₁ , · B ₁ , value by value

KKK

educated. By inverse transformation of the values {C "} we get: one the values {c} corresponding to the circular convolutions of the values

m I

{a} and {b} correspond. Relatively simple combinations lead η η;

from the results of the circular convolutions to the filtered one Signal, in which, for example, that described in the book "Digital! Processing of Signals" by Gold and Rader, page 205; bene "overlap-add" or "overlap-save" process is applied.

With the aid of a transformation generator according to the invention, the structure of a digital filter can thus be considerably improved

simplify. Before describing such a digital filter, it should be pointed out that

(1) those associated with performing the inverse transformations Mathematical operations of the type under consideration here are similar to and through to those in direct transformations the same means are achievable and that

(2) In the case of a digital filter with constant coefficients, the values B _{R can be} predetermined and stored, which saves a transformation generator.

A digital filter which is constructed with the aid of a transformation generator according to the invention and which supplies the values {c} can accordingly be constructed in the manner shown in FIG. The blocks consisting of the sample values a and subsequent values O (“overlap” method) are fed to a direct transformation generator similar to that of FIG. 6. (The group of filters is referred to as FB.) The output of this generator carries the values A- to a multiplier MULT. _{to, at the second input of which the values B R} supplied by a memory MEM and multiplied by a constant coefficient R are applied. (The coefficient R depends on the inverse

PK-T7F-ODB 7482

Transformation together.) The values R · C „become an inverse Transformation generator is supplied, which is similar to that of FIG. 6, in which, however, at the input or output

"2 2

plications with 2 and 2 can be carried out. The multiplications are commutative in this case, so that the multiplication devices MP2 and ΓΊΡ '1 can be omitted. In this way a digital filter as shown in FIG. 10 is obtained. When using the so-called "overlapp" filter method, the sequences {a} are expanded by adding zeros. In practice this means that the length of the blocks which are fed to the transformation generator are doubled in length. In the invention, the transformed values are generated through the use of M first-order recursive filters, each of which contains a multiplication device performing a multiplication by W ~ ". In the time interval between a starting point in time t ₁ and t ₁ + ( ₇ -1) T i the recursive fiItem the actual

N samples supplied. The additional zeros are supplied between the times y T and (NI) T. Processing is restricted to recirculations with ^ multiplications by w " ¹ ^. The output values of the group of filters are the same at time NT as at time ^ T, they are

M2 *

2
but multiplied by W.

Em Fermat system is W = 1, so that W? = -1 and therefore 2

r - ^

= -1 and W 2 = (-1). This means that between times t ₁ + ψ and t ^ NT it is unnecessary to process values in the filter group if an appropriate sign correction is carried out on the previously processed ones.

Ο-7--7 2

271890

This means that the direct transform generator which can be used in the digital filter according to FIG. 10 can be constructed in the manner shown in FIG. This generator 1st quite similar to that of Fig. 6, it differs only in that the series of recursive filter is divided into two sub-groups, wherein the one sub-group, and the other subset comprising the odd branches, the branches of even order. The upper subgroup (even numbered) is fed via SR "1, AD1, where SR" 1 has a length of N / 2. The lower subgroup (odd-numbered) is fed via SR "1 and an adding device AD1O. The output values of the two subgroups are added in AD8 and subtracted from one another in AD9. At the output of

2
The values 2 ~ ^K · A _{x are} supplied to AD9. At the exit of

—KN AD8 the values 2 · Aj are obtained. + · ». It should also be pointed out that in the present case the switching cycle of the changeover switch is no longer equal to N, as in the exemplary embodiment according to FIG. 8, but rather equal to N / 2.

If the "overlapp-add" method is used, it is to note that the inverse transformation must be carried out using the transformation generator according to FIG is.

FR 97 <Γ OÖ6

Blank page

Claims (1)

PATENT CLAIMS Transformation generator for generating discrete transformations of the Fourier type from sequences of blocks with N digital sample values {a}, with N = M, sequences ⁿ n = o N-1 of discrete blocks of transformations (A _1. ) ^Έ K = o generated, with a device at the input and output : for weighting and in between there is a bank of M filters in parallel, the outputs of which are in a ; Adding device are summed up, thereby characterized in that each recursive filter is used as a filter, at whose common input one of the input-side weighting device supplied and values shifted by 2 N places each value for value subtracting subtraction device, and that a device for weighting with a constant coefficient is arranged at the output of each filter is. 12. Transformation generator for generating discrete transformations of the Mersenne type, which is derived from sequences of blocks ken with N digital sample values {a}, with N = M ² , j JX ! Sequences of discrete blocks of transformations N-1 generated, with a K = O at the input and output
Device for weighting and in between there is a bank of M filters in a parallel arrangement, the outputs of which are summed up in an addition device, characterized in that recursive filters are used as filters which are connected via a switch to a recirculation device and at their common input one of the input side weighting- processing device supplied, two different blocks belonging value for values subtracted value S is ubtrakt ionseinrichtung that ajiLAusgang} Eder .._. 709848/0772 ORIGTNÄL INSPECTED A weighting device is arranged in the recirculation device and that the weighting device on the output side is connected to a correction device which supplies the values Pl ^. Transformation generator for generating discrete transformations of the Fourier type, made up of sequences of blocks N-1 - with N digital sample values {a _n >, with N = M, n = o sequences of discrete blocks of transformations _% N-1
{A "} generated, where at the input and output a ^Λ K = o
Means for weighting and in between is arranged in parallel a bank of H Filter _t whose outputs in an adder are summed up, characterized in that serve as filters each recursive filter, which are connected via a switch to a recirculating means and common to the input of one of the value for value subtracting subtraction device, and that a weighting device is arranged at the output of each recirculation device. Transformation generator for generating discrete transformations of the Fermat type using a transformation generator according to claim 1 or 2, characterized in that the transformation generator for Generation of transformations of the Fourier type (claim 1) or of the Mersenne type (claim 2) Upstream converter is connected, with the exception of the values a a o, which are converted into B = 2 ^, the sample values a ,, converted into values B = H +1, where σ is the weighting ⁿ η FR 976 006 7Π9848 / 0772 271890 / of the most significant value a, and that then the Values B are converted into values a tim. 5. Transformation generator according to claim 4, characterized in that * indicates that a device for weighting the values a with 2 is provided and that further means are provided which the bits of the values B unchanged, but ; provided with a flag 1, let pass, when they are zero, and the bits of the values B are around Permute d digits with the inversion of the recirculation bit if they are not all zero. B. transformation generator according to one of claims 1 to 5, characterized by the use in the construction of Digital filters. PR 976 OO6 ORIGINAL INSPECTED