DE2717025B2 - Bidirectional input / output buffer for a microcomputer system - Google Patents

Description

The present invention relates to a bidirectional input / output buffer for a microcomputer system for coupling input / output stations to a. Data bus with a controllable driver that runs through Control signals can be switched through and blocked in order to receive data from one of the in the switched-through state Input-output stations to couple incoming data input line to the data bus and in the blocked State to decouple the data bus from the data input line.

It is known to all connected to a data bus To connect input / output stations via a controllable driver (so-called tristate driver).

About one such du / ch-controlled driver each then in each case one input / output station on the data bus connectable. If, with such a realization, input-output operations are program-controlled at all can run, this is only possible under significant hardware restrictions be dictated. These restrictions are major temporal nature, because of the time division multiplex operation Data transports on the data bus only in relative terms

ίο narrow time windows can be made.

A controllable driver of the aforementioned known type is shown in Fig. 1 of the drawing. A Such a driver has two AND elements 1 and 2, each of which has an input via an inverter 3 are connected to each other. Two further inputs of these AND elements 1 and 2 are directly with one another tied together.

The AND element 1 can be controlled with a clock signal at an input 4, while the AND element 2 is on an input 5 is acted upon with data to be transmitted. The outputs of the AND terms are coupled to the gates of two MOS transistors 6 and 7, their source-drain paths in series are switched. At the connection point of the two MOS transistors 6 and 7, an output 8 Removable data signals. The output 8 is coupled to a data bus (not shown). Farther a line 9 leads from output 8, via which data can be output from the data bus.

The mode of operation of such a driver is as follows: The input of signals at input 5 Data is controlled by a clock signal applied to input 4. If the clock signal is at input 4 high, the AND elements 1 and 2 are permeable for data at input 5. Depending on whether the Input 5 is high or low (logical 1 or logical 0), it is either the AND element 2 or the AND element 1 switched through. So that the MOS transistors 6 and 7 are turned on accordingly, so that the Data at input 5 can be entered into the data bus via output 8.

If data is to be output from the data bus via line 9, the clock signal is at the input 4 deep, d. This means that the AND elements 1 and 2 are always blocked, regardless of the signals at input 5, because an input of the AND elements always has a logical 0.

The present invention is now based on the object of providing a buffer of the type described above Kind to develop in such a way that in a microcomputing system homogeneous access to both input and output stations as well as working memory (RAM's) under the control of the application program in the microprocessor the microcomputer system is possible, d. H.

I / O operations should be controllable at the same time with write and read commands for the main memory be.

This object is achieved according to the invention in the case of a bidirectional input-output buffer of the type mentioned at the beginning solved by the following features:

One coupled between the data input line and the data input of the controllable driver Buffer register that can be switched through by a write command and data from the data input line coupled to the controllable driver, one coupled to the control input of the controllable driver Flip-flop, which can be controlled at a first input by the write command, as a function of this

Control switches through the controllable driver and so that the output of the buffer register couples to the data bus and that to a second input a read command can be controlled, blocks the controllable driver as a function of this control and thus the output of the buffer register is decoupled from the data bus and one is coupled to the data bus and read buffer controlled by the read beiehl, the output of which is connected to a data output line via a Input-output station is coupled. ι ο

The input / output buffer according to the invention as defined above advantageously enables the bidirectional input-output operation with three-valued logic under complete control by an application program in a microprocessor of a microcomputer system. The buffer comes with only two Control signals (write and read command) operated so that it can easily be converted into a general working register concept can be embedded. The use of three-valued logic also makes the buffer new common data buses can be used. The control with only two signals (write and read command) is especially advantageous because for a programmer the input / output buffer register with the the same commands are to be used as the working registers.

Refinements of the inventive concept are characterized in the subclaims.

The invention is illustrated below with the aid of one shown in FIG. 2 of the drawing shown exemplary embodiment les explained in more detail. Fig. 2 shows a circuit diagram a bidirectional input-output buffer designed according to the invention.

In the circuit according to FIG. 2 is a controllable driver 25 having a clock input and a G 3ί data input D is provided, which may be formed according to the circuit of Figure I., Said clock input C] the input 4 g of the circuit of F i. 1 and the data input D corresponds to the input 5 of the circuit according to FIG. The output of this controllable driver is coupled to a data bus 20 shown schematically. To indicate that data travel in both directions over the data bus 20, a double arrow is provided in the drawing.

A data input D of a D flip-flop 23 is fed via a data input line 21 with data information from input / output information not shown. The flip-flop 23 is controlled by an input 28 by a write command at a clock input Ci . Such a D flip-flop has the property, in a known manner, of accepting data from a data input when a signal occurs at its clock input, ie the write command from input 28 can be used to transfer data from data input line 21 to data input D of the controllable driver 25 can be coupled.
There is still an RS flip-flop in the Eiri output buffer

24 is provided, which is controlled at a set input S by the write command at input 28 and at a reset input by a read command from an input 29. The write command sets the flip-flop 24 so that a signal controlling the controllable driver 25 arises at an output ζ). In this way, data from the data input line 21 can be coupled to the data bus 20 via the D-riip flop Zi and the controllable driver 25.

To data from the data bus 20 via a Datenausgabeleitun ^ 22 to an input / output station, the data bus 20 is on via a line 27 an input of a read buffer in the form of an AND element 26 is coupled. Another entrance this AND element 26 is controlled by the input 29 by the read command.

When a read command occurs, the flip-flop 24 is activated at its reset input R , so that it toggles and thus its output Q is pulled to a logical zero. That means the controllable driver

25 is blocked. Since also the D-flip-flop 23 in this If no write command is received, the data bus 20 is effectively decoupled from the data input line 21. The AND element 26 switches data from a line 27 to the data output line 22 through.

Since the controllable driver 25 is usually loaded capacitively, a read command is initially still the last written date is read, so that only with a second subsequent read command when the controllable driver is already blocked, a new datum can be read from the data bus 20.

1 sheet of drawings

Claims (4)

Patent claims: 1. Bidirectional input-output buffer for a microcomputer system for coupling input-output stations to a data bus with a controllable driver that can be switched through by control signals and can be blocked in order to receive data from an input / output station in the connected state to couple the incoming data input line to the data bus and in the locked state the To decouple the data bus from the data input line, characterized by an between the data input line (21) and the data input of a controllable driver (25) coupled buffer register (23), which can be switched through by a write command, and data from the data input line (21) couples to the controllable driver (25), one to the control input of the controllable driver (25) coupled to flip-flop (24) which is connected to a first input can be controlled by the write command, as a function of this control the controllable Driver (25) switches through and thus the output of the buffer register (23) to the data bus (20) coupled, and which can be controlled at a second input by a read command, as a function of this Activation blocks the controllable driver (25) and thus the output of the buffer register (23) from Data bus (20) decoupled, and a read buffer (26) coupled to the data bus (20) and controlled by the read command, the output of which is coupled to an input / output state via a data link (22). 2. Bidirectional input buffer according to claim 1, characterized in that the buffer register (23) is designed as a D flip-flop, whose Clock input can be controlled by the write command and its data input on the data input line (21) lies. 3. Bidirectional input-output buffer according to claim I and?, Characterized in that the flip-flop (24) is designed as an RS flip-flop, whose Setzeir.gang (S) is controlled by the write command and its reset input (R) by the read command is. 4. Bidirectional input-output buffer according to one of claims 1 to 3, characterized in that the read buffer (26)? Is AND element is formed which has an input coupled to the data bus (20) is activated at another input by the read command and its output is on the data output line (22) is coupled.