DE2547220A1 - Integrated semiconductor circuit prodn. - deposits semiconductor zones of opposite conductivity in substrate and further zones in first and fourth zones - Google Patents
Integrated semiconductor circuit prodn. - deposits semiconductor zones of opposite conductivity in substrate and further zones in first and fourth zonesInfo
- Publication number
- DE2547220A1 DE2547220A1 DE19752547220 DE2547220A DE2547220A1 DE 2547220 A1 DE2547220 A1 DE 2547220A1 DE 19752547220 DE19752547220 DE 19752547220 DE 2547220 A DE2547220 A DE 2547220A DE 2547220 A1 DE2547220 A1 DE 2547220A1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor
- zone
- conductivity type
- zones
- conductivity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
- H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
- H01L27/0711—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with bipolar transistors and diodes, or capacitors, or resistors
- H01L27/0716—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with bipolar transistors and diodes, or capacitors, or resistors in combination with vertical bipolar transistors and diodes, or capacitors, or resistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
Abstract
Description
Verfahren zum Herstellen einer integrierten Schal-Method for producing an integrated circuit
tungsanordnung" Die integrierte Schaltungstechnik erfolgt heute in Bipolar technik sowie in MOS-Technik. Für manche Anwendungszwecke ist es erforderlich, beide Techniken miteinander zu kombinieren. arrangement "Today, integrated circuit technology takes place in Bipolar technology and MOS technology. For some purposes it is necessary to combine both techniques.
Der Erfindung liegt die Aufgabe zugrunde, ein Verfahren zum Herstellen einer integrierten Schaltungsanordnung anzugeben, bei welchem Bauelemente in MOS-Technik sowie in Bipolartechnik gleichzeitig hergestellt werden. Zur Lösung dieser Aufgabe wird nach der Erfindung vorgeschlagen, daß in einen Halbleiterkörper vom ersten Leitungstyp nebeneinander vier Halbleiterzonen vom zweiten Leitungstyp eingebracht werden und daß in die erste Halbleiterzone vom zweiten Leitungstyp zwei nebeneinander liegende HaLbleiterzonen vom ersten Leitungstyp und in die vierte Halbleiterzone vom zweiten Leitungstyp eine Halbleiterzone vom ersten Leitungstyp eingebracht werden.The invention is based on the object of a method for manufacturing specify an integrated circuit arrangement in which components in MOS technology as well as in bipolar technology can be produced at the same time. To solve this problem is proposed according to the invention that in a semiconductor body from the first Conduction type introduced four semiconductor zones of the second conduction type next to one another and that in the first semiconductor zone of the second conductivity type two side by side lying semiconductor zones of the first conductivity type and in the fourth semiconductor zone of the second conductivity type, a semiconductor zone of the first conductivity type can be introduced.
Die Leitfähigkeit der ersten Halbleiterzone vom zweiten Leitungstyp wird vorzugsweise geringer gewählt als die Leitfähigkeit der anderen drei Halbleiterzonen vom zweiten Leitungstyp. Die Halbleiterzonen vom zweiten Leitungstyp unterscheiden sich dadurch,daß die Leitfähigkeit der ersten Halbleiterzone vom zweiten Leitungstyp geringer ist als die Leitfäniqkeit der anderen drei Helbleiterzonen vom zweiten Leitungstyp. Die erste Halbleiterzone vom zweiten Leitungstyp wird vorzugsweise tiefer in den Halbleiterkörper eingebracht als die anderen drei Halbleiterzonen vom zweiten Leitungstyp.The conductivity of the first semiconductor zone of the second conductivity type will preferably selected to be lower than the conductivity of the other three semiconductor zones of the second type of conduction. Differentiate the semiconductor zones from the second conductivity type characterized in that the conductivity of the first semiconductor zone of the second conductivity type is less than the conductivity of the other three semiconductor zones of the second Line type. The first semiconductor zone of the second conductivity type is preferred introduced deeper into the semiconductor body than the other three semiconductor zones of the second type of conduction.
Gemäß einer Weiterbildung der Erfindung wird in den Halbleiterkörper vom ersten Leitungstyp eine Halbleiterzone vom ersten Leitungstyp eingebracht, die die vierte Halbleiterzone vom zweiten Leitungstyp umgibt und deren Leitfähigkeit größer ist als die des Halbleiterkörpers. Anstelle der die vierte Hölbleiterzone vom zweiten Leitungstyp umgebenden HalbleiteLzona vom ersten Leitungstyp können in den Haibleiterkörper auctl zwei Halbleiterzonen vom ersten Leitungstyp eingebracht werden, die seitlich von der vierten Halbleiterzone vom #weiten Leitungstyp angeordnet sind. Diese Hdibleiterzonen liegen einander vorzugsweise gegenüber.According to a development of the invention, the semiconductor body is used of the first conductivity type introduced a semiconductor zone of the first conductivity type, which surrounds the fourth semiconductor zone of the second conductivity type and its conductivity is larger than that of the semiconductor body. Instead of the fourth semiconductor zone of the second conductivity type surrounding semiconductor zone of the first conductivity type two semiconductor zones of the first conductivity type are introduced into the semiconductor body which are arranged to the side of the fourth semiconductor region of the #wide conductivity type are. These semiconductor zones are preferably opposite one another.
Die Herstellung einer integrierten Schaltungsanordnung nach der Erfindung erfolgt beispielsweise dadurch, daß in den Halbleiterkörper vom ersten Leitungstyp zunächst die erste Hdlbleiterzone vom zweiten Leitungstyp eingebracht wird, daß dann in einem gemeinsamen Verfahrensschritt die weiteren drei Halbleiterzonen vom zweiten Leitungstyp in den Halblei terkörper eingebracht werden, und daß danach in einem gemeinsamen Verfahrensschritt die Halbleiterzonen vom ersten Leitungstyp eingebracht werden. Die in den Halbleiterkörper eingebrachten Halbleiterzonen werden vorzugsweise durch Diffusion oder durch Ionenimplantation hergestellt.The manufacture of an integrated circuit arrangement according to the invention takes place, for example, in that in the semiconductor body from the first conductivity type first introduced the first semiconductor zone of the second conductivity type is that then the other three semiconductor zones in a common process step of the second conductivity type are introduced into the semiconductors, and that afterwards the semiconductor zones of the first conductivity type in a common process step be introduced. The semiconductor zones introduced into the semiconductor body are preferably made by diffusion or by ion implantation.
Die Erfindung findet mit Vorteil bei der Herstellung von zwei zueinander komplementären MOS-Transistoren sowie eines bipolaren Transistors Anwendung. In diesem Fall dienen die zweite und die dritte Halbleiterzone vom zweiten Leitungstyp als Drain- und Source-Zone eines MOS-Transistors, während die in die erste Halbleiterzone vom zweiten Leitungstypein gebrachte bzw. eingelassene Haibleiterzone vom ersten Leitungstyp als Drain- und Source-Zone eines zu dem ersten MOS-Transistor komplementären MOS-Transistors verwendet werden.The invention takes place with advantage in the manufacture of two to each other complementary MOS transistors and a bipolar transistor application. In the second and third semiconductor zones of the second conductivity type are used in this case as the drain and source zone of a MOS transistor, while the one in the first semiconductor zone of the second conductivity type introduced or embedded semiconductor zone of the first Conduction type as drain and source zone of a complementary to the first MOS transistor MOS transistor can be used.
Der bipolare Transistor wird durch den Halbleiterkörper sowie durch die vierte Halbleiterzone vom zweiten Leitungstyp und durch die in diese Zone eingebrachte Halbleiterzone vom ersten Leitungstyp gebildet. Der Halbleiterkörper übernimmt dabei die Funktion der Kollektorzone, die vierte Halbleiterzone vom zweiten Leitungstyp die Funktion der Basiszone und die in die Busiszone eingebrachte Halblelterzone vom ersten Leitungstyp die Funktion der Emitterzone des bipolaren Transistors. Halbleiterzonen vom ersten Leitungstyp, die die vierte Halbleiter zone umgeben oder seitlich von ihr angeordnet sind, dienen als Anschlußzonen für die Kontaktierung der Kollektorzone des bipolaren Transistors. Die in den Halbleiterkörper eingebrachten Halbleiterzonen werden natürlich noch kontaktiert, indem sie mit Elektroden versehen werden.The bipolar transistor is made by the semiconductor body as well the fourth semiconductor zone of the second conductivity type and through the one introduced into this zone Formed semiconductor zone of the first conductivity type. The semiconductor body takes over the function of the collector zone, the fourth semiconductor zone of the second conductivity type the function of the base zone and the brought into the business zone Half-parent zone of the first conductivity type the function of the emitter zone of the bipolar Transistor. Semiconductor zones of the first conductivity type, the fourth semiconductor zone are surrounded or arranged to the side of it, serve as connection zones for the Contacting the collector zone of the bipolar transistor. The ones in the semiconductor body Introduced semiconductor zones are of course still contacted by using electrodes be provided.
Außerdem sind zwischen den Drain- und Source-Zonen der MOS-Transistoren noch isolierte Steuerelektroden erforderlich, wobei die Isolierschicht für die Steuerelektrode natürlich auch aus einem anderen Isoliermaterial wie Siliziumdioxyd, also beispielsweise auch aus Siliziumnitrid bestehen kann.In addition, there are between the drain and source zones of the MOS transistors Insulated control electrodes are still required, with the insulating layer for the control electrode Of course, made of another insulating material such as silicon dioxide, for example can also consist of silicon nitride.
Die Erfindung wird im folgenden an-einem Ausführungsbeispiel näher erläutert.The invention is explained in more detail below using an exemplary embodiment explained.
Zur gleitllzeitigen Herstellung eines npn-Transistors und zweite zueinander komplementärer MOS-Transistoren geht man gemäß der Figur 1 von einem Halbleiterkörper 1 vom n-Leitungstyp aus, in dessen eine Oberflächenseite eine erste Halbleiterzone 2 vom p-Leitungstyp eindiffundiert wird. Danach werden in den Halbleiterkörper gemäß der Figur 2 noch eine weite, dritte und vierte Halbleiterzone vom zweiten Leitungstyp eindffundiert, die mit den Bezugsziffern 3, 4 und 5 beelühnet sind. Die Leitfähigkeit der zweiten, dritten und vierten Halbleiterzone vom zweiten Leitungstyp (3,4,5) ist größer als die Leitfähigkeit der ersten Halbleiterzone 2 tom zweiten Leitungstyp.For the simultaneous manufacture of an npn transistor and a second to each other Complementary MOS transistors, according to FIG. 1, are based on a semiconductor body 1 of the n-conductivity type, in one surface side of which a first semiconductor zone 2 of the p-conductivity type is diffused. Thereafter, in the semiconductor body according to FIG. 2 also shows a wide, third and fourth semiconductor zone of the second conductivity type which are denoted by the reference numerals 3, 4 and 5. The conductivity the second, third and fourth semiconductor zone of the second conductivity type (3,4,5) is greater than the conductivity of the first semiconductor zone 2 to the second Line type.
Nach der Eindiffusion der vierten Halbleiterzone vom p-Leitungstyp werden gemäß der Figur 3 in den Halbleiterkörper Halbleiterzonen vom n-Leitungstyp eindiffundiert, deren Tiefe geringer ist als die Tiefe der drei zuvor eindiffundierten p-Zonen (3,4,5). Bei der n-Diffusion werden die beiden Halbleiterzonen 6 und 7 in die erste Halbleiterzone 2 vom p-Leitungstyp eindiffundiert, während in die vierte Halbleiterzone 5 vom p-Leitungstyp nur eine Halbleiterzone 8 vom n-Leitungstyp eindiffundiert wird. Bei der n-Diffusion wird gegebenenfalls gleichzeitig eine Ringzone 9 hergestellt, die die vierte Halbleiterzone 5 vom p-Leitungstyp umgibt wer anstelle dieser Ringzone zwei Halbleiterzonen 9, die seitlich von der vierten Halbleiterzone 5 vom p-Leitungstyp angeordnet sind.After the diffusion of the fourth semiconductor zone of the p-conductivity type According to FIG. 3, semiconductor zones of the n-conductivity type are in the semiconductor body diffused in, the depth of which is less than the depth of the three previously diffused p-zones (3,4,5). In the case of n-diffusion, the two semiconductor zones 6 and 7 are in the first semiconductor zone 2 diffused from the p-conductivity type, while in the fourth Semiconductor zone 5 of the p-conductivity type only a semiconductor zone 8 of the n-conductivity type diffused will. In the case of n-diffusion, a ring zone 9 is optionally produced at the same time, which surrounds the fourth semiconductor zone 5 of the p-conductivity type who instead of this ring zone two semiconductor zones 9, the side of the fourth semiconductor zone 5 of the p-conductivity type are arranged.
Der eine MOS-Transistor wird durch die beiden n-Zonen 6 und 7 als Drain- und Source-Zone sowie durch eine isolierte Steuer elektrode gebildet, während der dazu komplementäre MOS-Transistor aus den beiden p-Zonen 3 und 4 als Drain- und Source-Zone sowie durch eine zwischen diesen beiden Zonen liegende, ebenfalls nicht eingezeichnete isolierte Steuerelektrode gebildet wird. Die beiden MOS-Transistoren sind voneinander durch die p-Zone 2 isoliert. Der bipolare Transistor wird durch die n-Zone 8 als Emitterzone, durch die p-Zone 5 als Basiszone sowie durch den Halbleiterkörper 1 als Kollektorzone gebildet.The one MOS transistor is through the two n-zones 6 and 7 as Drain and source zone and formed by an isolated control electrode while the complementary MOS transistor from the two p-zones 3 and 4 as drain and source zone as well as by a between these two zones, Likewise not drawn isolated control electrode is formed. The two MOS transistors are isolated from each other by the p-zone 2. The bipolar transistor is through the n-zone 8 as the emitter zone, through the p-zone 5 as the base zone and through the semiconductor body 1 formed as a collector zone.
L e e r s e i t eL e r s e i t e
Claims (9)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19752547220 DE2547220A1 (en) | 1975-10-22 | 1975-10-22 | Integrated semiconductor circuit prodn. - deposits semiconductor zones of opposite conductivity in substrate and further zones in first and fourth zones |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19752547220 DE2547220A1 (en) | 1975-10-22 | 1975-10-22 | Integrated semiconductor circuit prodn. - deposits semiconductor zones of opposite conductivity in substrate and further zones in first and fourth zones |
Publications (1)
Publication Number | Publication Date |
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DE2547220A1 true DE2547220A1 (en) | 1977-05-05 |
Family
ID=5959748
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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DE19752547220 Ceased DE2547220A1 (en) | 1975-10-22 | 1975-10-22 | Integrated semiconductor circuit prodn. - deposits semiconductor zones of opposite conductivity in substrate and further zones in first and fourth zones |
Country Status (1)
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DE (1) | DE2547220A1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3005384A1 (en) * | 1979-02-15 | 1980-08-28 | Texas Instruments Inc | Monolithic integrated semiconductor unit - is made by forming conductive and insulating zones with boron ion implantation for depletion channels (NL 19.8.80) |
EP0173386A1 (en) * | 1984-08-22 | 1986-03-05 | Koninklijke Philips Electronics N.V. | CMOS RAM with merged bipolar transistor |
EP0236967A1 (en) * | 1986-03-11 | 1987-09-16 | Siemens Aktiengesellschaft | Circuit arrangement for controlling a MOSFET with a load connected to its source |
-
1975
- 1975-10-22 DE DE19752547220 patent/DE2547220A1/en not_active Ceased
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3005384A1 (en) * | 1979-02-15 | 1980-08-28 | Texas Instruments Inc | Monolithic integrated semiconductor unit - is made by forming conductive and insulating zones with boron ion implantation for depletion channels (NL 19.8.80) |
EP0173386A1 (en) * | 1984-08-22 | 1986-03-05 | Koninklijke Philips Electronics N.V. | CMOS RAM with merged bipolar transistor |
EP0236967A1 (en) * | 1986-03-11 | 1987-09-16 | Siemens Aktiengesellschaft | Circuit arrangement for controlling a MOSFET with a load connected to its source |
US4737667A (en) * | 1986-03-11 | 1988-04-12 | Siemens Aktiengesellschaft | Driving circuitry for a MOSFET having a source load |
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OF | Willingness to grant licences before publication of examined application | ||
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Owner name: TELEFUNKEN ELECTRONIC GMBH, 7100 HEILBRONN, DE |
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8131 | Rejection |