DE2543570C3 - Circuit arrangement for modulating a semiconductor injection laser - Google Patents

Description

The present invention relates to circuit arrangements for modulating a semiconductor injection laser, the corresponding current pulses can be controlled with a binary coded message and the lies in the collector circuit of a transistor, in whose base circuit a modulation signal source and in whose Emitter circuit a first resistor is arranged

It is known that semiconductor injection lasers can be modulated particularly easily using the operating current. So can be a semiconductor injection laser according to a signal sequence that is to be transmitted and is present in binary coded form can be controlled with appropriately coded current pulses that if present a current pulse exceeding the threshold value at the input of the semiconductor injection laser on The output of the injection laser emits an optical signal, while in the absence of it a control current pulse at the output of the laser no radiation is emitted.

In the case of the digital modulation of an injection laser with the aid of coded current pulses, however, observed that the optical output pulses have different amplitudes depending on the data flow exhibit. After a »0« (= no current pulse at the laser input) there is a »1« output signal smaller than if a current pulse was applied to the laser input immediately beforehand "1" was modulated.

This effect, which is referred to as the "pattern effect", occurs primarily with the Modulation of a semiconductor laser without bias current in appearance. By a forward current in the direction of flow of the Semiconductor laser diode, which excites the laser to just below the laser threshold, could contribute to the pattern effect the modulation of a semiconductor laser can be reduced. The operation of a semiconductor laser with a However, such a bias current is not desirable in the interests of a long service life.

The optical output signals of different amplitudes that occur as a result of the "pattern effect" prove to be particularly disadvantageous when such a semiconductor injection laser is used as a light transmitter in an optical communication system is to be used in which as constant as possible permanent level ratios are required.

To avoid the negative consequences of the "pattern effect" when modulating a semiconductor injection laser Complex circuit arrangements have already been proposed (DE-OS 23 56 096 and DE-OS 24 14 850).

According to the proposal contained in DE-OS 23 56 096, the modulation signal source is a Discriminator device connected downstream and is un-

using the output signal of this discriminator device with a pulse waveform modulation device the width and / or amplitude of the modulation pulse changed In the DE-OS 2414 850 is suggested depending on the Sequence of Modulatiqnsimpulsen to generate a combination pulse and the semiconductor laser to apply a combination pulse superimposed on the modulation pulse.

The invention is based on the object of specifying circuit arrangements of the type mentioned above, which allow the adverse consequences of the "pattern effect" with significantly less effort and therefore cheaper to avoid.

According to the invention, this object is achieved in that an AC combination is provided in the emitter circuit of the transistor is provided, which consists of a series connection of the first resistor and a second resistor, which has a parallel capacity, where the time constant resulting from the product of the first resistance and the capacitance is smaller is chosen as the time constant resulting from the product of the second resistance and the capacitance.

This object is also achieved according to the invention in that the modulation signal source is connected to the base of the first transistor and a second transistor, that a second resistor in the emitter circuit of the second transistor and a C combination connected to this resistor is provided in the emitter circuit of the first transistor , which consists of a series connection of the first resistor and a third resistor to which a first capacitance is connected in parallel, and wherein the time constant resulting from the product of the first resistance and the first capacitance is selected to be smaller than that Time constant resulting from the product of the third resistance and the first capacitance, that between the second resistor located in the emitter circuit of the second transistor and the ÄC combination, a tap is provided which is connected to the base circuit of a third transistor, that in the base circuit of the third transistor one memory switching diode is provided, which is polarized such that it is charged with a negative input voltage via the second transistor and is discharged with a positive input pulse via the RC combination and the first transistor and that the memory switching diode is connected in parallel with a second capacitance that has a short circuit for the positive «pulse that is generated when the memory switching diode is switched to the blocking state by the inductance in connection with the junction capacitance in the memory switching diode.

The invention achieves that a logical "one" following a logical "zero" corresponding current pulse at the input of the semiconductor injection laser to an equally large optical The signal at the output of the semiconductor injection laser leads as if it corresponds to a logical "one" - t> o The current pulse on a preceding current pulse corresponding to a further logical "one" follows.

Embodiment A of the invention will be described below with reference to FIG. 1 to 4 explained in more detail.

In the circuit nai-h Fig. 1, a semiconductor injection laser 1 is of current pulses of a modulating signal source 2 is driven in the collector circuit of a transistor T in the emitter circuit of the transistor Γ a consisting of Ru Ri and C AEC combination is arranged C discharged, rises in a current pulse corresponding to a logical "1" generates the voltage u \ with the time constant

T ₁ =

R ₁ R ₂ R ₁ + R

exponentially up to the end of the pulse; thereafter, C becomes> T ₁ via R ₂ with the time constant T ₂

= CR ₂

discharged only slightly, so that C is further charged by an immediately following pulse than the previous one, until a state of equilibrium is finally established

The following applies approximately to the modulation current flowing through the semiconductor injection laser 1

ujt) -0.7V -

In Fig.2a the time course of the Modulation signal source 2 output signal sequence shown, which is to be transmitted in accordance with a Message is binary coded

Fi g. FIG. 2b shows the voltage curve u \ (t) resulting across the capacitance C or the resistor R2 , while FIG. 2c shows the time curve of the modulation current / ft) flowing through the semiconductor injection laser 1

From Fig. 2c it can be seen that the modulation current is greater with a preceding "0" than with a preceding "1". If one or more zeros follow after a few ones, the capacitor voltage u \ (t) drops further, and the next "1" supplies a larger current pulse. With such a pre-equalization of the modulation current it is achieved that a "1" after a "0" leads to an optical output signal which is just as large as if a "1" had already been modulated before.

In a further exemplary embodiment of a circuit arrangement (FIG. 3), a storage switching diode D is charged with the current / via an inductance L in the pulse pauses. The C combination A ₁ , R ₂ and C supplies with the transistor Γ of the data flow dependent current pulses for discharging the memory switching diode. As soon as the storage switching diode switches to the blocking state, the inductance L with the junction capacitance of D generates a short negative pulse with an amplitude that is proportional to the discharge current. The capacitor C should form a short circuit for this pulse. The injection laser 1 is modulated with the pre-equalized pulses via a further series resistor Rz. This circuit arrangement offers the advantage that the memory switching diode D can generate considerably shorter pulses than the switching times of the transistor T allow. The semiconductor injection laser 1 can be controlled more effectively with their shorter pulses.

In a further exemplary embodiment of a circuit arrangement (FIG. 4), a memory switching diode D is charged via a further transistor Ti when the input voltage is negative and discharged via the previously described AC circuit and transistor T _{1 when there is a positive input pulse.}

The memory switching diode D is polarized in such a way that positive voltage pulses arise when the discharge current is torn off. These are converted into current pulses by buckets of transistor T ₃ and fed to the injection laser. The shape of the modulation pulses is retained by the pulse shaping with a memory switching diode. The pulse amplitude of the modulation pulses, however, becomes so depending on the bit pattern controlled so that the optical output pulses de injection laser have constant amplitude.

By using a further transistor 7 instead of the current source / from FIG. 3, the power consumption of the circuit arrangement is reduced, since the charging current for charging the memory switching diode D, in contrast to the circuit arrangement of FIG. 3 only flows during the charging process.

For this purpose 2 sheets of drawings

Claims (3)

Patent claims: 1. Circuit arrangement for modulating a semiconductor injection laser which can be controlled with a binary coded message corresponding current pulses and which is in the collector circuit of a transistor, in the base circuit of which a modulation signal source and in the emitter circuit of which a first resistor is arranged, characterized in that in the .Emitterkreis of the transistor (T) an ÄC combination is provided, which consists of a series connection of the first resistor (Ri) and a second resistor (R ₂ ) to which a capacitance (C) is connected in parallel, the product being the product of the The time constant resulting from the first resistance (R \) and the capacitance (C) is selected to be smaller than the time constant resulting from the product of the second resistance (A ₂ ) and the capacitance (C) (Fig. 1, Fig. 3). 2. Circuit arrangement according to claim 1, characterized in that a series circuit of a series resistor (R3) and the semiconductor injection laser (1) is provided in the collector circuit of the transistor (T) , that this series circuit is connected in parallel with a memory switching diode (D) which is polarized such that it is charged in the modulation pauses via an inductance (L) by a DC voltage source (I) and is discharged during the modulation pulses by the collector current of the transistor (T) via the inductance (L) , and that the memory switching diode (D ) a capacitance (C) is connected in parallel, which forms a short circuit for the negative pulse that is generated when the memory switching diode (D) is switched to the blocking state by the inductance (L) in connection with the junction capacitance of the memory switching diode (Ey (F i g. 3). 3. Circuit arrangement for modulating a semiconductor injection laser, which can be controlled with a binary coded message corresponding current pulses and which is in the collector circuit of a first transistor, in whose base circuit a modulation signal source and in whose emitter circuit a first resistor is arranged, characterized in that the modulation signal source (2) is connected to the base of the first transistor (Ti) and a second transistor (Ti) that a second resistor (R ₆ ) located in the emitter circuit of the second transistor (T ₂ ) and one connected to this resistor (R ₆ ) ÄC combination is provided in the emitter circuit of the first transistor (71), which consists of a series connection of the first resistor (Äi) and a third resistor (R ₂ ), to which a first capacitance fQ is connected in parallel, and which consists of the product of the first resistor (R]) and the first capacitance (C) is selected to be smaller, al s is the time constant resulting from the product of the third resistor (A ₂ ) and the first capacitance (C) that a tap is provided between the second resistor (R ₆ ) in the emitter circuit of the second transistor (T _{2) and the ÄC combination} is, which is connected to the base circuit of a «third transistor (7a) that in the base circuit of the third transistor (T ₃ ) a memory switching diode (D) is provided, which is polarized in such a way that it is over the second transistor (T ₂ ) is charged and with a positive input pulse on the ÄC combination and the first transistor (Γι) is discharged and that the memory switching diode (D) a second capacitance (C) is connected in parallel, which forms a short circuit for the positive pulse, the when the memory switching diode (D) is switched to the blocking state by the inductance (L) in connection with the junction capacitance in the memory switching diode (D) . (Fig. 4)