DE2445250A1 - PLASTIC-PACKED SEMI-CONDUCTOR COMPONENTS WITH HIGH RELIABILITY - Google Patents

PLASTIC-PACKED SEMI-CONDUCTOR COMPONENTS WITH HIGH RELIABILITY

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Publication number
DE2445250A1
DE2445250A1 DE19742445250 DE2445250A DE2445250A1 DE 2445250 A1 DE2445250 A1 DE 2445250A1 DE 19742445250 DE19742445250 DE 19742445250 DE 2445250 A DE2445250 A DE 2445250A DE 2445250 A1 DE2445250 A1 DE 2445250A1
Authority
DE
Germany
Prior art keywords
layer
silicon dioxide
silicon
chip
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19742445250
Other languages
German (de)
Inventor
Heshmat Khajezadeh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Publication of DE2445250A1 publication Critical patent/DE2445250A1/en
Pending legal-status Critical Current

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    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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Description

Dipl.-lng. H. Sauerland ■ Dr.-ing. R. König · Dipl.-lng. K. Bergen Patentanwälte · 4000 ncss-aldonf so · Cecilienallee 76 ■ Telefon 43273aDipl.-Ing. H. Sauerland ■ Dr.-ing. R. König · Dipl.-Ing. K. Bergen Patent Attorneys · 4000 ncss-aldonf so · Cecilienallee 76 ■ Telephone 43273a

20. September 1974 29 567 BSeptember 20, 1974 29 567 B

RCA Corporation, 30 Rockefeiler Plaza, New York, N.Y. 10020 (V.St.A.)RCA Corporation, 30 Rockefeiler Plaza, New York, NY 10020 (V.St.A.)

"Kunststoffverpackte Halbleiterbauteile hoher Zuverlässigkeit" " Plastic-packaged semiconductor components with high reliability"

Die Erfindung bezieht sich auf Halbleiterbauteile, die in einer Kunststofform verkapselt sind.The invention relates to semiconductor components encapsulated in a plastic mold.

Kunststoffverpackungen werden für Halbleiterbauteile bevorzugt, da sie preiswert sowie einfach und praktisch zu handhaben sind. Die sogenannte "Doppelreihen"-(dual in-linie)-Kunststoffverpackungen wird gewöhnlich bei integrierten Schaltungsbauteilen verwendet. Diese Verpackung besteht aus einem prismatischen Kunststoffkörper mit Leitungen, die aus zwei Längsseiten des Körpers heraustreten und derart umgebogen sind, daß sie in zwei oder mehreren parallelen Reihen verlaufen. Innerhalb des Kunststoffkörpers ist ein Halbleiterchip mit den Leitungen verbunden, gewöhnlich mittels Drähten, obgleich andere Verbindungsleiter ebenfalls angewendet werden können. Diese Verpackungsart hat sich in großem Umfang durchgesetzt, insbesondere wegen ihrer niedrigen Kosten und der leichten Anpassung an automatisierte Herstellungssysteme . Plastic packaging is preferred for semiconductor components because it is inexpensive as well as simple and practical too are handled. The so-called "double row" (dual in-line) plastic packaging is usually used for integrated circuit components used. This packaging consists of a prismatic plastic body with lines that emerge from two long sides of the body and are bent over so that they are in two or several parallel rows. Within the Plastic body, a semiconductor chip is connected to the leads, usually by means of wires, although others Connection conductors can also be used. This type of packaging has grown on a large scale prevailed, particularly because of their low cost and ease of adaptation to automated manufacturing systems.

Kunststoffverpackte Bauteile haben jedoch bisher unterHowever, plastic-packaged components have so far been under

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schlechten Umgebungsfoedingungen, beispielsweise unter hoher Luftfeuchtigkeit, hoher Temperatur, korrosiven Säuredämpfen od.dgl, keine Anwendung finden können. Das Kunststoffmaterial der Verkapselung schützt das Halbleiterchip nicht gegen die Einwirkungen von Schadstoffen, so daß diese in di© Verkapselung eindringen und mit dem Halbleiterchip selbst chemisch reagieren können, was zu dessen Verschlechterung oder gar Zerstörung führt.bad ambient conditions, for example under high humidity, high temperature, corrosive Acid vapors or the like cannot be used. The plastic material of the encapsulation protects the semiconductor chip not against the effects of pollutants, so that they penetrate into the encapsulation and with the semiconductor chip itself can react chemically, which leads to its deterioration or even destruction.

Es sind bereits viele Vorschläge zum Schütze von Halbleiterchips gegen schädliche Umweltbedingungen gemacht worden. So sind beispielsweise die elektrische Verbindungen schaffenden Metallisierungssysteme aus Edelmetallen hergestellt worden, um sie gegenüber Oxydation und Korrosion widerstandfähig zu machen» Gewöhnlich sind die aus Edelmetallen hergestellten Metallisierungssysteme Mehrschichtsysteme, da keines der Edelmetalle sämtliche für gute Halbleiteraetallisierung erforderlichen Eigenschaften besitzt, wie leichter Ohm'scher Kontakt mit Silizium, Haftbarkeit an Siliziumdioxid usw. Es ist auch bekannt, Verbindungsleitungen aus Edelmetall mit Schutzschichten zu überziehen.There are already many proposals for protecting semiconductor chips against harmful environmental conditions. So are the electrical connections, for example creating metallization systems made from precious metals to protect them against oxidation and Making corrosion resistant »Metallization systems made from precious metals are common Multi-layer systems, as none of the precious metals have all the properties required for good semiconductor metallization possesses how light ohmic contact with silicon, adhesiveness to silicon dioxide, etc. it is also known to cover connecting lines made of noble metal with protective layers.

Eines der mit der Verwendung von Gold bei der Herstellung von Verbindungsleitungen verbundene Problem besteht darin, daß Goldatome in Gegenwart von Wasserdampf, Hitze und/oder Arbeitsspannungen vom Leiter wegwandern und die zwischen Leitungen bestehenden Abstände überbrücken, was zu nicht vertretbaren Schaltungsbedingungen führt. Bisher ist es nicht gelungen, diese Probleme zu ergründen oder gar eine Lösung dafür aufzuzeigen. Mit der vorliegenden Erfindung wird diese Aufgabe gelöst, indem bei einem Halbleiterbauteil gemäß dem Oberbegriff des Hauptanspruchs die Verbindungsleiter mit einer Schutzschicht aus mittels Pyrolyse niedergeschlagenem Siliziumdioxid einer DickeOne of the problems associated with using gold in making interconnection lines is that gold atoms migrate away from the conductor in the presence of water vapor, heat and / or working voltages and those between Lines bridge existing distances, which leads to unacceptable circuit conditions. So far it is failed to fathom these problems or even to suggest a solution to them. With the present invention This object is achieved by a semiconductor component according to the preamble of the main claim the connecting conductors with a protective layer of silicon dioxide deposited by means of pyrolysis of a thickness

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von mindestens 10.000 Ä versehen sind.of at least 10,000 Ä are provided.

Anhand der Zeichnungen, in denen ein bevorzugtes Ausführungsbeispiel dargestellt ist, wird die Erfindung näher erläutert. Es zeigen:Based on the drawings, in which a preferred embodiment is shown, the invention is explained in more detail. Show it:

Fig. 1 ein Halbleiterbauteil mit Doppelreihen-Kunststoffverpackung, in perspektivischer Darstellung, teilweise gebrochen; 1 shows a semiconductor component with double-row plastic packaging, in a perspective illustration, partially broken;

Fig. 2 ein für die Verpackung gemäß Fig. 1 geeignetes Halbleiterchip mit Verbindungs- und Leitungsteilen, in teilweiser Draufsicht; FIG. 2 shows a semiconductor chip suitable for the packaging according to FIG. 1 with connection and line parts, in partial plan view; FIG.

Fig. 3 einen Querschnitt entlang der Linie 3-3 in Fig. 2; und Figure 3 is a cross-sectional view taken along line 3-3 in Figure 2; and

Fig. 4 einen Teil des Querschnitts gemäß Fig. 3, in vergrößerter Darstellung. 4 shows a part of the cross section according to FIG. 3, in an enlarged illustration.

In seiner bevorzugten Ausführungsform ist ein für die Erfindung geeignetes, in Fig. 1 insgesamt mit 10 bezeichnetes Bauteil als integrierte·Schaltung dargestellt und besitzt einen Körper 11 aus polymerem Material, der die Form eines länglichen, rechtwinkligen Quaders aufweist. Der Körper 11 besitzt zwei relativ lange Seiten 12 und 14, während die Stirnseiten 16 und 18 relativ kurz sind. Zentral im Körper 11 ist ein metallisches Stützplättchen 22 vorgesehen, auf dem ein integriertes Schaltungschip 24 zentrisch befestigt ist. Einzelheiten des Aufbaus des Chips 24 werden unten erläutert.In its preferred embodiment, a suitable for the invention, designated as a whole by 10 in FIG. 1 Component shown as an integrated circuit and has a body 11 made of polymer material, the has the shape of an elongated, rectangular parallelepiped. The body 11 has two relatively long sides 12 and 14, while the end faces 16 and 18 are relatively short. Central in the body 11 is a metallic one Support plate 22 is provided on which an integrated circuit chip 24 is attached centrally. details the structure of the chip 24 will be explained below.

Mehrere elektrische Leitungen 26 sind im Kunststoffmaterial des Körpers 11 eingebettet und erstrecken sfch aus dem Inneren des Körpers 11, jeweils von einer nahe dem Stützplättchen gelegenen Stelle, durch die Längsseiten 12 und 14 des Körpers 11 nach außen. Die Leitungen 26 sind in bekannter Weise zur Bildung der sogenanntenSeveral electrical leads 26 are in the plastic material of the body 11 and extend sfch from the interior of the body 11, each from one near the support plate located point, through the longitudinal sides 12 and 14 of the body 11 to the outside. The lines 26 are in a known manner to form the so-called

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Doppelreihe gebogen. Zwischen den Leitungen 26 und den aktiven Elementen auf dem Chip 24 sind elektrische Verbindungen vorgesehen, beispielsweise mit Hilfe feiner Drähte 28, deren Enden z.B. mit Hilfe von Ultraschall mit den Leitungen 26 und dem Chip 24 verbunden sind.Curved double row. Electrical connections are made between lines 26 and the active elements on chip 24 provided, for example with the aid of fine wires 28, the ends of which, for example, with the aid of ultrasound are connected to lines 26 and chip 24.

Eine Ecke des StUtzplättchens 22 und des Chips 24 ist in Fig. 2 in vergrößerte» Maßstab dargestellt und wird im Schnitt aus Fig. 3 deutlich. Daraus ergibt sich, daß das Chip 24 einen Siliziumkörper 29 (Fig. 3) aufweist, der mit mehreren Verbindungsleitern 30 versehen ist, von denen einige in Anschlußfahnen 32 enden, die nahe der Außenkante des Körpers 29 angeordnet sind. Das Muster der Verbindungen 30 hängt von dem auf dem Chip 24 verwendeten Schaltkreis ab und ist für die vorliegende Erfindung nicht kritisch. Die Verbindungsdrähte 28 sind als die Anschlußfahnen 32 mit den Leitungen 26 verbindend dargestellt. Diese Anordnung ist grundsätzlich bekannt.A corner of the support plate 22 and the chip 24 is shown in Fig. 2 on an enlarged scale and is in the section from Fig. 3 clearly. It follows that the chip 24 has a silicon body 29 (Fig. 3), which is provided with a plurality of connecting conductors 30, some of which end in terminal lugs 32, the are arranged near the outer edge of the body 29. The pattern of connections 30 depends on that on the chip 24 and is not critical to the present invention. The connecting wires 28 are shown as connecting lugs 32 to lines 26. This arrangement is fundamental known.

Die Leiter 30 sind in Fig. 2 als durch eine Passivierungsschicht 34 (Fig. 3 und 4) sichtbar gezeigt. Wie am besten aus Fig. 3 hervorgeht, weist der Körper 29 verschiedene N- und P-leitende Bereiche auf, durch die PN-Übergänge gebildet werden, die an einer Oberfläche 36 des Körpers 29 enden. Auf der Oberfläche 36 des Körpers 29 befindet sich das Passivierungs- und verbindende Metallisierungssystem, das das Chip schützt und die verschiedenen Bereiche zu einem gewünschten Schaltkreis miteinander verbindet. Zunächst ist eine vorzugsweise aus Siliziumdioxid bestehende Schicht 38 vorhanden, die thermisch durch Erhitzen des Körpers 29 in einer oxydierenden Atmosphäre in bekannter Weise hergestellt werden kann. Auf der Siliziumdioxidschicht 38 befindet sich eine zweite Schicht 40 aus Siliziumnitrid. Die Schicht 40 kann durchThe conductors 30 are shown in FIG. 2 as being visible through a passivation layer 34 (FIGS. 3 and 4). How best As can be seen from Fig. 3, the body 29 has different N- and P-conductive areas through the PN junctions which end at a surface 36 of the body 29. On the surface 36 of the body 29 is the passivation and connecting metallization system, that protects the chip and the various areas to form a desired circuit together connects. First, there is a layer 38, preferably consisting of silicon dioxide, which is thermally by heating the body 29 in an oxidizing atmosphere in a known manner. A second layer 40 made of silicon nitride is located on the silicon dioxide layer 38. The layer 40 can through

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2U52502U5250

ebenfalls bekannte Pyrolyse von Silan (SiH^) und Ammoniak aufgebracht werden. Die Schichten 38 und 40 werden mit Öffnungen 42 versehen, um die Teile der Oberfläche des Körpers 29 freizulegen, an denen Kontakt zum Halbleitermaterial erforderlich ist.also known pyrolysis of silane (SiH ^) and ammonia be applied. The layers 38 and 40 are provided with openings 42 to the portions of the surface of the body 29 to expose where contact with the semiconductor material is required.

Die Leiter 30 sind in der für die Herstellung von Streifenleitern ("beam lead" conductors) bekannten Weise hergestellt. Sie bestehen aus einer ersten Schicht 44 aus Titan, einer zweiten Schicht 46 aus Platin oder Palladium und einer dritten Schicht 48 aus Gold, wobei diese Schichten hierbei die gleiche Bedeutung besitzen wie bei konventionellen Streifen- bzw. Stützleitersystemen. Es sei jedoch darauf hingewiesen, daß sie hier nicht in der freitragenden Version verwendet werden, sondern statt dessen nahe der Außenkante des Chips in den Anschlußfahnen 32 enden. Damit kann der vorliegende Aufbau in einfacher Weise mit Hilfe konventioneller Herstellungsmethoden ohne Modifikation irgend einer der Fotomasken, die für die Herstellung verwendet werden, aufgebaut werden; d.h. dieselben Fotomasken können sowohl für die konventionellen Aluminium-metallisierten Produkte als auch für die hochzuverlässigen Produkte gemäß der Erfindung eingesetzt werden.The conductors 30 are manufactured in the manner known for the manufacture of strip conductors ("beam lead" conductors). They consist of a first layer 44 made of titanium and a second layer 46 made of platinum or palladium and a third layer 48 of gold, these layers having the same meaning as with conventional strip or support ladder systems. It should be noted, however, that they are not used here in the self-supporting version, but instead, terminate in terminal lugs 32 near the outer edge of the chip. Thus, the present structure in a simple manner using conventional manufacturing methods without modification of any of the photomasks used for manufacture will; i.e. the same photomasks can be used for conventional aluminum-metallized products as well as for the highly reliable products according to the invention.

Die Schutzschicht 34 über den Leitern 30 (und der oberen Oberfläche des Chips 24) hat die folgenden Eigenschaften. Sie besteht aus einer ersten Schicht 50, vorzugsweise aus Siliziumdioxid, die durch Pyrolyse von Silan (SiH^) in Gegenwart von Sauerstoff in grundsätzlich bekannter Weise hergestellt werden kann. Die Schicht 50 wird mit Phosphor dotiert, vorzugsweise durch Beigabe von Phosphin (PH,) zur Pyrolyse-Atmosphäre, wodurch, wie gemäß US-Patent 3.465 209, gewisse Verunreinigungen von der darunter liegenden Oberfläche des Körpers 29 entfernt zu.The protective layer 34 over the conductors 30 (and the top surface of the chip 24) has the following properties. It consists of a first layer 50, preferably made of silicon dioxide, which is obtained by pyrolysis of silane (SiH ^) can be prepared in the presence of oxygen in a manner known in principle. The layer 50 is with Phosphorus doped, preferably by adding phosphine (PH,) to the pyrolysis atmosphere, as a result of which, as in accordance with the US patent 3.465 209, removes certain impurities from the underlying surface of the body 29 too.

509814/0852509814/0852

werden scheinen. Schließlich gehört zur Schicht 34 eine obere Schicht 52, die aus undotiertem Siliziumdioxid besteht, das vorzugsweise aus Silan mit Sauerstoff hergestellt wird und den Schutz gegen Eintritt von Wasserdampf unterstützt.will seem. Finally, the layer 34 includes an upper layer 52, which consists of undoped silicon dioxide, which is preferably made from silane with oxygen and supports the protection against ingress of water vapor.

Wie bereits erwähnt, besteht eines der mit der Verwendung von Gold als Verbindungen in Halbleiterbauteilen verbundenes Problem darin, "daß das Gold über die zwischen den Leitern vorgesehenen Abstände wandert, so daß Kurzschlüsse entstehen. Es hat sich jedoch überraschenderweise herausgestellt, daß eine relativ dicke Schutzschicht die mit dem Wandern von Goldatomen verbundenen Probleme löstj d.h. mit einem relativ dicken Überzug bleiben derartige Bauteile für sehr lange Zeit einsatzfähig. Die Gesamtdicke der Schichten 50 und 52 sollte vorzugsweise mindestens 10.000 & betragen. Bei einem bevorzugten Ausführungsbeispiel der vorliegenden Erfindung ist die Schicht 34 15.000 Ä dick, wobei die Phosphor dotierte Schicht 50 eine Dicke von 14.000 Ä aufweist, während die undotierte Schicht 52 1.000 Ä dick ist.As mentioned earlier, one of the most common uses of gold is as a compound in semiconductor devices related problem is that "the gold over the between the conductors provided distances moves, so that short circuits occur. However, it has surprisingly been found found that a relatively thick protective layer is associated with the migration of gold atoms Problems are solved, i.e. with a relatively thick coating such components remain operational for a very long time. The total thickness of layers 50 and 52 should be preferably at least 10,000 &. In a preferred embodiment of the present invention the layer 34 is 15,000 Å thick, the phosphorus-doped layer 50 having a thickness of 14,000 Å, while the undoped layer 52 is 1,000 Å thick.

Die Schichten 50 und 52 werden vorzugsweise wie folgt hergestellt. Eine Siliziumscheibe, die mehrere Chips enthält, wird in einem konventionellen Reaktionsgefäß auf eine Temperatur von ungefähr 4300C (i 50C) erhitzt. Um die Phosphor dotierte Schicht 50 herzustellen, werden die nachfolgend aufgeführten Gase in den Reaktor geleitet. Die Durchflußraten werden in bekannter Weise gesteuert, um das nachfolgende Verhältnis der Gase zu der Phosphin-Stickstoff-Komponente sicherzustellen:Layers 50 and 52 are preferably made as follows. A silicon wafer that contains several chips is heated to a temperature of approximately 430 ° C. (i 5 ° C.) in a conventional reaction vessel. In order to produce the phosphorus-doped layer 50, the gases listed below are fed into the reactor. The flow rates are controlled in a known manner in order to ensure the following ratio of gases to the phosphine-nitrogen component:

509814/0852509814/0852

Stickstoff : 500 TeileNitrogen: 500 parts

Sauerstoff : 120 TeileOxygen: 120 parts

3% Silan (Rest Stickstoff) : 14,1 Teile 3% silane (balance nitrogen): 14.1 parts

1% Phosphin (Rest Stickstoff) : 1 Teil1% phosphine (balance nitrogen): 1 part

Das Verhältnis der Gase ist deshalb in der vorstehenden Weise angegeben, weil die jeweiligen Durchflußraten von der besonderen Bauart des jeweils verwendeten Reaktionsgefäßes abhängen. Grundsätzlich sollte ungefähr eine 14-fache Menge 3#igen Silans gegenüber 1%igem Phosphin, genügend Sauerstoff,· um die Reaktion zu Ende zu führen, und diejenige Menge Stickstoff (oder anderes inertes Gas) vorhanden sein, die notwendig ist, um iäieReaktionsgefäß Turbulenz zu erzeugen, sofern solche Turbulenz erforderlich ist. Unter diesen Bedingungen wächst die Phosphor dotierte Schicht 50 mit eine Geschwindigkeit von ungefähr 700 Ä pro Minute. Daraus folgt, daß bei einer Niederschlagsdauer von ungefähr 20 Minuten die Phosphor dotierte Schicht 50 bis zu einer Dicke von 14.000 1 wächst.The ratio of the gases is given in the above manner because the respective flow rates depend on the particular design of the reaction vessel used in each case. Basically there should be about 14 times the amount of 3 # silane compared to 1% phosphine, enough oxygen to complete the reaction, and the amount of nitrogen (or other inert gas) necessary to cause turbulence in the reaction vessel to generate if such turbulence is required. Under these conditions, the phosphorus doped layer 50 grows at a rate of approximately 700 Å per minute. It follows that for a precipitation time of about 20 minutes, the phosphorus-doped layer 50 to a thickness of 14,000 1 grows.

Nach 20 Minuten wird die Phosphinzufuhr abgestellt, so daß nur Silan, Sauerstoff und Stickstoff weiterhin durch das Reaktionsgefäß fließen. Dadurch wird die undotierte Schicht 52 gebildet. Eine Dicke von ungefähr 1.000 Ä dieser Schicht erhält man, wenn dieser Verfahrensabschnitt für ungefähr 1,5 Minuten durchgeführt wird.After 20 minutes, the supply of phosphine is turned off, see above that only silane, oxygen and nitrogen continue to flow through the reaction vessel. This makes the undoped Layer 52 is formed. A thickness of approximately 1,000 Å of this layer is obtained when this process section for about 1.5 minutes.

Nach Fertigstellung der Schutzschicht 34 werden in dieser oberhalb der Anschlußfahnen 32 mit Hilfe konventioneller fotolithografischer Verfahren Öffnungen gebildet. Danach wird das Bauteil nach Trennen des Scheibchens zur Bildung des Chips 24, das auf einem Leitungsrahmen befestigt wird, fertiggestellt, indem die Drähte 28 einer-After completion of the protective layer 34 are in this above the terminal lugs 32 with the help of conventional Photolithographic process openings are formed. The component then becomes a Formation of the chip 24, which will be mounted on a lead frame, is completed by connecting the wires 28 to one another.

509814/0852509814/0852

seits mit den Fahnen 32 und andererseits mit den Leitungen 26 des Leitungsrahmens verbunden werden, der Körper 11 im Preßspritzverfahren hergestellt und schließlich der Leitungsrahmen beschnitten und gebogen wird.are connected on the one hand to the flags 32 and on the other hand to the lines 26 of the lead frame, the body 11 manufactured in the transfer molding process and finally the lead frame is cut and bent.

Sofern das Chip 24 unter Anwendung der erfindungsgemäßen Kombination der Siliziumnitridschicht 40, der Edelmetalle enthaltenden Leiter 30 und der dicken Schutzschicht 34 in zuvor erläuterter Weise hergestellt und in eine ansonsten konventionelle Kunststoffverpackung eingebracht wird, hat es sich herausgestellt, daß ein derart hergestelltes Bauteil sehr beständig gegenüber Wasserdampf und/odeijkorrodierender Umgebung ist. Sogenannte Dampf- bzw. Druckkochtests wurden durchgeführt, bei denen Bauteile einer relativen Luftfeuchtigkeit von 8596 bei 850C unter Anlegen der Betriebsspannung an das Bauteil ausgesetzt wurden. Unter diesen Bedingungen erreichte!die erfindungsgemäß hergestellten Bauteile eine Lebensdauer von 5.000 Stunden, während konventionelle Aluminium-metallisierte Produkte nach ungefähr 500 bis 1.000 Stunden ausgefallen sind.If the chip 24 is produced using the combination according to the invention of the silicon nitride layer 40, the conductor 30 containing precious metals and the thick protective layer 34 in the manner explained above and is placed in an otherwise conventional plastic packaging, it has been found that a component produced in this way is very resistant to this Water vapor and / or corrosive environment. So-called steam or pressure cooking tests were conducted in which the components were subjected to a relative humidity of 8596 at 85 0 C under application of operating power to the component. Under these conditions, the components manufactured according to the invention achieved a service life of 5,000 hours, while conventional aluminum-metallized products failed after approximately 500 to 1,000 hours.

9814/08529814/0852

Claims (5)

RCA Corporation, 30 Rockefeller Plaza, New York, N.Y. 10020 (V.St.A.)RCA Corporation, 30 Rockefeller Plaza, New York, NY 10020 (V.St.A.) Patentansprüche;Claims; ( 1 jKunstst off verpacktes Halbleiterbauteil, bestehend aus einem auf einem Stützplättchen befestigten Siliziumchip sowie Anschlußleitungen, die mittels Drähten mit dem Chip verbunden sind, einem das Chip, das Stützplättchen, die Drähte und Teile der Leitungen verkapselnden Körper aus polymerem Material, wobei das Chip einen Siliziumkörper aufweist, der eine Oberfläche mit PN-Ubergängen aufweist, einer auf der Oberfläche angeordnete Passivierungsschicht, die aus ν einer Siliziumdioxidschicht auf der Oberfläche und einer Siliziumnitrid-Schicht auf der Siliziumdioxid-Schicht besteht, wobei diese Schichten benachbart zu den die PN-Übergänge bildenden Bereichen mit Öffnungen versehen sind, auf der Passivierungs-Schicht angeordneten Verbindungsleitern, die sich bis in die Öffnungen zum Kontakt der genannten Bereiche hineinerstrecken und aus einer Titan-Schicht, einer Platinoder Palladium-Schicht und einer Gold-Schicht bestehen und an nahe der Außenkante des Chips angeordneten Anschlußfahnen enden, dadurch gekennzeichnet , daß die Verbindungsleiter (30) mit einer Schutzschicht (34) aus mittels Pyrolyse , niedergeschlagenem Siliziumdioxid einer Dicke von mindestens 10.000 8 versehen sind.(1 art-off packaged semiconductor component, consisting of a silicon chip attached to a support plate and connecting lines that are connected by means of wires are connected to the chip, one is the chip, the support plate, the wires and parts of the lines encapsulating body made of polymer material, the chip having a silicon body having a surface with PN junctions, a passivation layer arranged on the surface, which consists of ν a silicon dioxide layer on the surface and a silicon nitride layer on top of the silicon dioxide layer, these layers being adjacent to the areas forming the PN junctions are provided with openings, arranged on the passivation layer Connecting conductors that extend into the openings for contacting the areas mentioned and consist of a titanium layer, a platinum or palladium layer and a gold layer and end at terminal lugs arranged near the outer edge of the chip, characterized in that that the connecting conductors (30) with a protective layer (34) made by means of pyrolysis, deposited silicon dioxide to a thickness of at least 10,000 8 are provided. 509814/0852509814/0852 2. Halbleiterbauteil nach Anspruch 1, d a d u r (X]T ^ ^ ^ ^ ^ -gekennzeichnet , daß die Silizium-2. Semiconductor component according to claim 1, d a d u r (X] T ^ ^ ^ ^ ^ -marked that the silicon ■ 'dioxid-Schutzschicht (34) ungefähr 15.000 S dick ist und aus zwei. Schichten besteht, von denen eine Schicht (50) eine Dicke von ungefähr 14.000 S aufweist und aus Phosphor dotiertem Siliziumdioxid besteht, während die andere Schicht (52) ungefähr 1.000 S dick ist und aus undotiertem Siliziumdioxid besteht,■ 'dioxide protective layer (34) is approximately 15,000 S thick and from two. Layers consists of which one layer (50) has a thickness of approximately 14,000 S and is composed of phosphorus doped silicon dioxide, while the other layer (52) is about 1,000 S is thick and made of undoped silicon dioxide, 3. Verfahren zum Herstellen eines Halbleiterbauteils gemäß Anspruch 1 oder 2 mit hoher Beständigkeit gegenüber Wasserdampf und Hitze sowie mit Schadstoffen angereicherter Umgebung, dadurch gekennzeichnet j daß ein an einer Oberfläche PN-Übergänge bildende Bereiche aufweisender Körper (29) in einer oxydierenden Atmosphäre erhitzt wird, so daß eine Schicht (38) aus Siliziumdioxid auf dieser Oberfläche (36) entsteht, daß auf der Schicht (38) eine Schicht (40) Siliziumnitrid mit Öffnungen in der Siliziumnitrid-Schicht (40) und der Siliziumdioxid-Schicht (38) zum Freilegen gewisser Bereiche der Oberfläche (36) gebildet wird, daß ein Leitungsmuster (30) vorgesehen wird, bei dem jeder Leiter aus einer niedergeschlagenen Titan- (44), einer Platin- oder Palladium- (46) und einer Gold-Schicht (48) besteht, und zwar in der genannten Reihenfolge, wobei die Leiter (30) an Anschlußfahnen (32) nahe der Außenbegrenzung des Körpers (29) enden, daß die Leiter (30) mit einer Schicht (34) aus Siliziumdioxid einer Dicke von mindestens 10.000 Ä überzogen werden, daß in der Siliziumdioxid-Schicht (34) öffnungen vorgesehen werden, durch die die Anschlußfahnen (32) freigelegt werden, daß der Körper (29) auf einem Leitungsrahmen be-3. A method for producing a semiconductor device according to claim 1 or 2 with high resistance to Water vapor and heat as well as enriched with pollutants Environment, characterized in that one PN junctions on a surface forming areas having body (29) is heated in an oxidizing atmosphere, so that a layer (38) of silicon dioxide on this surface (36) arises that on the layer (38) a Layer (40) silicon nitride with openings in the silicon nitride layer (40) and the silicon dioxide layer (38) to expose certain areas of the surface (36) that a line pattern is formed (30) is provided, in which each conductor is made of a deposited titanium (44), a platinum or Palladium (46) and a gold layer (48), in the order mentioned, with the conductor (30) at connecting lugs (32) close to the outer boundary of the body (29) end that the conductor (30) with a layer (34) of silicon dioxide are coated with a thickness of at least 10,000 Å that in the Silicon dioxide layer (34) openings are provided through which the connecting lugs (32) are exposed, that the body (29) rests on a lead frame 509814/0852509814/0852 festigt wird und Verbindungsdrähte (28) zwischeircfen Anschlußfahnen und den Leitungsteilen des Leitungsrahmens vorgesehen werden, und daß um den Siliziumkörper (29), die Anschlußdrähte (28) und Teile der Leiter eine Verkäpselung· (11) aus polymerem Material geformt wird.is fastened and connecting wires (28) between connecting lugs and the lead parts of the lead frame are provided, and that around the silicon body (29), the connecting wires (28) and parts of the conductors an encapsulation · (11) made of polymer material is shaped. 4. Verfahren nach Anspruch 3# dadurch gekennzeichnet, daß der Siliziumdioxid-Überzug durch Erhitzen* des Körpers in einer Silan (SiH^) und Sauerstoff enthaltenden Atmosphäre auf mindestens die für die Pyrolyse von Silan erforderliche Temperatur für eine hinreichend lange Zeit, um diese Schicht auf eine Dicke von mindestens 10.000 Ä zu bringen, gebildet wird.4. The method according to claim 3 # characterized in that that the silicon dioxide coating is made by heating * the body in a silane (SiH ^) and oxygen-containing atmosphere to at least that required for the pyrolysis of silane Temperature for a sufficiently long time to make this layer to a thickness of at least 10,000 Å to bring is formed. 5. Verfahren nach Anspruch 4, dadurch gekennzeichnet , daß die Atmosphäre zusätzlich Phosphin enthält, so daß der Überzug aus Phosphor dotiertem Siliziumdioxid gebildet wird, und daß der Körper zusätzlich in einer aus Silan und Sauerstoff bestehenden Atmosphäre erhitzt wird, um eine undotierte Siliziumdioxid-Schicht auf der Phosphor dotierten Siliziumdioxid-Schicht zu bilden.5. The method according to claim 4, characterized in that the atmosphere is additionally Contains phosphine, so that the coating of phosphorus-doped silicon dioxide is formed, and that the body is additionally heated in an atmosphere consisting of silane and oxygen in order to forming an undoped silicon dioxide layer on the phosphorus doped silicon dioxide layer. 5098U/08525098U / 0852
DE19742445250 1973-09-28 1974-09-21 PLASTIC-PACKED SEMI-CONDUCTOR COMPONENTS WITH HIGH RELIABILITY Pending DE2445250A1 (en)

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CA (1) CA1012660A (en)
DE (1) DE2445250A1 (en)
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3226222A1 (en) * 1982-07-14 1984-01-26 Diehl GmbH & Co, 8500 Nürnberg DEVICE FOR CONNECTING AN ELECTRODE TO A CARRIER

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3226222A1 (en) * 1982-07-14 1984-01-26 Diehl GmbH & Co, 8500 Nürnberg DEVICE FOR CONNECTING AN ELECTRODE TO A CARRIER
US4467401A (en) * 1982-07-14 1984-08-21 Diehl Gmbh & Co. Arrangement for the connection of an electrode to a support

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JPS5062383A (en) 1975-05-28
FR2246069B1 (en) 1979-08-03
NL7412797A (en) 1975-04-02
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HK44678A (en) 1978-08-18
AU7357274A (en) 1976-03-25
GB1442881A (en) 1976-07-14
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MY7800359A (en) 1978-12-31
SE7412193L (en) 1975-04-01
CA1012660A (en) 1977-06-21
FR2246069A1 (en) 1975-04-25

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