DE2441192C2 - Sample and hold circuit for determining the voltage value contained in a periodic signal - Google Patents

Description

The savings achieved by the circuit according to the invention are not insignificant when you consider that In television measurement technology, a large number of measuring devices are used along a transmission path often 30 or more such sampling circuits contain.

There are summing sampling circuits with a buffer known in which after, the sampling switch in series with an integration capacitor that is parallel to an operational amplifier Resistance is switched (electronic computing systems, 3, 1961, issue 3, pages 119 to 122, Fig. 8). These known circuit forms the integral over the sampling voltage values taken from the buffer memory and not their mean value. In this known circuit, the integration capacitor is not closed either an active higher-order filter added

The invention is illustrated below with reference to FIGS. 4 and 5 explained in more detail using three exemplary embodiments

F i g. 3 initially shows the addition to the in FIG. 1 shown known sample-and-hold circuit to a filter of the first order by simply connecting a resistor R 1 in series to the electronic switch S and the signal source U to be sampled is in the order of magnitude between 0.1 and 2μ5. Provided that the time constant Ri · C \> d , the input signal with a slit frequency response of the form is given by the defined sampling time d

π df

rated. To measure the white pulse level in a television test line signal, a sampling time d of 1 [is , for example, is used, and the mean level value is determined within this sampling time d, which is permissible as long as the signal curve is linear within this time or the curvature is negligibly small. The sampling period T _p depends on the repetition frequency of the signal to be sampled and is 40 ms, for example, in test line measurement technology.

The resistor R 1, together with the sampling switch 5 and the downstream storage capacitor C1, forms an overshoot-free low-pass filter, which reduces the interference voltages superimposed on the signal, for example white noise, with a split function (split frequency response) and b a /? C amplitude frequency response with the time constant

rated. During the sampling time d , a current flows through the charging resistor R 1 which is determined by the voltage difference between the input voltage of the signal source U t> o and the current voltage on the storage capacitor Cl. During the hold time, ie when the switch S is open, the voltage level across the storage capacitor C1 remains constant. At the output of the operational amplifier O b5 serving as an impedance converter, there is a step-shaped /? C function with a constantly decreasing step height. If the signal is not constant during sampling time d, but rather

z. B. increases linearly, arises at the storage capacitor Cl after the settling time of the sampling circuit, the voltage mean value of the level curve during this sampling time d

The filter is dimensioned in a known manner. With a given settling time (for example the requirement that 99.5% of the measured value jump must be reached in 10 seconds) and known properties of the signal voltage source U (current yield, maximum voltage swing, period duration, internal resistance) as well as the given input current of the operational amplifier O and a defined sampling time d can be used the two elements R 1 and C 1 of this filter are calculated. The operational amplifier should have an input resistance that is as high as possible and an output resistance that is as low as possible and is therefore preferably fed back. In the example shown, the resistor R 1 is arranged in front of the switch S , which under certain circumstances can be more advantageous than the arrangement after the switch.

The filter effect of the circuit according to Fig.3 is but still ment optimal. According to the invention, the circuit according to FIG. 4 and 5 become an active one Filters of the second or higher order can be added.

F i g. 4 shows how the operational amplifier O can be supplemented by the /? C combination RMCX and RlICl to form an active second-order filter. The one resistor R 1 of the resistor series circuit is in turn arranged in series with the electronic switch S. If the scanning width is d <R \ ■ C \ , the input signal is again weighted with the slit frequency response sin (π fd) / (n fd) . Since the second order filter is set to z. B. 99.5% v. E. If the frequency response drops more steeply above the 3 dB cutoff frequency, an improvement in the elimination of interference by approximately 4 dB is achieved compared with a circuit according to FIG. When calculating the transient response of this second-order filter, it must be taken into account that the resistor R 1 is only connected during the scanning line. In this time range, a current flows into the capacitor Cl, the mean value of which is determined by the resistor R 1 and the mean voltage difference across this resistor R 1. In the holding phase, that is to say when the switch 5 is open, the charge stored in the capacitor Cl is partially compensated for via the resistor R 2 with the charge stored in the capacitor C2. The voltage at C2 only follows with an additional delay. Due to the feedback from the output of the operational amplifier, which is preferably fed back, via C1, the course of the transient function at C2 and thus also at output A can be influenced. The calculation of this filter according to FIG. 4 can be carried out according to methods known in principle, whereby it must be taken into account that the resistor R 1 is only connected at times. The calculation can be carried out, for example, with an iteration method in which the voltages and currents at the individual components and their changes are calculated step by step in the sample and hold phases over a complete transient process. It is useful to include these calculations in an optimization program in which the dimensioning of the filter elements, taking into account the sampling time d, the sampling period Tp, the permissible residual deviations after the expiry of the pre-level input

oscillation time is determined with a free choice of a component.

F i g. 5 shows the addition to a third-order filter, the resistor R 1 of the filter elements again being arranged in series with the switch 5. The circuit according to FIG. 5 can be used as a combination of the circuits according to FIGS. 3 and 4 are understood. Here, too, the advantage of the slit frequency response given by the defined scanning width d (suppression of high-frequency interference and / or signal components of the input signal) is combined with the improved interference voltage suppression by the downstream active filter. This third-order filter allows the spread of the measured value compared to the circuit according to FIG. 3 with the same disturbance variable and with the same settling time to 99.5% f.s. E. can be reduced by about 6 dB.

1 sheet of drawings

Claims (1)

Claim: Sample and hold circuit for determining what is contained in and from a periodic signal Voltage value superimposed on interference voltages, in particular that contained in a television signal Test line test signal, with an electronic switch and one at its output and in front of it Storage capacitor connected to an impedance converter, in which higher-frequency interference voltage components before the scanning and lower-frequency interference voltage components are filtered out after the scanning, characterized by the combination of the following features: a) the storage capacitor / Cl) becomes a component made of an active low-pass filter of the second or higher order and b) the closing time (d) of the switch (S) is made shorter than the time constant (Ri ■ CI) resulting from the storage capacitor (Ct) and the upstream charging resistor (RX) of the filter. The invention relates to a sample and hold circuit according to the preamble of the main claim. Sample and hold circuits are known which consist of an electronic switch and a storage capacitor connected to the input of an impedance converter (Journal of the Institution of Electronics and Telecommunication Engineers, Vo. 20, No. 7, July 1974, page 374). Fig. 1 shows such a known circuit. It is also already known to use such sample and hold circuits to determine the voltage value contained in a periodic signal, for example the test line test signal contained in a television signal. The test line test signal contained in the program-free lines of the image blanking interval is scanned from the schematically indicated signal source t / via an electronic switch S which is controlled via a pulse generator /, for example every 40 ms, and the instantaneous voltage value is then stored in the storage capacitor Cl and can be picked up at the beginning A for further measurement purposes via an operational amplifier O serving as an impedance converter, for example, with negative feedback. The sampling pulse width is chosen arbitrarily. However, such voltage values to be determined are usually also superimposed on interference voltages which would falsify the measurement result. For this reason, it is already known to connect a low-pass filter which filters out the higher-frequency interference voltage components in such measuring circuits, which work with scanning circuits, to determine the voltage value of the scanning circuit contained in a periodic signal CCIR-Rec. 267, Los Angeles 1959, Vol. V). In order to also filter out the lower-frequency interference voltage components after the scanning, i.e. to obtain an average value of the voltage value, which is itself relatively constant over a longer period of time, over a longer measuring time, it is already known to connect a further low-pass filter with a correspondingly lower cut-off frequency to the impedance converter of the scanning circuit. Such additional low-pass filters on the one hand to filter out the higher-frequency interference voltage components before the scanning and on the other hand the lower-frequency interference voltage components after the scanning are relatively expensive in construction, they have to consist of coils, capacitors, resistors and, if necessary, isolating K) amplifiers are built up and thereby make them more expensive such measuring circuits. It is the object of the invention to provide a measuring circuit of the type mentioned at the outset, which is very structurally is easy. This task is based on a circuit according to the preamble of the claim by the characteristic features solved. The active filter is constructed and dimensioned in a known manner, for example according to the regulations for the calculation of active filters according to Electronics 1970, Issue 10, pages 329-334, or Issue 11, pages 379-382, in particular Figures 9, 10 and 13, or issue 12, pages 421-424, taking into account the given settling time, within which a predetermined measured value must be reached, as well as that in the circuit according to the invention given special requirement of the interposed electronic sampling switch. Also the measurement of the closing time to achieve jo of the desired split frequency response takes place in known Based on the desired or required filter properties. Is for such Scanning circuit for a special measuring task in test line measuring technology, for example in front of the scanning switch a Thomson filter with a basic delay of 300 ns is required and is therefore a definite one Given the amplitude frequency response of this filter, according to known design rules for so-called cut-off frequency filters that provide such a filter 4 (i genschaft effecting corresponding closing time of the switch can be calculated. F i g. 2 shows a realizable in this way gap frequency response for the input signal, wherein, in known manner, the frequency of the first Filterpolstelle F of the closing time d is directly inversely proportional. For a gap frequency response with the first filter pole position F at 1 MHz, a closing time of 1 με is required, for example. Through the combination according to the invention, namely the storage capacitor as part of an active one Make second or higher order low pass and the closing time of the switch is smaller than that Storage capacitor and the upstream charging resistor of the filter resulting in the time constant make is achieved that 1. the input signal with the amplitude frequency response of a split frequency function is evaluated, so the higher-frequency interference voltage components are filtered out without this a separate filter is connected upstream, and that 2. bo at the same time also the lower-frequency ones via the low-pass filter Interference voltage components are filtered out, so the desired mean value is formed. the The circuit according to the invention thus fulfills two filters in addition to its actual function as a sampling circuit functions of different cut-off frequency, namely the function of a low-pass filter for the high-frequency Interference voltage components and a low-pass filter to filter out the low-frequency interference voltage components.