DE2429633A1 - TRANSMISSION DEVICE - Google Patents

Description

BLUMBAOH -WESER · BARGEN & ! {R

PATENTANWÄLTE 1 N V / l ESBAD EN AND MUNICH

DIPL-ING. P. G. BLUMBACH · DiPL-PHYS. DR. W. WESER ■ DIPL-ING. DE. JUK. P. BERGEN DIPL-ING. K. KRAMER

WIESBADEN; · SÖNENBEKGER STRASSE 43 ■ TEL (06121) 5ί2ίΊ3, 5Ä199S MCNCHfN

Western Electric Company Germany

Incorporated Strain-12-1

New York, N.Y.

"TRANSMISSION DEVICE"

The invention relates to a transmission device having a first

Section m'ft N successive transmission stages (ee _KI ) to

O IN

sequentially transmitting a transmission signal unit from stage to stage in one direction of transmission.

It is known to thereby operate a shift register in semiconductor components to realize that localized accumulations of charge in a semiconductor medium electrically controlled shifted v / earth. Such charges are controllably transmitted through the semiconductor with the help of supplied clock voltages, the electrical charges from one storage location to the next in the Transferring semiconductor component. Such a semiconductor shift register is accordingly effectively a charge transfer device CTD).

.409883 / 098?

Charge transfer devices on the semiconductor field fall into two Hauöt categories, in the so-called charge-coupled device (chargecoupled device CCD) and integrated circuit versions of the bucket-brigate-device BBD. With each version there is a spatial periodic electrode metallization pattern on a building surface an oxide-coated semi-conductor body provided that a consequence define integrated MOS capacitors (meta I -oxide-semi conductor), so that localized accumulations of electrical charge in the semiconductor between adjacent MOS capacitors by means of sequential electrical voltage pulses (Clock pulses) supplied to the electrodes by the Semiconductors can graze pushed sequentially. These charges are initial injected at the input end of a chain of such MOS capacitors, with a corresponding digital or analog information flow, for example in the form of injected or uninjected charges to the corresponding Points in time of the output voltage pulse sequence. Generally are as many MOS capacitors (storage locations) are provided per storage cell, how phases exist in just one cycle of the voltage pulse trains controlling the CTD.

In the CCD version of a CTD, the signal charges injected into the semiconductor when they are not being pushed, localized as isolated inversion layers at the oxide-semiconductor interface; and the charges

409883/098?

are pushed through the semiconductor under the influence of the Taki signals. In the BBD version of the injected charges are (if they are not being pushed) isolated as excess Mgjoritätsladungsträger in a diffused (or implanted) regions of localized PN junctions which have been prepared beforehand at the oxide-semiconductor interface; and this excess charge (not necessarily the same originally injected charge carriers) is pushed through the semiconductor under the influence of the clock pulses.

It should be understood that normally in current semiconductor charge transfer devices the semiconductor medium is silicon and the oxide silicon is dioxide. However, in general, other suitable Semiconductor-insulator combinations are used. So can the term "oxide" in conjunction with CTD's refers to any appropriate one Refer to isolator.

In general, CTDs have the problem of incomplete signal charge transfer from one MOS capacitor storage location to the next so that at the output end of such a capacitor chain forming the CTD, the output signal is a distorted representation of the input signal in Is the form of a sequence of localized output signal charge impulses.

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-A-

As a result of this distortion, error rates are particularly disturbing in the case of comparatively long-chain CTDs, where the number of transmission levels exceeds N eiwa0.1 / £ X, where CK means the coefficient of incomplete transmission for each practically identical transmission level, and where each transmission level only has one storage location (plus its Transmission zone). The coefficient O \ is defined as the ratio of the signal charge increment (transfer charge) that remains in a transfer stage to the corresponding increment of the signal charge that has been transferred from this stage to the next transfer stage during a single transfer cycle of the supplied clock voltage. It is therefore desirable to have a means of reducing the errors caused by incomplete transmission in CTDs.

According to the invention, the above problem is with a charge transfer device solved in that a second section coupled to the output of the first section is provided with at least two transmission stages, of which one stage (e *.,) has a coefficient incomplete transfer, which is of the order of magnitude of the sum the coefficients of incomplete transmission of all located on the one Level is level.

409883/0987

According to one embodiment of the invention, a sequence of several transmission stages is added as an auxiliary charge transmission device to the output-side end of a main CTD with N advantageously practically identical transmission stages. The output of the main CTD is fed to the input of the auxiliary CTD. The incomplete transmission coefficient, C \, of the last auxiliary transmission stage of the auxiliary CTD defined above is advantageously made at least about equal (within about 10 %) to the sum of the incomplete transmission coefficients of all the stages of the main CTD plus those of the other auxiliary stages. The difference in the transferred electrical charge at a predetermined point in time relative to the controlling clock cycle, which is present in another of the auxiliary transfer stages with respect to the last auxiliary stage, provides a corrected output signal for the N-stage CTD.

With a special execution example! of the invention is an N-ary Common two-phase bucket chain component (BBD) terminated with a four-stage (filtering) auxiliary BBD. Both the N-suffe and that Auxiliary BBD are in a single η-conductive single-crystal semiconductor body integrated. Each transmission stage in both BBD's is through a MOS capacitor element (together with a p-conductive zone in the semiconductor on its surface), which is formed by an electrode on the oxide. All transmission stages in both the N-stage BBD and in the

Auxiliary BBD are designed largely identically and are electrically controlled by a two-phase pulse voltage pulse train, which is fed to the electrodes of the corresponding stage. Only the last stage of the (filtering) auxiliary BBD is assigned to a semiconductor zone which is controlled by an electrode whose width (viewed in the charge transfer direction) is much larger than the (same) widths of the other MOS capacitor electrodes in both the filtering auxiliary BBD as well as the N-stage BBD. This advantageously makes the incomplete transmission coefficients of all stages in both the N-stage and the auxiliary BBD (excluding the last stage) essentially the same, to within 10 % for analog signals and to within 50 % for digital signals. In particular, by widening the electrode associated with the last auxiliary transmission stage, the coefficient for incomplete transmission, οζ , of the last stage of the auxiliary BBD essentially (to within 10 %) becomes equal to the sum of the virtually identical coefficients of incomplete transmission for all remaining levels of the N-level and the remaining levels
made by the auxiliary BBD. The individual cC values are advantageously so small that this sum does not exceed 0.1. As a result, the difference in the transferred charge accumulation (at a suitable fixed point in time in the cycle) in the last stage of the filtering auxiliary BBD compared to the penultimate stage of this same BBD is the desired corrected

40 & ßÖ3 / 0987

Output signal for the N-stage BBD.

According to another aspect of the invention, an N-stage shift register, the transmission stages of which are all characterized by incomplete transmission CK , is terminated with an auxiliary shift register. The last stage of the register has an incomplete transmission coefficient for a signal unit which is of the order of magnitude, advantageously to within about 10 %, of the sum (which in turn is advantageously less than about 0.1) of all the coefficients of all the other cells of the combined Device (N-stage shift register plus auxiliary shift register) is. This coefficient ^ is defined on the basis of signal units (transmission units) in the same way as previously on the basis of a signal charge. Then the difference in the storage of a transmission signal unit in one of the stages in the auxiliary register relative to the last stage of this auxiliary register at a predetermined point in time is a corrected output signal for the N-stage register, ie an output signal that is characterized by reduced errors due to incomplete transmission. The reason for this error reduction is attributable to the reflection and practical duplication of errors due to incomplete transmission in the N-stage arrangement by the last stage of the auxiliary shift register and the subtraction of this error from the output signal.

0 988 3/0 9 87

The invention is described below with reference to the drawing;, it demonstrate:

FIG. 1 is a schematic plan view of a semiconductor bucket string transfer device with an auxiliary bucket chain transfer device according to the invention,

FIG. 2 is a diagram showing the temporal charge ratio!

least to explain the mode of operation of the embodiment according to FIG. 1,

FIG. 3 shows a two-phase transmission device with a transmission filter according to the invention and

FIG. 4 shows a three-phase transmission device with a transmission filter according to the invention.

According to FIG. 1, an N-stage bucket chain device 10 is integrated into an η-conductive silicon semiconductor single crystal case Π. The device 10 v / eist a series advantageously virtually identical electrodes e., E ^"e .... NV ^{e au} N ^ ^ ^{'e au} ^ ^{e' ner} oxide layer are arranged on a main surface of the crystal Π. Each electrode is different

409883/0987

Assigned to the charge transfer stage of the main BBD, which is formed by these N stages * Each transfer stage also has an associated p-conductive zone p (T), p (2) .... p (Nl), ρ (N), the all largely identical, as is known for bucket chain devices. These transmission stages are provided by a two-phase clock voltage · ( Φ ·,;, * Ρη) / which are supplied by a voltage source 20. Input signals to this N-stage BBD are also fed from the source 20 to an electrode e which penetrates the oxide layer to form an associated ρ -conducting zone p (o) in the semiconductor Π on the left soap of the electrode '&. to contact. These input signals cause localized electronic holes (defective electrons) to be injected into the semiconductor, which then sequentially from left to right in FIG. 1 through the N-steps, corresponding to the two-phase clock voltages (^ ₁ , ⁴ PJ according to the known charge transfer principles).

In accordance with the invention, there are now additional auxiliary charge transfer stages on the right side of the N-stage device TO for the purpose of formation an auxiliary BBD provided. This HMfs-BBD allows the reduction of Errors in the output of the N-stage BBD caused by incomplete charge transfer are caused. This can be seen in its effect as a filter

409883/0 987

Auxiliary BBD has electrodes e *. ., e ». _, e .. _, & κι, λ on the surface of the oxide on the same crystal 11, v / obei wiedoaim assigned p-conductive zones p (N + 1), p (N + 2), p (N + 3) , p (N + 4) are provided. The electrodes ej,., ^E N + 9 ^υη ^ ^e N +? ^s ' ^{n <} ^ ^νθΓ ϊ?' Ι ^ηα ^ practically identical to the electrodes e ,, e ~ ..., whereas the electrode e ^. ^ seen in the direction of charge transfer (from left to right) is longer by the value of the KbeffTzienten for incomplete transfer of a signal charge from that of the electrode e ^. "To increase assigned level. The p-conductive zone p (N + l) under the electrode e ^. . is typically made largely identical to pO), p (2), ... On the other hand, the p-conductive zones p (N + 2) and p (N + 3) are elongated transversely to the direction of charge transfer in order to lead there to connection contacts 21 and 22 which penetrate the oxide on the silicon crystal 11. At the same time a ρ -conducting zone p (N + 4) runs below the electrode e>, ^ along the surface of the silicon crystal ll to a drain electrode e- (sink), which penetrates the oxide for connection purposes to the zone p (N + 4). It should be noted that the zones P (o) and p (N + 4) mostly have a higher p-conductivity than the other p-zones p (1), p (2), .... o (N + 2) " have p (N + 3). A battery 25 supplies sufficient negative voltage to the electrode β _ς to collect (extinguish) the electronic holes that occur during operation from below the electrode e>, “to below the electrode βν,. have been transferred.

409883/0987

The electrode contacts 21 and 22 are connected to electrical signal charge sensors Q ₁ and Q ₉ , respectively, which respond to the transmission signal charge Q in the zones p (N + 2) and p (N + 3), respectively. These sensors are at the input of a differential amplifier 23, the output of which leads to a detector which responds to this for further use.

Since all transmission stages in the semiconductor 11, which the electrodes e, e "... e". ., ^e Kijo / ^e Kj.q are typically largely the same (except for the assignment to the various phases Q-- .. and ^ t λ of the clock voltages), the coefficient for incomplete charge transfer assigned to these stages is also be largely identical. On the other hand, according to the invention, the electrode ^e M-i_ / T ^m '*' ^nr associated p-zone p (N + 4) is made comparatively long in the charge transfer direction (and / or transversely to the transfer direction, possibly kept comparatively narrow) around the assigned Coefficients (A to be responsible for incomplete transmission in such a way that it is of the order of magnitude, advantageously at least approximately equal to the sum of the coefficients for incomplete transmission of the transmission stages, which the electrodes e, e ", e_ ... e .., e, ^e K | 4.o "' ¹ ^ ^e Ki.q. For example, since incomplete charge transfer is almost directly proportional to the square of the

40 9683/098 7

Electrode length in the charge transfer direction is assumed equal coefficients (X for the preceding (N + 3) stages, for example

1/2 wise the length of the electrode e. ■ . advantageously made longer by the factor (N + 3), while the width of this electrode is kept the same transverse to the charge transport mitigation as that of the other electrodes.

FIG. 2 shows a typical diagram of the signal charge behavior Q of the signal charge sensors Q. and GL in FIG. 1 as a function of time. The output of these sensors is connected to a differential amplifier 23 (FIG. 1) in order to obtain an output signal for the consumer 24 which is proportional to Q, -GL. The output signal Q ₁ -Q- is advantageously only used for purposes of further use during a selected time interval within a time slot t. to t _R , this latter time slot t. to t _{R is} defined as that time slot during which the charge behavior Q. is at least almost (within 10%) of its maximum value. The selected time interval for sampling Q, -Q “can be controlled by keying in the differential amplifier 23 during the selected time interval within the time slot f to t _R according to conventional methods. As a result, the signal QQ- becomes a corrected output signal for the N-stage device 10 during a selected time interval (within t. T "). While Q" represents the error signal, Q _{1 is} the uncorrected one

409883/0987

Output signal so that Q ₁ -Q ,. represents the corrected output signal. It should be noted that the maximum charge behavior of Q- is smaller than that of Q | because of the comparatively large coefficient for incomplete charge transfer from below the electrode e ^ "to e ^ ·, j ' ^m compared to the transfer from below the electrode e". "On e>.,".

While device 10 is illustrated as an N-stage BBD, it should be understood that other semiconductor charge transfer devices, such as a CCD, may also be used. For example, a CCD with a graded oxide layer is also suitable for the device 10. In addition, CCDs can also be used as the auxiliary device acting as a filter (which are assigned to the electrodes e ^ ,,., ^E Ki, or ^e M + T βκ · ^). However, since CCDs generally have no p-zones, the corresponding electrodes should e., _, E ^. _ and & K, _y, have sufficient distance from one another to be able to introduce p-zones as fixed charge fields, which would then have to be connected to the charge sensors Q. and Q ~ via the electrode contacts 21 and 22, respectively.

All coefficients are advantageous for incomplete transmission in the Device 10 and for all transmissions except the last one (from e ^. " on OKj rJ of the auxiliary charge transfer device are equal to each other

A 0 988 3/0987

to within 10% to analog signal transmission, and to within 50 ° / o for digital signal transmission, and is further advantageous, the coefficient for the last transmission to within about 10 ° / o equal to the sum alier these coefficients to a useful correction in the output signal Q, -GL to have.

FIG. 3 shows an N-stage two-phase transmission device together with an auxiliary (filtering) transmission device. The η-stage over transmission device is through N-transmission points T, T, L, .... T.. formed together with N-transmissions, each transmission being characterized by a coefficient for incomplete transmission (Ä,., O (~ _r <X .. or oC γ the influence of a two-phase clock source 30. This coefficient is defined in the same way on the basis of the transmission signal unit Q as was previously defined on the basis of an electrical signal charge at CTDs. „And T>, ^ formed with coefficients for incomplete transmission CK ^ ₊₁ , ⁰ .

An input signal to point T, (FIG. 3) is from an input source I. fed in a sequence of signals in the form of the transmission unit

409883/0987

Q supplies this first transmission line T. for a subsequent transmission on T 1, T 1, etc. under the influence of the clock source 30. A pair of sensors Q 1 and Q ", which each respond to the transmission signal unit Q at the points L" and T \, "■ during a suitable common time slot relative to the clock phases Cp, and 9 ^" (to be determined empirically, for example), deliver these simultaneously received signals to a difference detector D for the determination and further use of the desired output difference signal Q-GL. According to the invention, C '^, is made equal to the sum of all (J \ values of the previous stages, ie

^a NH-3 ⁼ ° S ⁺ <VV · - ⁺ «N ⁺ * ⁺ * W

In addition, the coefficient for incomplete transmission (X _Kl . Der

* "In + 4

Unit Q from the last digit T _{t> j4} i to a sink S (to destroy any transmitted unit) made smaller than CK _{K,. Q f} about an undesired accumulation of charge units at the transfer point T ». . to avoid.

It should be noted that each of the transfer points T., T ^, ... (FIG. ₃₎ of a memory area in the semiconductor 11 (FIG. 1) corresponds to below the corresponding electrode e ,, e ~ ..... It should also be noted that the signal Q _{1 is} the uncorrected output signal and that the signal Q_ is the correction for the signal Q i, so that Q, -Q_ is the corrected output signal, as desired,

40 9383/0987

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represents. The reason for the separate transmission point T.. . between Τ », and Tj. «Is that, the corrected signal Q ₁ and consequently the corrected signal Q ₁ -Q. in phase with the second clock phase Cp ^ ; so the point T.. _{1 can be} omitted if the signal Q ₁ and thus the difference Q ₁ -Q _{9 should be} in phase with the first clock phase Cp and not in phase with the second clock phase

FIG. 4 shows a three-phase transmission device with an auxiliary (filtering) transmission device according to a further embodiment of the invention. The arrangement is similar in many respects to that of FIG. 3, therefore corresponding elements are provided with corresponding reference numbers. Again, each transmission stage is characterized by a transmission point T and a coefficient ^ Λ for incomplete transmission, in conjunction with FIG. 4 it should be noted that according to the invention, CK ^. c of at least the order of magnitude of, and advantageously approximately equal to 0 (+ 0 (+ Pi i _s t _and that

is advantageously less than ^ Xki.c.

Obviously, the sensor Q. (FlG. 4) can be switched on so that it to the transfer unit Q at the point Τ ». , or L, «instead of an

409883/0987

the point "L. _ responds with an accompanying phase change in the output and that the sensor GL is then to be connected to the transmission stage which is one transmission stage away, namely on the output soap of the transmission chain, from that transmission stage to which the sensor is located Q. In each case, GL is the output signal of that transmission stage whose coefficient (X is equal to the sum of the others.

From the above it follows that the invention is particularly applicable to three-phase (or multiphase) semiconductor charge transfer devices; for this purpose, each of the storage locations T-, T "... (FIG. A) need only be used as a semiconductor zone below an electrode e., e_. 1.

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Claims (9)

2429833 BLUsViBACH ■ WESER> LSERG: ^; & Ki ^ viER PATENTANWÄLTE ΪΝ WIESBADEN AND MUNICH DlPL-ING. P. G. BLUMBACH - DiPL-PHYS. DR. W. WESER - DIfL-ING. DR. JUR. F. BERGEN DIPL-ING. R. KRAMER WIESBADEN · SONNENBERGER STRASSE 43 - TEL. (06121) 562? <3, 5S1? 98 MUNICH PATENT CLAIMS Transfer device having a first section with N consecutive Transmission stages (e ... ej for sequential transmission a transmission signal unit from stage to stage in a transmission direction, characterized in that a second section coupled to the output of the first section and having at least two transmission stages is provided, one of which is a stage (e ..,) a coefficient incomplete transfer (/ X) that is of the order of magnitude is the sum of the coefficients of incomplete questioning of all stages before the one stage. 2. Apparatus according to claim 1, characterized in that the coefficient of incomplete transmission is at least approximately (to within about 10 %) equal to the sum. 3. Apparatus according to claim 1, characterized by responsive to the one stage means (GL) for determining the difference in 409883/0987 the size of the transmission unit in one stage versus another Mare (e.. ■ _) during a predetermined time interval. 4. Vorrichiung according to claim 3, characterized in, that the other stage (e.. «) is located in the second transmission device. 5. Apparatus according to claim 1 or 3, characterized by with means (20) connected to the first transmission stage of the first transmission device for introducing an input signal to the first transmission stage for subsequent transmission by the first and second transmission devices. 6th Device according to claim 1 or 2, characterized in that that the first and second transfer devices each have charge transfer semiconductor reservoirs (11) are incorporated into a single semiconductor crystal are integrated. 7. The device according to claim 6, characterized by a clock pulse source (20, Φ ,, Φ * jlι the sequential to the transfer stages in at least the eisten transfer device for transferring localized accumulations of electrical charge from one stage to the next through the first and two transfer device through. 409883/0 98 7 8. Transmission device according to claim 6 _r characterized in that the coefficients of incomplete transmission of all transmission stages in the first device including that of the other stage in the second device are at least approximately (to within about 10 %) equal to each other. 9. Transfer device according to claim 6, characterized in that the second transfer device is a bucket chain device
(FIG. 1). 409883/0987 Blank page