DE2332783A1 - CIRCUIT FOR PHASE CALCULATION FOR AN ANTENNA WORKING WITH ELECTRONIC BEAM SWIVEL - Google Patents

Description

Circuit for phase calculation for one with electronic Beam pivoting working antenna

The invention relates to a circuit for phase calculation for an antenna working with electronic beam swiveling, consisting of rows and columns There is radiator elements, the current phase of which is set via a digital, q-bit phase shifter using a digital multi-bit element memory is, being made to digital, with p-digit binary numbers Calculation of the common vertical phase values of all phase shifters within the individual lines of a single one; clock-controlled vertical arithmetic unit and for each line for additional digital, also made with p-digit binary numbers, calculation of the horizontal phase values of all Phase shifter per line each with its own, with the same. Clock working horizontal arithmetic unit provided isx, from those of one, which is assigned to an edge line, with its vertical phase value input with the output of the vertical arithmetic unit is connected and which are interconnected in such a way that these vertical phase values enter the input memory of the next horizontal arithmetic unit in each line at each cycle are passed on in the manner of a shift register, so that for each line they are common to all phase shifters in this line vertical phase values the horizontal phase values are added and stored in the element memory and the calculation of the electrical costs for the Phase shifter of a radiator element, which is phase-wise by a certain amount from its row neighbors and by another certain amount from its column neighbors differs, traced back to an addition in adding units of the vertical arithmetic unit and the horizontal arithmetic unit is.

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BATH ORIGINAL

Phased array antennas consist aa s many individual radiators which are arranged on a flat surface in generally orthogonal rows and columns. For the electronic swiveling of the directional diagram, a line section with an electronically variable electrical length, the so-called phase shifter, is switched into the feed line of each radiator element. The phase shifters used in phase-controlled antennas, such as switching ferrites or switching diodes, are mostly of the digital type. With them, the detour determining the phase position is not continuous, but can only be set in steps. The detours are calculated in a phase computer and must be carried out so quickly that the operating speed of the entire system is not reduced.

In the radar application, the phase calculator works closely with the calculation of the current phases of each radiator element the central computer of the radar device.

The calculation and the setting of the Umv / ege can in principle continuously using an analog computer and analog phase shifter or clock-controlled using a Digital computer and analog or digital phase shifter take place.

The analog phase shifters have a disadvantage the mean deviation of the phase from the nominal value is quite large. This increases the mean sidelobe level of the antenna on too great a value.

In the case of a mixed (hybrid) version, an analog-digital converter is connected behind an analog computer. One such a system works about as fast as the purely analog arithmetic unit described above. The digital phase shifter in contrast to the analog phase

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BATH ORIGINAL

Build sliders with lower phase angle scatter. This phase shifter can be either with an analog or digital phase calculator work together.

In a purely digital phase calculator, the electrical detour for each radiator element is first calculated digitally. It is known to carry out this calculation individually at the location of each element. With the individual phase calculation the following calculation steps must be carried out:

1. Multiplication by a fixed value to form the Column phase.

2. Addition of the line contribution. The line contribution has already been determined in a separate arithmetic unit.

3. A division by A // L _Q "and passing on the division

Ul Cl JC

rests (λ = operating _{wavelength, A mQV} = largest wavelength used). However, this division and transfer is only required for phase shifters with line characteristics.

The multiplication is like in written multiplication in the decimal system to a sequence of additions and shifts. Accordingly, one can use the Build division on subtraction and shift.

Because with this purely digital solution, every element is a has its own arithmetic unit with individually programmed control, however, the implementation is extremely complex. .

From the German Offenlegungsschrift 2 062 896 a device for setting the phase shifter of a phase-controlled Antenna known to have a quick calculation

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a large number of phase values with low load on the central computer and with less effort than when setting up with one arithmetic unit per radiator element. It a quick switchover from one beam direction to the next is achieved. In this known device to calculate the vertical phase values of the phase shifters assigned to the radiator elements within the individual Lines a vertical arithmetic unit and a separate horizontal arithmetic unit is provided for each line. For each line become the horizontal phase values are added to the vertical phase values and stored in the element memories, with the calculation of the electrical detour / \ L for the phase shifter a radiator element, which is by a certain amount from its right and left neighbors and by a another certain amount differs from its upper and lower neighbors, on a continued addition in addition units the vertical arithmetic unit and the horizontal arithmetic unit is fed. Similar circuits can be used for the horizontal arithmetic units and for the element memories use any radiator element. Furthermore, there is a large frequency range that can be used. As a result of that the phase is not composed of columns and rows at the location of each radiator element in an individual arithmetic unit a large number of arithmetic units can already be saved.

The following is a brief consideration of the calculation rule for the beam direction.

Are used to control the antenna phase shifter from detour lines is used, the detour 2iL_ is calculated

Hi f XX

of a radiator in the m-th row and η-th column of one

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Antenna field according to the following algorithm:

= (m. H - kF) ₊ (n. V - cF) (1)

The following relationships are used:

cos γ (3)

cos $ (4)

The maximum operating wavelength of the phase shifters is denoted by yä _ ", the current operating wavelength by / i. The distance between adjacent horizontal radiators is d ^, the vertical neighbor is d. The coordinates of the radiation direction A of the antenna St, which lies in the plane xy, are described with ψ and T ^. The integer constants k and c are chosen so that the differences m »H - k« F and n * V - c »F are always less than one.

If the antenna direction is calculated according to equation (1), this is done in the purely digital solution with binary numbers. Provided that the radar pulses are not too short, these numbers are always smaller than one and have ρ digits. The smallest change in angle of the antenna in the vertical or horizontal direction, the so-called positioning accuracy, occurs when H and V of equation (3) or (4) are changed by the value 2 ~ ^p . The positioning accuracy Zy ₁ - y ₂ / or / $ j - # ₂ / is calculated for the two main directions from the equations:

. (cozy. - cosf ρ) (5)

x ^{J 'J}

Ζ (cosΛ - ^

Max .

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The positioning accuracy of a phase-controlled antenna, the beam position of which is calculated digitally with p-digit binary numbers, is therefore not only a function of the number of digits p, but also of the radiator spacing d or d, the maximum operating wavelength A _max and the deflection angle ^ ₁ or V ^ dependent. For example, the positioning accuracy for approximately vertical radiation is _r - a radiator spacing of

λ / 2 and a ten-digit binary number seven arc minutes. Max

If, on the other hand, it is emitted at an angle of y ^ or 'tr * of 20 degrees, it drops to 20 minutes of arc.

If digital phase rotators with q bits are used to set the beam direction, then q positions can be taken into account will. In order to reduce the effort for the antenna, the number of bits q of the phase rotator is generally smaller as the number of digits ρ of the binary numbers with which the antenna position is calculated. The calculated detour lengths can then only be set with less accuracy. As a result, the attainable secondary lobe attenuation of the antenna, but the desired main beam direction and thus the positioning accuracy remains in essential because the phase errors are very good for the main beam direction because of the digital phase rotator compensate.

The invention is now based on the object, in a device for phase calculation for an electronic Beam pivoting working antenna of the type explained above, a significant reduction in the technical effort for the many parallel working horizontal arithmetic units. According to the invention this is achieved by that with a bit number q 'of the phase shifter, which is selected smaller than the number of digits ρ of the binary numbers, an additional, a common horizontal arithmetic unit is provided for all lines, in which the last p-q- ^ 1 digits of all the horizontal arithmetic units assigned to the lines calculates v / er

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den, and that each of the horizontal arithmetic units assigned to the lines has a transmission device with which the transfer of the last p-q-1, in the additional horizontal arithmetic unit calculated digits to the digits in front of it, calculated in the respective line horizontal arithmetic unit is added to the respective binary number. The invention is based on the knowledge that when using phase shifters each with q bits, where the number q falls below the number of digits ρ of the binary numbers used for the digital calculation, the last p-q-1 digits of the p-digit binary numbers of the horizontal arithmetic units are equal to each other. This means that these points only have to be shared once for all horizontal arithmetic units be calculated.

It is possible without difficulty to assign the individual antenna columns to the horizontal arithmetic units. The vertical arithmetic unit then generates the phase values for the antenna rows.

For the working method and working speed, it is advantageous if the vertical arithmetic unit and the horizontal arithmetic units are in operation while the antenna is transmitting or receives, the horizontal arithmetic units connected in the manner of a shift register working simultaneously.

The new ones are expediently stored in the element stores Phase values only become effective after a switchover command on the phase shifters.

Further details of the invention are given below with reference to explained in more detail by drawings.

Fig. 1 shows a block diagram of that arrangement, which was based on the invention as the prior art is and

Fig. 2 shows a block diagram of a computing device according to the invention.

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1 shows a known matrix-like arrangement in rows and columns of element memories ESP, their memory values can be entered into associated digital phase shifter P with q bit for phase control of radiator elements S. The phase shifter P and the radiator elements S are only shown for two element memories ESP, but are provided for all element memories ESP. The Element memory ESP via a vertical arithmetic unit VRV to which the temporal control functions are fed from a radartakt control R, and each via a horizontal arithmetic unit per Antenna line, the timing of which is controlled in the same way. First, the vertical arithmetic unit VRW the vertical phase values of the individual lines are calculated. Then with a horizontal arithmetic unit HRW for each line adds the horizontal phase values to the vertical phase values and stores them in the element memories ESP. Here they are available for setting the digital phase shifters P. The onward carriage of the vertical phase values take place from the vertical arithmetic unit VRW into the various horizontal arithmetic units assigned to the lines HRW via a shift register SR, the number of stages of which corresponds to the number of lines or horizontal arithmetic units HRW is equivalent to.

The technical effort for such a phase-controlled antenna is greatly increased by the number of bits q of the phase shifter P. certainly. The number of bits q is therefore always kept so small that the resulting diagram distortions are just barely there can be tolerated. However, the method used to calculate the phase shifter setting may then do not result in any additional inaccuracy.

The vertical phase values are calculated using the following equation:

V _n = nV - KF (6)

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It is

V = * cos T / * vertical phase increment ^ max

d = electrical path between two vertically adjacent ones Antenna elements

= maximum wavelength used

n = 1,, N number of additions = line number

N = number of lines

K = 1, 2, 3, .... factor

λ = operating wavelength

V = vertical phase value after the η-th addition

F = ~ ^ ~ ratio of the phase difference f _min at the lowest operating frequency f _m i _n to the phase difference y> at the current operating frequency f. In the phase shift with frequency-independent electrical length of which is F = f _ ,. "/ f or F = Λ / _Λ β . if

. IuXXl IQaX

A = c / f and A _mQV = c / f. is (c = speed of light).

As the above equation shows, the vertical phase values V are obtained by adding the vertical phase increment n times

V = IdM) cos77 calculated. The term KF is subtracted until V_ becomes smaller than F = λ / λ _ην . The sizes V

XjL IQSIjC

and F are made available by the radartact controller R.

The individual V values are stored in the shift register SR in the individual stages, with each emitter line a value available ^ g ^ -8 8 A / 0 6 1 0

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In the vertical calculated value VRW, the horizontal phase increment H = fdL / yL, ^ cozy »and the normalized

V Xl IQaX / J

Operating frequency F calculates the difference K-F.

The values V, H and possibly H-F are sent to the horizontal arithmetic unit HRW passed on. A clock control is provided in which various pulses are generated that ensure that the processes in the vertical arithmetic unit VRW run correctly.

A separate horizontal arithmetic unit HRW is provided for each line, which adds m times the horizontal phase increment H = [& yJÄ λ cos Ψ to V, the respective vertical phase value, according to the following equation:

4 ^Lm ' ⁿ / * max = H _m = V _n + mH - c F (7)

It is

ΔLm, η = electrical detour of a radiator in the in-th Row and η-th column of an antenna field

V = vertical phase value of the η-th line

H ⁼ f ^d h / ^ max) ^cos Υ ^norizon ' ^fca l ^es phase increment

d, = electrical path between two horizontally adjacent antenna elements

m = 1, 2, ... M number of additions = column number M = number of columns
c = 1, 2, 3f. ·. factor

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F = Λ / Λ normalized wavelength

H = phase value after the m-th addition m

The calculation of the phase values within a line is practically the same as with the vertical arithmetic logic unit VRV in front of you.

From the phase values calculated in the HRW horizontal arithmetic unit the most significant bits are passed on to the element memory ESP. Here they are for setting the phase shifters P ready.

The phase setting is implemented by the digitally adjustable phase shifter P, which is divided into sections that can be switched between two different electrical lengths or phases. The length differences of the sections are like λ / 2: λ / k : XjQ : Λ / 16. With 16 phase values, the phase shifter P has, for example, four sections (^ -bit phase shifter).

The setting of the phase shifter P can be described in this example by a four-digit binary number. The phase setting of a radiator element in the nth row and mth column results from the equation

ALm, n // l _max = V _n + m H - c F (8)

from the addition of the two binary numbers V and m · H - c · F. Bei this addition, q + 1 digits of the binary numbers must be taken into account if the result is q digits, accordingly the q bit of the phase shifter P, should be exact.

Using an example, the last digits of all horizontal arithmetic units HRV / for a certain beam direction different

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be sought. It is shown that under the horizontal arithmetic units fulfilled the requirement that the number of digits ρ of the binary numbers is greater than the number of phase shifter bits q + is, the last digits of the binary numbers of the many parallel working HRW horizontal arithmetic units are the same. The number of common places is ρ - q - 1. Where ρ is the number of places the binary numbers with which the antenna direction is calculated. The number of digits ρ is corresponding to the desired Positioning accuracy selected.

Assuming that the positioning accuracy of the antenna a bit number ρ of the arithmetic unit requires 10, this corresponds to a positioning accuracy of about seven arc minutes with vertical radiation and a Λ / 2 distance of the radiators. In addition, the chart distortions allow the "choice." an A-bit phase shifter. E.g. a direction is set, which corresponds to a V value of., 000OLLOOOO and an H-Vert of., 00OLOOOOOL. Veiter is using an array antenna 16 rows and columns required. The number of oblique lines through the lines in FIG. 1 indicates that there number of bits to be transmitted.

The vertical arithmetic unit generates the following 16 V _{n ~ Yferts one after the other;}

^Y 1 ■., OOOOLLOOOO ^V 2 ., 00OLLOOOOO ^V 3 ., 0OLOOLOOOO ^V 4 ., 0OLLOOOOOO ^V 5 ., 0OLLLLOOOO ^V 6 ., OLOOLOOOOO ^V 7 ., OLOLOLOOOO ^V 8 ., OLLOOOOOOO ^V 9 ., OLLOLLOOOO ^V 10 ., OLLLLOOOOO ^V 11 ., LOOOOLOOOO ^V 12 ., LOOLOOOOOO ^V 13 ., LOOLLLOOOO ^V 14 ., LOLOLOOOOO ^V 15 ., LOLLOLOOOO ^V 16 ., LLOOOOOOOO 409884/061 0

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The individual horizontal arithmetic units take over the first five digits (q + 1) of the V _{n values and add the H n} values according to equation (8), which are calculated as ten digits.

For example, the AL "// L · values of the second and 16th Ho

m f χι nisx

rizontal arithmetic unit considered. These successively generate the following / ^

., 0OLOLOOOOL ÄL ^ _A * / A _mov ., LLOLOOOOOL

., OOLLLOOOLO., LLLOOOOOLO

., OLOOLOOOLL., LLLLOOOOLL

., OLOLLOOLOO., 0000000L00

., OLLOLOOLOL., 00OLOOOLOL

., OLLLLOOLLO., OOLOOOOLLO

., LOOOLOOLLL., OOLLOOOLLL

., LOOLLOLOOO., OLOOOOLOOO

., LOLOLOLOOL., OLOLOOLOOL

., LOLLLOLOLO., OLLOOOLOLO

•, LLOOLOLOLL., OLLLOOLOLL

., LLOLLOLLOO., LOOOOOLLOO

., LLLOLOLLOL., LOOLOOLLOL

., LLLLLOLLLO., LOLOOOLLLO

., OOOOLOLLLL., LOLLOOLLLL. , 00OLLLOOOO ^AL 1616 ^ max * » ^LL000L000 °

From the table above you can see that the last five digits of the 2nd and 16th horizontal arithmetic units HRW simultaneously calculated binary numbers are the same. This knowledge can be generalized: the last ρ - (q + 1) Digits of all binary numbers that are calculated simultaneously by the horizontal arithmetic units HRW are the same. In order to these last digits can be calculated in a single common arithmetic unit. The carryover of this common Arithmetic unit must be passed on to all horizontal arithmetic units, which then only calculate the first digits.

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the. FIG. 2 shows the block diagram of a phase computer according to the invention in which this knowledge is applied is.

With the exception of the horizontal arithmetic units HRW and HRW 1 or their connection, the arrangement according to FIG. 2 agrees with that one according to FIG. 1. The vertical arithmetic unit VRW is also designed for 10 bits, as is the shift register SR corresponds to that of Fig. 1, i.e. it is a 5-bit forward 3-shift register with one corresponding to the number of lines Number of stages. However, a horizontal arithmetic unit HRW is connected to each of the stages of the shift register SR, which is only designed for the first 5 bits. The last 5 bits of these horizontal arithmetic units HRW are common for all computers HRW are calculated in a common horizontal arithmetic unit HRW 1, which is controlled by the variables F and H. will. Between the output of the common horizontal arithmetic unit HRW1 and the input for the first 5 bits of the horizontal arithmetic units HRVi has its own transmission line Ü for this purpose. The number of slanted dashes through the lines in FIG. 2 each indicates the number of bits to be transmitted there.

The technical effort for the horizontal arithmetic units is thus a little over half compared to the known arrangement reduced.

1 claim
3 figures

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Claims (1)

Claim Circuit for phase calculation for one with electronic Beam pivoting antenna, which consists of radiator elements arranged in rows and columns, their current phase In each case via a digital, q-bit phase shifter using a digital multi-bit element memory is set, whereby for the digital calculation made with p-digit binary numbers the common vertical phase values of all phase shifters within the individual lines a single clock-controlled vertical arithmetic unit and for each line for the additional digital calculation of the horizontal, also made with p-digit binary numbers Phase values of all phase shifters per line each have their own horizontal arithmetic unit that works with the same clock is provided, one of which is assigned to an edge line with its vertical phase value input is connected to the output of the vertical arithmetic unit and which are interconnected in such a way that these vertical phase values at each cycle into the input memory of the next line-wise horizontal arithmetic unit in the manner of a Shift register are passed on, so that for each line to the all phase shifters in this line common vertical phase values the horizontal phase values are added and stored in the element memories and the calculation of the electrical detour for the phase shifter of a radiator element, which is phase-wise by a certain amount from its row neighbors and by another certain amount from its column neighbors differs, to an addition in adding units of the vertical arithmetic unit and the horizontal arithmetic unit. VPA 9/655/0001 409884/0610 - 16 - is returned, characterized in that that with a bit number q the phase shifter (P), which is selected smaller than the number of digits ρ of the binary numbers, an additional, a common horizontal arithmetic unit (HRW 1) is provided for all lines, in which the last ρ - q - 1 Setting of all horizontal arithmetic units assigned to the lines (HRW) are calculated, and that each of the horizontal arithmetic units (HRW) assigned to the lines has a transfer device (Ü) with which the carryover of the last ρ - q - 1, im. additional horizontal arithmetic unit (HRW 1) calculated positions to the preceding, in the respective line horizontal arithmetic unit (HRW) is added to the calculated digits of the respective binary number. VPA 9/655/0001 4 09884/0610
ORIGINAL INSPECTED