DE2322827A1 - IMAGE DISPLAY DEVICE - Google Patents

Description

Image Display Apparatus The invention relates to an image display apparatus which is a display board with a plurality of picture elements, each of which is in a stable on state or 7 in a stable off State can be, as well as control circuits for switching the picture elements includes.

Already there are image display panels and, in particular, plasma image display panels known which have a memory function.

These tables have the property that the picture elements are represented by i narrow pulse in the luminescent state or in the non-luminescent State can be switched.

For this purpose, a voltage to maintain the suminescence is common created for all picture elements. Such a display device is very suitable as a flat display device.

A disadvantage of this display device, however, is that the Picture elements in the display board can only have two switching states, namely en-tweder'ein-iumineszenden State or a non-luminescent state. Therefore, such boards are suitable not for display for images with halftone values of graded brightness. For television purposes therefore, such conventional display devices are not suitable.

It is therefore an object of the present invention to provide an image display device of the type mentioned, with which halftone images can be displayed, These The object is achieved according to the invention by an image display device of the type mentioned solved, which is characterized by an encoder for encoding the on the The instantaneous value v to be displayed and assigned to a picture element of the video signal using n weights g W ,, w2, w3 ..... Wn according to FIG Formula t T = K (a1W + a2W2 + a3w3 ...... anwn> where a1, a2, a3 ...... an 1 resp. Can be 0 and where K is a constant, and with a device for controlling the time intervals between switching on and switching off the picture element proportional to the respective weight w where the picture element for a = 1 in the picture below (k = 1,2,3 .. .. n) is switched on from a group of n images.

In the following the invention is explained in more detail with reference to drawings.

1 shows a schematic view of a conventional plasma display device; Fig. 2 is a graph showing control voltage waveforms; Fig. 3 graphical Representations of the signal waveforms for the operation of the device according to the invention; 4 shows an embodiment of the display device according to the invention; Fig. 5 a Y control part of a further embodiment of the display device according to the invention and FIG. 6 is a table for explaining the operation.

To explain the general idea of the invention, the introduction and shutdown in conventional plasma display devices will be described. Figure 1 shows a schematic view of a conventional plasma display device and Figure 2 shows the waveforms of the control voltage for the operation of this conventional one Plasma display device. FIG. 1 shows X control electrodes 2 and Y control electrodes 3 of the plasma table 1.

These are connected to control sections 4 and 5. Accordingly, that will respective picture element, which by the crossing point of a control electrode 2 and a control electrode 3 of the panel 1 is defined with a voltage according to FIG Fig. 2C applied.

The amplitude of the maintenance control voltage is chosen such that that they iN large enough to maintain the discharge until the respective one is switched on Picture element is turned off and that on the other hand it is insufficient, the picture element to turn on. Accordingly, the turned-on picture element keeps its lighting state due to the repetitive intermittent discharge according to FIG. 2D at, until the picture element is acted upon by a switch-off pulse. This is called Referred to as the memory function of a plasma board.

If, as shown in FIG. 1, a specific picture element such. B.

(x1, y3) is switched on, the control electrodes X2 (22) and x3 (33), which cross at the relevant picture element, a switch-on pulse P approach. These switch-on pulses become the maintenance control voltage superimposed.

This is shown in Figures 2A and 2B. The switch-on 1 pulse has a which is not sufficient to switch on the picture element, ie which does not extend to the amplitude Vf required for the initiation of a discharge. The picture element is only switched on if a switch-on pulse P is applied to both the associated X-electrode and the associated Y-electrode at the same time.

therefore, according to FIG. 2C, only the voltage on the picture element exceeds (X9, -r at the intersection of the two electrodes @ voltage Vf only this picture element (@ 2, Y3) switches on without the switching state the other Image elements is disturbed.

The shutdown procedure for shutting down the picture element takes place as follows instead of. A switch-off pulse Q is provided to switch off the picture element (X1, Y3). With this switch-off pulse Q, the electrodes become the one in area III of FIG. 2A and FIG. 2B is applied. It will be the two electrodes X2 and Y3, which are applied to each other at the picture element (x2, y3) cross. If the The amplitude and the time interval of this pulse are chosen appropriately, so will only the respective picture element (X2, Y3) is switched off without the others Picture elements are thereby disturbed.

When all picture elements are common in a plasma display device are applied with a maintenance control voltage, the picture elements by a narrow pulse in the switched on or in the switched off state be moved.

For the following description it should be assumed that all Picture elements are applied with the maintenance control voltage so that only the switch-on pulses and the switch-off pulses are considered. Hereinafter the halftone display device according to the present invention will now be explained. To simplify the description, the basic system, which of the present The invention is based on the following embodiment.

When a specific pixel of the plasma panel is turned on once is, the lighting condition is maintained until the image is turned off. Thus, the average brightness of the luminous point can be determined by a suitable choice the time interval between the switch-on pulse and the switch-off pulse will. One can control the average brightness based on time differences during a horizontal scanning period. According to the invention, the steering the average brightness during an image period while utilizing controlled by the characteristic properties of the plasma panel.

FIG. 3 shows a graphic representation to illustrate the basic system of the halftone display device according to the invention. A denotes the video input signal.

B denotes a switch-on control pulse with which the picture element is plotted on the k-key line for the video signal. C denotes a switch-off control pulse for all picture elements on the k-key line (line no. k). D indicates the indentation state certain picture elements on the touch line no. k.

FIG. 3 relates to the picture element i on the touch line k.

Here, a group of three images F1, F2 and F3 is used for the video signal Considered To simplify the description, it will be assumed that the images do not interlock (no interlacing). When interlaced is, the following explanation of the invention applies accordingly, where a Field is viewed as one picture.

The instantaneous value v of the video signal which the envisaged Pixel can be expressed as follows: v = K (a1w1 + a2W2 t a3W3) ^ where the symbols a1, a2 and a3 are 1 or O.

To simplify the description, it should be assumed that a purely binary code system is used, where w1 = 1; W2 = 1/2 and W3 = 1/4 applies. K means a conversion factor.

As shown in FIG. 3B, a switch-on pulse is generated when below Use of the coded signal a1 in the first image F1 or

a2 in the second image F2 or a3 in the third image F3 has the value "1 (i).

According to FIG. 30, a switch-off pulse arises regardless of the value of a1 or a2 or a3 calculated after a period of T seconds from the beginning of the Switch-on impulse for the first image or after a period of T / 2 seconds calculated from the start of the switch-on pulse for the second image or

after a period of T / 4 seconds from the start of the switch-on pulse for the third image, where T means a certain period of time, which is shorter than the picture period TF.

The duminescence state of the picture element concerned in the first to third image is shown in Fig. 3D and the total luminescence can be through the Expression a1.T + a2.T / 2 + a3.T / 4 can be specified. The one averaged over the three images by-! Average brightness can be represented as follows: B = K '(a1T + a2T / 2 + ag / 4) | K11 (a1 + a2 .1 / 2 + a3.1 / 4) 2 = K "(a1w1 + 22 + a3W3) The average Brightness, averaged over the three images, is the video signal encoded with 3 bits proportional, so that you can reproduce 8 different levels of brightness. This The principle is based on the halftone display system according to the invention. This halftone ad or halftone representation can be realized with a blackboard which only has two different operating states, namely a luminescent state and a non-luminescent state.

The following is an embodiment of the display device according to the invention are explained in more detail with reference to FIG.

The video input signal 100 is passed through an encoder 62 under the control of a clock 60 for each clock and coded. If a purely binary coder is used as the coder 62, then so ~~~~~~~~~~~~~~~~~~~ in shape ert i the Eodicrunr ln form of binary 1 numbers with three bits (a1, a2, a3 vkod ('he; }> That The overall picture can be satisfactory if a clock frequency is selected that is folfc = NH fH / (1-α) where NH means the number of picture elements displayed on a horizontal scanning line, where fH is the horizontal scanning frequency and a is the blanking value (or blanking ratio ) mean.

On the other hand, a vertical sync signal (102) is sent to an image counter 63, so that one after the other the image switching signals F1, F2, F3 for each synchronous signal are formed. The output signals of the encoder 62 are gated 66 is selected, the control by the output signals of the image counter 63 he follows. The first bit a1 of the encoder output signals is assigned to the first picture, the second bit a2 of the encoder output signals is assigned to the second picture and the third bit a3 of the encoder output signals is assigned to the third picture. That first bit a1 or the second bit a2 or

the third bit a3 is shifted into the X memory register 40, which is a shift register and its bit number is equal to that of the picture element number NH is. With each clock 61, the output signals of the encoder 62 reach the Gate circuit 65 to the shift register. Accordingly, at the end of a horizontal scanning period all pixel signals in the horizontal scan line are stored in the X storage register 40. The signals are entered into the X control register by a horizontal sync signal HD (lot) 41 convicted. Subsequently, the next picture element signal on the horizontal scan line stored in the X memory register 40.

The X control circuit 42 is implemented by a switch arrangement with NH switching units educated. A switch-on pulse generator 70 generates switch-on signals 71, which are due to of the output signals of the X control register 41 are passed and in parallel the X control lines 2 of panel 1 are in contact. On the other hand, the switch-on pulse arrives 71 to the Y control line, which corresponds to the horizontal scanning line of the video signal. This is done by actuating the Y control circuit 51 explained further below. Accordingly, z. B. in the case of the first picture the first bit a1, which comes from the output of the encoder 62, via the X memory register 40, as explained above, to the X control register 41 so that the picture elements on the touch line for the a1 has the value 1, are switched on in parallel.

Accordingly, the picture elements of the overall picture become depending on the above defined a1 bits are switched on to the same extent as the Y control lines 3 progressing for each horizontal sync signal through the one explained below Power-on pushbutton circuit 50 can be scanned. In the second picture or in the third picture the picture elements are correspondingly according to the a2 bits or according to the Bits turned on.

The key operations for switching the picture elements on and off are explained in more detail below. In the embodiment according to FIG. 4, the switch-on key circuit 50 and the switch-off key circuit 52 have bit numbers which are equal to the number Nv of the lines of the panel to be scanned. The switch-on key circuit 50 and the switch-off key circuit 52 are formed by shift registers, the shift clock corresponding to the horizontal synchronization signal 101. The Y control circuit 51 is a switching order with deFJqlfeuerMa / urg No. wets the switch-on signal Nv outputs. the A tuSe 71. which is provided by the switch-on pulse generator 70, due to of the 'output signal dc stage no. n of the switch-on pushbutton circuit 50, so that a switch-on pulse is generated. On the other hand, the kiisgan0s level Nr n the switch-off signal 76 which is provided by the switch-off pulse generator 1 75, due to the output signal the switch-off key circuit 52, so that a switch-off pulse is produced.

In the device according to FIG. 4, the first bit of the switch-on pushbutton circuit has 50 has the value "1" for each vertical synchronizing signal 102. This one bit is used at shifted each horizontal synchronization signal 101 by one step. Accordingly, will by the Y control circuit 51 which is controlled by the power-on key circuit 50 becomes, with each horizontal sync signal, the Y control line 3 of table 1 selected for one line and applied with the switch-on pulse.

The switch-off process will be explained below.

For this purpose, the output signal from stage m, stage m / 2 and taken from the stage m / 4 of the switch-on pushbutton circuit 50.

This output signal becomes the output signal of stage m for the first image or the output signal of the stage m / 2 for the second image or the Output signal of stage m / 4 for the third picture through a second gate circuit 66 selected, which by the output signals F1, B2 or, F3 of the image counter 63 is controlled. These selected signals are put into the first stage of the shutdown key circuit 52, where m = TfH, where T and fH have the meaning given pben.

In the switch-off key circuit 52 there is a shift by one step each time a horizontal synchronizing signal 101. Accordingly, the> signal becomes the shutdown cut-off circuit 52 by the following period of time compared to the m gnal the switch-on pushbutton circuit 50 is delayed: T seconds ie m-bit in the first image / 2 seconds, ie m / 2-bit in the second image and 2/4 seconds, ie m / 4-bit in the third image.

Accordingly, it is controlled by the shutdown key circuit 52 Y control circuit 51 a switch-off pulse of the respective Y control line 3 after expiry the following duration, calculated from the start of the switch-on pulse: T seconds for the first image; T / 2 seconds for the second image and? / 4 seconds for the third picture.

The amplitude of the switch-off pulse with which the Y control line 3 is applied, is selected so that all activated picture elements, which the respective Y control line 3 are assigned, switched off will. All of the picture elements assigned to the respective Y control line 3 become independent switched off by the video signal.

As mentioned above, in the device according to FIG. B.

the picture element of the row i on the touch line k is actuated in such a way that it z. B. switched on and is not switched off after T / 4 seconds. The first Picture is switched on based on the output signal a1 (k.i) = 1 of the encoder and the switch-off takes place after T seconds. The second picture is switched on on the basis of the output signal a2 (k.i) = 1 of the encoder and the switch-off takes place after T / 2 seconds.

In the third picture, it is switched on based on the output signal a (k.i) = 1 of the encoder and the switch-off takes place after T / 4 seconds.

Accordingly, that is averaged over the first, second and third images Brightness proportional to the brightness level of the video signal encoded with 3 bits. In the above description it was assumed that one field is represented as one picture when the television system is interlaced.

It is possible in the following way / halftone display for all types to carry out by touch line when interlacing, an embodiment for the interlace method is shown in FIG. Here are two groups of Key circuits are provided, which switch key circuits 50 and off switching key circuits 52 and gates 66 include.

The circuits 50A, 52A, 66A are the odd fields and the circuits 50B, 52B and 66B are assigned to the even fields assigned. The number of steps in the tactile circuits is equal to the number of tactile lines.

In Fig. 5, reference numeral 67 denotes a vertical sync separating circuit, which is acted upon by the vertical sync signal 102 and the sync signals 68A for odd fields from sync signal 68B for even fields separates.

The key circuit formed by the circuit parts 50A, 52A and 66A for odd-numbered fields and those by the circuit parts 50B, 52B and 66B formed key circuit for the even-numbered fields are each separated operated for each odd-numbered field or for each even-numbered field. The switch-on and switch-off pulses reach the light panel via the Y control circuit 51 1. The output signals of the Y control circuit 51 correspond to the number of scanning lines in the picture.

On the other hand, the outputs become F1, F2 and F3 of the frame counter 63 by the vertical sync signal 102 for each field in the order F1 F2, F3, F1, F2 ....... switched, whereby the time interval between the switch-on pulse and the switch-off pulse and the coded input signal of the X memory register 40 shown in FIG. In this way, a halftone representation is possible for each Field.

In the foregoing, the present invention has been made on the case of a conventional plasma display panel explained with a memory function.

Of course, the present invention is suitable for everyone another scoreboard with two stable states. The invention has been made above for the case of a pure binary coding system. However, you can also do others use discrete code systems such as B. the 1-2-2-4 code or various ne other code systems.

With the present invention it is possible to produce a positive image with a Display board depicting only two stable states, namely one has a luminescent state and a non-luminescent state, wherein image signals are displayed correctly with halftone brightness gradients. Furthermore, with the the device according to the invention the duration of each image element I, mentes in comparison significantly extended to the lighting time control systems for the horizontal duty cycle so that it is possible to obtain an image display with high brightness, ; although the luminous intensity of the individual picture elements is not so great.

The registers 40 and 41 can be used as a memory resistor or a control resistor and the register 50 or 52 can be referred to as a viewing transistor will.

Claims (9)

PATENT CLAIMS 1. An image display device comprising a display panel with a plurality of of picture elements each of which is in a stable on-state and can be in a stable off-state, as well as two control circuits for switching the picture elements, characterized by an encoder (62) for coding the picture element to be displayed on the display panel (1) and one picture element associated instantaneous value v of the video signal using n weights w1, w2, w3 ....... wn according to the formula v = K (a1w1 + a2W2 + a3w3 ----- + + anwn) where a1, a2, a3 ...... an can be 1 or 0 and K is a constant and with means (50,52,63,66) for controlling the time interval between activation and the elimination of the picture element proportional to the respective weight w, where the picture element for ak = 1 in the k-th picture (k = 1,2,3 ... n) from a group of n Images is turned on. 2. Image display device according to claim 1, characterized by a Switch-on (or switch-off) button circuit (50 or 52) to control the formation a switch-on (or switch-off) pulse; by means of a switch-off (or switch-on) button circuit (52 or 50) consisting of a shift register to control the formation of a Switch-off (or switch-on) pulse using the output signal of a predetermined Level of the switch-on (or switch-off) pushbutton circuit (50 or 52) as input signal for the first stage of the switch-off (or switch-on) pushbutton circuit (52 or 50) and through a gate circuit (66) for connecting the first stage the switch-off (or switch-on) notch circuit (52 or 50) with the output of the specific the respective image to be displayed assigned level of the Linschalt- (or. Switch-off) with load switch (50 or 52). 3. Image display device according to one of claims 1 or 2, characterized characterized in that the picture elements in the display panel (1) are two-dimensional in arranged horizontally and vertically. 4. Image display device according to one of claims 2 or 3, characterized by a vertical control circuit (51) their stages through the respective stages the switch-on pushbutton circuit (50) and the switch-off pushbutton circuit (52) are controlled and the associated horizontal lines of the display board (1) with a switch-on pulse generator (70) or a switch-off pulse generator (75). 5. Image display device according to one of claims 1 to 4, characterized through a shift register (40) for receiving the encoded video signals and through a control register (41) connected downstream of this and a horizontal control circuit (42) is connected downstream. 6. Image display device according to claim 5, characterized by a Gate circuit (65) for connecting the encoder g62) to the shift register (40). 7. Image display device according to one of claims 2 to 6, characterized by an image counter (63) for controlling the gate circuit (66) and / or the gate circuit (65). 8. Image display device according to one of claims 1 to 7, characterized marked that has nis function. 9. Image display device according to one of claims 1 to 8, characterized characterized in that for performing the interlace method a Circuit part consisting of a zin-switch pushbutton circuit (5GA), a switch-off pushbutton circuit (52A) and a gate circuit (66A) for the odd-numbered fields and a circuit part consisting of a switch-on push-button circuit (50B), a home-switch push-button circuit (523) and a gate circuit (66B) are provided for the even-numbered fields.