DE2305583A1 - STORAGE DEVICE - Google Patents

Description

The invention relates to a memory device with several memory banks comprising a multiplicity of memory spaces, each divided into one by a part (Prefix) of the association term addressable associative section, its content with the association term or is compared with an unmaskable part of the same in order to obtain information about the existence of a term and are divided into a non-associative section to include an associated term.

The effort for a pure associative memory in which the entire content is compared with the search term at the same time v / ird, is a multiple of the effort for a non-associative memory of the same capacity, because a comparator has to be added to each memory cell if one does not use the individual memory locations want to query one after the other, which would take a lot of time. Heine associative memories are therefore used in the Relation to other storage systems can always be expensive. In addition, they have pure associative memories that only contain a

Addressed search with the result YES or NO enable a relatively small area of application. Man can use it for sorting, for example. Usually it is more appropriate to use the actual associative (content-addressed) part a non-associative part

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which is controlled by the associative part, if the term you are looking for is included in it.

Such a divided associative memory enables real associative links. He can, for example for various assignment and translation tasks, for sorting and list processing, for the formation of chains of associations and much more, similar to the human way of thinking. An application as fast access memory between a relatively slow main memory and a fast processor became known through DT-OS 1 4-99 182.

Such associative memories also require a considerable amount of additional work compared to memory-addressing memories Storage, which is why they have not been used on a large scale despite other favorable properties. As is well known, however, every memory with memory addressing becomes an associative memory if you use the Addresses used as a means of association. The association term itself is not written into the memory, rather, it continues to be used for direct selection of a specific memory location. In the storage space however, a "written bit" is entered, the presence or absence of which provides information indicates whether the term you are looking for can be found in the memory or not. The remaining bit cells of the storage space are then available for the entry of an associated term.

A decisive disadvantage of this method is the mostly poor utilization of the memory, because in the Usually only a small fraction of all the terms appear that can be represented by the address bit.

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A method in which the term association is split into two parts is much cheaper. Of the one part is used to address a memory location, the other part becomes its content. If here as in The following is about the content of the memory or a memory location, this refers to the associative Part. As a rule, however, there is also a non-associative memory section for entering associated data Terms are present. The non-associative memory part will no longer be specifically mentioned.

To determine whether a searched term is contained in the memory, this term is used in the same way as disassembled into two parts during the enrollment process. One part is used again for addressing, the other Part is compared with the read memory content. This The comparison shows whether the term searched for was actually contained in the selected memory cell (hit or no hit). Since only the addressed memory space comes into question for the comparison, the one now required is Expenditure on comparison means is correspondingly low.

To make it easier to understand, the Pig. 1 shows the principle of such a memory. The complete Association term may consist of the bits a to h. The bits a, b c (prefix) are used for selection a memory location in the memory SP, into which the remaining bits d to h are written.

When searching for a specific term, it turns out that the bits d to h of the association term with the bit i.e. to h in the memory location selected by bits a, b, c match, the comparator supplies VR

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Signal (hit) that "the gates Ga to Gh opens. The entire term of association, possibly at the same time as an associated term, is then at the exit again, available. There is also the Possibility of only outputting the associated term together with a hit signal, since the association term already exists anyway.

The described procedure with the splitting of the association term into address and content part shows In addition to the advantage of relatively little effort, however, the disadvantage that the memory only has one term from a group of terms with the same prefix. With a random accumulation of such Similar terms, which can arise in particular in sorting tasks and list processing, can be used then no longer store other similar terms in the memory.

It was already in another context (patent application P 22 61 586.7) a memory device with a associative part (address part) and with several non-associative memory parts according to the type of memory in Pig. 1 suggested. This also results in a reduction in the risk of the memory being blocked an accumulation of the same or similar terms. This is because a maximum of η Include the same or similar terms (with the same prefixes). The same or similar terms are used then in a line selected by the prefix used as the address. Such a measure brings however, there is still no adequate solution to the accumulation problem.

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The invention is based on the object of a memory device which outwardly has all the properties of a true associative memory, but only one Requires a fraction of the effort required for this (hardware simulation of a real associative memory). The storage device should be designed in such a way that there is also a risk of dense occupancy the blocking of their receptivity by an accumulated Occurrence of the same or similar terms is reduced to a tolerable level.

Based on a memory device of the type mentioned, the invention solves the problem in that means are assigned to each memory bank, which derive the addresses from the association term in a defined, in each case the same, but in a different way from memory bank to memory bank cause pseudo-statistical distribution.

Advantageous further developments of the invention are characterized by the subclaims. The invention will will be explained in more detail below with reference to the drawing.

It shows in it

Pig. 1 the memory device already described at the beginning with an associative section in which a part the association term is used to address the relevant storage space,

Pig. 2 shows a schematic illustration to explain the memory space distribution in the memory arrangement according to the invention,

Pig. 3 shows a memory device according to a development of the invention and

Pig. 4 one of the pig. 2 similar representation to explain the "displacement method".

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To avoid misunderstandings it should be noted in advance,

that under the expression "prefix" always the one used to address memory locations in the associative section Part of the term association is to be understood, regardless of whether this part is a coherent bit " follow at the beginning, at the end or at another point of the association term or a selection of any bit from the concept of association.

Furthermore, it is assumed for the following that the memory device has several, for example eight memory banks owns. Each memory bank in turn contains a large number of memory locations, e.g. B. 64 to 256. The clarity because of only a few storage locations are shown in the drawing.

In a first embodiment of the · memory device according to the invention, for addressing the memory " For each memory bank, different but the same number of bit positions are used from the association term. If, for example, one assumes the provision of 256 memory locations per memory bank, for those. 8 bit addressing required. These 8 bits become the entire term of association, which is for example 24 bits may include, for each memory bank elsewhere taken. The selection should be made as randomly as possible. The order of individual bits can also be swapped will.

The specified type of address formation causes a certain association term in the various Memory banks are designated with very different numbers. If you connect the so-addressed

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If the memory locations of adjacent memory banks are conceptually one below the other, a "prefix line ^{11 is created} , which runs as an irregular zigzag line through the memory.

To explain these relationships, FIG. 2 shows a memory with eight memory banks BjZf to BS, each with eight memory locations 70 to P8, in which three prefix lines corresponding to the prefixes A, B and X are drawn.

Simply by deriving the memory address as described the risk of accumulation, especially during sorting processes, is already considerably reduced. Above all but it offers a basis for the application of an effective procedure for solving the accumulation problem by subsequent correction of the storage spaces. This procedure will be discussed in more detail later will.

A further reduction in the risk of accumulation (without the use of the method mentioned) results according to a development of the invention through the use of special address converters for address formation. To them the following requirements must be made: a) the address converter should reduce data from the carry out the offered association term. It should be made from as many bits of the association term as possible Address with an address that corresponds to the address range or the number of memory locations in a memory bank Form bit number.

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b) The formed addresses must be reproducible in a fixed manner Are related to the offered term of association.

c) The formed addresses should occur when counting sequences occur have a pseudo-statistical distribution.

The Pig. 3 schematically shows a memory device using an address converter. Deviating from the representation in Pig. 1 is the memory SP for the recording here of the entire association term with bits a to h (and possibly the associated term). Accordingly, the comparator VE must also be able to carry out the comparison across all bits a to h extend.

One in the example after Pig. 3 Part of the association term comprising bits a to f - the prefix - becomes dem Input of the address converter ADW supplied. The address converter uses this to form the address x, y, ζ for the control of a certain storage space in which - if it is not yet occupied - the association term during the write process is written in or the content of which is read during the reading process and offered to the comparator VR, which at In accordance with the present association term emits a hit signal on the line T. How nice based on the Pig. 1, the hit signal opens, for example, the gates Ga to Gh, see above that the searched memory content is now available for further use.

Would one for the whole store, i. H. provide only one address converter for all memory banks, then all would Lines of prefixes run in a straight line. Because of the

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Data reduction in the address converter also includes various prefixes can lead to the same addresses, the individual memory lines always have several straight lines of prefixes get lost. But even in such a pail, especially when counting sequences occur, a significant reduction in the number of collision cases occur when the address converter does the aforementioned Requirements met, for their implementation in addition to the less recommendable priority networks, parity generators, gate tables and ROM complexes with statistical distributed bit patterns are available. However, it is cheaper, especially with regard to the im In connection with the first embodiment of the invention already briefly mentioned method for subsequent Correction of the storage locations to assign a separate address converter to each memory bank. Of course there is one Such a measure only makes sense if all address converters work according to different translation algorithms. It This ensures that entries of association terms with the same prefix appear statistically distributed.

The prefix lines that connect the memory locations for the same prefixes in the different memory banks, now show irregular zigzag lines again, as was the case in Pig. 2 was shown. Different prefixes now no longer lead to the entire memory area, but at most within a memory bank to the same address.

In principle, in the case of free memory banks, incoming terms can be stored in any memory bank possible. In the case of partial occupancy, however, you must first check in which memory banks below

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the addresses delivered by the address converters are still free Storage spaces are available. This is for example on. easy way possible by having each storage space a bit position is assigned in which an occupied bit is set if and for as long as the storage space is available is occupied. Each time the memory locations are called up for the purpose of a new entry, all memory banks are removed from the associated address converters are controlled, the presence or absence of the occupied bit is checked. Included you get a list of memory banks for the term to be registered are still accessible. Any memory bank can be selected from these.

In practice, however, a selection device must be used which determines the memory bank selection Sets algorithms. Here comes a cyclical circulating distributor, the priority distribution in the direction of the lower value Speieherbank numbers and the statistical distribution in question.

The cyclically circulating distributor fills all memory banks almost equally, as does a statistical distribution mechanism. On the other hand, the priority distribution, which is probably most preferable, promotes a concentration in the direction of the lower-order memory banks when memory bank 0 has the highest priority. This means that the memory banks with the lowest numbers are filled first, the other memory banks are filled with decreasing density and the memory banks with the highest numbers initially remain completely free.

The measures described so far, proposed according to the invention, reduce the risk of the Memory due to purchase collisions.

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Your particular advantage is especially evident when the terms to be entered in the memory as a whole or in groups are subject to a certain systematics, for example thus represent counting sequences.

Nevertheless, neither a pseudo-statistical selection of bit positions from the association concept can lead to Address formation according to the first exemplary embodiment of the invention by providing special address converters completely eliminate the risk of accumulation. Due to the fact that different prefixes also point to the same Addresses, it can happen in unfavorable cases that all existing memory banks under one specific address are already filled, although only a few entries of terms with the same prefix have been made and there are still many storage spaces free in the memory.

Even if there is a blockage in memory for the entry of terms with a certain prefix under the The specified conditions are only met with a low probability., the risk of blocking increases naturally with increasing filling of the memory. One way of remedying this is to make a subsequent correction the storage spaces. In connection with FIG. 4, this method will be described in more detail below using an example be explained.

Regardless of the method used to select the memory banks for new entries, which are always only due Statistical considerations can be determined, an entry can be made on a particular case

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-12 storage space subsequently prove to be inexpedient.

In the attic after Pig. 4 with the memory banks up to B8 and the memory locations Έ0 to P8 per memory bank, two prefix lines, the Α line and the D line are shown. Small circles in the storage locations touched by these prefix lines indicate free locations, while the entries of double letters indicate occupied storage locations. File mean ijrt-e ~~ in ~ S! -Ig -. ^ 44 the first letter is the prefix and the second letter is the remainder of the terms.

According to the the Pig. 4 underlying assumption, all _e storage spaces on the prefix line D are already occupied, but only partially by entries with the prefix D. The other storage spaces contain terms with other prefixes. These terms are to be referred to below as "foreign terms". The existence of such alien terms is due to the fact that practically every storage space is an intersection or point of contact between different prefix lines. It should therefore be noted that the designation alien only applies in relation to the prefix line of interest, here the prefix line D, but in no way with regard to the prefix lines specific to these terms.

Should now another term with the prefix D, for example the term DV is written into the memory, it is first found on the prefix line and thus no more space for it in the memory. According to a development of the invention, one of the in relation on the prefix line D non-specific terms from the VPA 9/210/2034 -13-

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Memory removed and kept in an auxiliary register HR. The term DV pending entry is written into the memory space freed in this way.

For the example according to Pig. 4 displaced and in the auxiliary memory HR cached term AC must now be searched for a new place on the prefix line A. A such is found with memory location P2 in memory bank B5, which was previously free. The term AC becomes transferred from the auxiliary register to this memory location.

Since there is a possibility that a free storage space cannot be found for the term that was first displaced is un <J & aher possibly several displacement cycles must follow one another, it is necessary to have two auxiliary registers Provide for the intermediate storage of repressed terms or the auxiliary register for the inclusion of to interpret two terms.

If there are several alien terms on a line of prefixes are available that are eligible for displacement, for example, the selection for the displacement certain term according to one of the rules already mentioned for the selection of a memory bank for new entries take place. It is more advantageous, however, to use the prefix lines of all repressible alien terms before a displacement to check for free memory spaces, for example with the help of the already mentioned occupied bit. It is easy to see that in this way there is a higher probability of finding free storage spaces immediately, which can accommodate a content that has been displaced. Multiple displacement cycles will then hardly be necessary anymore, unless the storage tank has already reached a very high degree of filling.

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In the case of the displacement method or method for subsequent correction of the storage spaces described, therefore, apply following principles:

a) only terms of a different species can be displaced from a selected line of prefixes,

b) the displacement may only be along the prefix line of the entry to be suppressed,

c) No more entries can be made on a prefix line than there are blank spaces.

The last-mentioned restriction could lead to the assumption that the memory device according to the invention offers no advantages over the arrangement proposed in patent application P 22 61 586.7. That hits but not to what is most easily recognized by a comparison with the embodiment with - ^. dress changers leaves.

It is assumed that the association terms each comprise 24 bits and that each memory bank has 256 memory locations contains. The addresses for determining the memory locations must then consist of 8 bits. Since now according to the older proposal prefixes and addresses are identical, the result is a maximum of 2 identical prefixes. Taking now further that the address converters used according to the invention have an input width of 16 bits, so the prefix area also comprises 16 bits. Lead accordingly

a maximum of only 2 association terms with the same prefixes. Although the same addresses also result in different prefixes, there is always a correspondence limited to only one memory bank and for the final assignment of a prefix line are only the same

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Yorsyllables are decisive. The statistical probability for a complete occupancy of a Yorsyllable line and thus for a blocking of the receptivity of the Memory due to an accumulation is thus reduced by the factor 256.

4 figures

10 claims.

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Claims (10)

-16 patent claims ί1 / storage device with several, a variety of Memory banks comprising memory spaces, each divided into a part (prefix) of the association term addressable associative section, its content with the association term or with a maskable Part of the same is compared to obtain information about the presence of a term, and into a non-associative section are structured to include an associated term, characterized in that that means are assigned to each memory bank, which derive the addresses from the Association term in a defined, inherently constant, but different from memory bank to memory bank Effect manner with pseudo-statistical distribution. 2. Storage device according to claim!, Characterized ge indicates that for addressing the memory locations the same number of but different bit positions of the association term are used for each memory bank. 3 · Memory bank according to claim 1 or 2, characterized denoted that each memory bank is assigned an address converter which also has an address a bit number corresponding to the address range of the memory bank from a higher bit number of the Association term. 4 »Storage device according to claim 3, characterized in that the VPA 9/210/2034 -17- 40983 5/0401 education used translation algorithms in each Adrees converters are different. 5. Storage device according to one of claims 1 to 4, characterized in that for a new entry under the memory banks below the addresses formed still have free memory spaces, the memory bank with the (relative) lowest number is selected. 6. Storage device according to one of claims 1 to 4, characterized in that the Selection of a specific memory bank for a new entry from among the memory banks that have been created Addresses still have free storage spaces, is carried out by a cyclically circulating distributor. 7. Memory device according to one of claims 1 to 4, characterized in that the selection a specific memory bank for a new entry among the memory banks that are among those formed Addresses still have free storage spaces, according to a statistical distribution. 8. Method for eliminating an accumulation collision when inputting into the memory device after a of the preceding claims, in particular according to claim 2 or 4, which results when a new term according to its prefix in an already occupied by a term with a different prefix (foreign term) Storage space is to be stored, thereby identifying it t that the dissimilar term is removed and one of its own prefixes VPA 9/210/2034 -18- 409835/0401 speaking space is allocated in another memory bank and that the new term in the vacated Storage space is written » 9. The method according to claim 8, characterized in that that the prefix lines of all on the Vorsilbenlinie are twerden of men to be entered concept alien existing entries on free records verifiable and as long to find such, only those entries are dissimilar displaced, are available for the prop enes Vorsilbenlinien storage locations. 10. Storage device for carrying out the method according to claim 8, characterized in that the association memory has at least one auxiliary register for the inclusion of an association term and, if applicable, an associated term. VPA 9/210/2034 40983 5/0401