DE2302139A1 - MEMORY ARRANGEMENT USING MAGNETIC CYLINDRICAL SINGLE-WALL DOMAINS - Google Patents

Description

Storage arrangement using magnetic cylindrical Single wall domains

The invention relates to a storage arrangement consisting of a magnetic disk in which the magnetic cylindrical Single wall domains are created, forwarded and deleted, with multiple storage units for by magnetic cylindrical Binary information represented by single wall domains.

Storage devices of this type have already been described several times and has been proposed. Since this does not include measures that must be taken if faulty storage facilities are found are found, it can be assumed that in such a case the complete magnetic disk will be replaced in order to be able to continue operating the arrangement after replacement. There are also faulty storage devices in production has been eradicated by destroying appropriate magnetic disks. A correspondingly high rejection rate of manufactured magnetic disk assemblies is accepted. The attempt, however, to find faulty memory arrangements Searching for, locating and, if necessary, fixing on a magnetic disk is very time-consuming and therefore very time-consuming

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generally not portable.

Accordingly, the object of the invention is that Operational reliability of the memory arrangements mentioned at the beginning to increase, in addition, the reject rate is significantly reduced during manufacture; especially intended in auto diagnosis an error can be detected during operation and corrected depending on the diagnostic result.

According to the invention, this object is achieved in that, in addition to the normal storage units, at least one normally unused reserve storage unit is provided and that control means are mounted on the magnetic disk, which the Control the replacement of a regular storage unit by a spare storage unit in such a way that the replaced storage unit no longer serves for storage purposes.

A reduction in the number of rejects and an increase in reliability result from the provision of excess storage capacity, in which case the storage units, in the case of automatic replacement, simultaneously have the property and characteristics of the replaced Accept storage device. This means that a memory device of this type can be completely manufactured to then to correct errors that occurred during production and subsequently found, so that a significantly reduced Reject rate results.

On the other hand, there is the additional space required for reserve storage units is necessary, not so significant that the manufacturing effort or material requirements are significant could increase.

Another advantage is that the memory arrangement used during operation is able to correct an error that occurs by removing the faulty memory unit that is then determined is replaced according to the invention.

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In a preferred embodiment, each unit contains information storage the actual storage means in which the information in the form of occurring and missing magnetic cylindrical single wall domains, a write decoder for selective information input into the Storage means, a domain generator which is used to generate the information if it is not entered from outside, and a read decoder which, with the aid of sensing means in the Read information from memory. The sensed information is fed to a user group, which is known per se Way works. Wake up feeling the magnetic ones cylindrical single wall domains of the information either erased or transferred to the storage means for further storage entered, so that destructive and non-destructive reading of the memory arrangement is possible.

The reserve storage unit also has a write decoder, Storage means and a read decoder with corresponding sensing means. Thanks to the domain switches used herein the read and write decoders of the reserve storage unit or the reserve storage units are able to property and to assume the characteristics of the memory unit found to be defective by applying the same control pulses supplied to both the domain switches of the normal storage units and the domain switches of the spare storage units will. However, this means that in the event of a faulty memory unit not the entire memory arrangement is affected, so that the operation can be continued without interruption after a corresponding switchover can.

Control means are provided to supply necessary clock signals to the various drivers of the system and thus to a to ensure strict synchronization of the entire system.

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According to a further concept of the invention, an automatic test device can be provided in order to determine errors that occur and in response to this, activate corresponding switches and domain switches in order to use the reserve storage unit or store the spare storage units in the correct manner in place of the defective storage units.

Further advantages and features of the invention emerge from the following description of exemplary embodiments the drawings listed below and from the claims.

Show it.

Fig. 1

the block diagram of a memory arrangement according to the invention,

Fig. 2

a schematic representation of the write decoders assigned to the memory units,

Figs. 3 and 4

one domain switch each,

Fig. 5

Details of the decoder for the storage units,

Fig. 6

a section from the storage system shown in Fig. 2 with an external switch control,

Fig. 7

a block diagram of an automatic test device for the memory arrangement according to the invention ,

The block diagram shown in Fig. 1 shows several storage units 1, 2, ..., N, which are on a magnetic disk

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10 are attached, which in turn can consist, for example, of a garnet or orthoferritic material, as is customary is known. In addition, a reserve storage unit is provided in order to avoid the overdimensioning of the inventive Expressing single wall domain storage.

As can be seen from the individual representation of the memory unit 1, each memory unit consists of a domain generator Gl, a write decoder WDl, a read decoder RDl, sensing means Sl, the actual memory, in this case a slider register SRI _f separating means CLl and two domain eliminators AIa and Alb.

In addition to the above-mentioned storage units, there are also various driver circuits on the magnetic disk 10. A forwarding field "Source 12" is used to forward the magnetic cylindrical single wall domains in the magnetic disk 10 depending on its field direction in the disk plane. Of course, the forwarding field can also be passed through Provide appropriately designed cable runs. In this In this case, the forwarding field source would be replaced by a driver which, under appropriate control, feeds currents to the cable runs around the magnetic cylindrical single-wall domains forward in the desired manner. Furthermore, the domains can optionally be placed at corresponding points on the magnetic Generate and destroy disks 10 in order to obtain an information display in this way.

A bias field source 14 provides a bias field H ready to make the generated magnetic cylindrical

Stabilize single wall domains. The bias field source 14 can consist of a special coil that surrounds the magnetic disk 10 or a permanent one Magnets or another magnetic layer that rests on the magnetic disk 10. The control circuit 16 supplies clock

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pulses to the relay field source 12 and to the bias field source 14 to operate these sources in the desired manner.

A write driver 18 supplies the current I n to the domain generators Gl, G2, -..., GS in order to provide a pattern of magnetic cylindrical single-wall domains in response to signals supplied by the write driver 18. As already mentioned, the input information supplied to each storage unit can originate from another magnetic cylindrical single-wall domain device, instead of being generated originally by the domain generators G1 and G2 etc. The domain generators work in a manner known per se, as they do on others
Places is described many times.

A decode driver 20 supplies current pulses I _QA and I to the
different write decoders WDl, WD2, ... WDS. The number
the current-carrying conductors to the decoding circuits depends on the number of memory units in the respective memory arrangement.

A sense current source 22 provides the sense pulses I for each Sensing unit S1, S2, ..., SS. In a preferred embodiment, the sensors consist of magnetoresistive sensing elements, which are also described in detail elsewhere. For a better understanding, just say so much here: that when a magnetic cylindrical single wall domain occurs in flux coupling proximity to a magnetoresistive sensing element a change in resistance is brought about here, which has the effect of a change in current or voltage and accordingly can be recovered.

A reject stream source 24 provides the reject stream
I _0,. for the separation means CLl, CL2, ..., CLS ready. In
preferred embodiments consist of the separation means

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each from a domain switch, as shown in Fig. 3 or 4 which is capable of either returning magnetic cylindrical single wall domains to either the storage unit or to be transferred to the respectively assigned extinguishing means for deletion.

The control arrangement 16 also provides pulses to the write driver 18, to the decoder driver 20, to the sense current source 22 and to the reject current source 24. Those by the control arrangement 16 supplied pulses ensure perfect memory synchronization.

As already said, the domain cancellers AIa, Alb, A2a, A2b, ..., ASa, ASb, to delete the magnetic cylindrical Single wall domains with appropriate control of the disposal means and the write decoder at each storage unit. In detail, the domain triggers AIa, ..., ASa destroy magnetic ones cylindrical single wall domains from the various write decoders WDl. ..., WDS, whereas the domain cancellers Alb, ... ASb destroy magnetic cylindrical single-wall domains from the various separating agents CLl, ..., CLS.

Each storage unit including reserve storage unit corresponds in its structure to storage unit 1. In addition, however, provision is made to ensure that a reserve storage unit can be used instead of any other storage unit 1, 2, ..., N if one of these fails.

Basically, the mode of operation of the memory arrangement shown in FIG. 1 is the same as that already used in other places is described, with the exception, however, that an excess of storage capacity is provided in the present case. In the representations 1 and following are the forwarding paths for magnetic cylindrical single-wall domains indicated by thin lines with arrows, where current-carrying conductors go

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are shown by strong lines.

The binary information represented in each case by a corresponding pattern is obtained, as already stated, from the absence or occurrence of magnetic cylindrical single-wall domains, such as those generated, for example, by the domain generators Gl, G2,..., GS. This domain pattern is created by the current pulses I _T. of the write driver 18 is controlled. The single wall domain

Pattern is then sent to the write decoders WD1, WD2, ..., WDS forwarded. Depending on the write pulses and I ^ _, from the write decoder 20, the cylindrical Lin ~ cell wall domains either to a domain extinguisher AIa, A2a, ..., ASa, in unselected storage units or but in the storage device (shift register SR) of the selected Storage unit. In other words, the information is only sent to one shift register at a time fed. Domains assigned by unselected shift registers Generators are thus transferred to the domain cancellers AIa, A2a, ..., ASa.

In the memory arrangement shown in Fig. 1, the memory means exist for the various storage units made up of shift registers, such as the shift register RSl. It goes without saying however, that the storage means in the storage arrangement according to the invention do not necessarily consist of a shift register need to exist, but can just as well consist of corresponding points on the magnetic disk 10, where magnetic cylindrical single wall domains can be generated selectively or optionally instead of being forwarded from there. The magnetic Single wall cylindrical domains follow a forward path 26 from the write decoders to the domain triggers AIa, etc. or the forwarding path 28 to the shift register SRI, etc.

Made by a corresponding pattern of magnetic cylindrical

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Information shown in single wall domains is forwarded in the storage means used here and finally enters a write decoder that is assigned to each memory unit.For example, the write decoder RD1 sends magnetic cylindrical single wall domain information either via forwarding path 30 to shift register SRI or to sensing means S1 via forwarding path 32. The forwarding path taken by the magnetic cylindrical single wall domains after passing through the decoder RD1 depends on the current pulses supplied by the decoder driver 20. After sensing by the sensing means S1, the domain pattern follows the forwarding path 34 to the AusondarungsmitteIn CLl. As already stated, these separation means consist of a domain switch which either transmits the domains to a domain canceller Alb via forwarding path 36 or via path 38 to the shift register SRI. The selection of the transmission path of the magnetic cylindrical single wall domains after passing through the separation means CL1 depends on the current pulses I _{CL from} the emission current source 24.

The memory arrangement is thus characterized by memory means with assigned write and read decoders, which can optionally Information transferred to the storage means or taken from it in response to control signals from external Circuits of the magnetic disk 10 are supplied.

The mode of operation has been described above for a one-chip memory without specifically mentioning the oversize precautions are. The reserve storage unit or units, which are also arranged on the magnetic disk 10, serve for this purpose. If a defective storage unit is found during production or afterwards, then the reserve storage unit is used activated and used in place of the faulty memory unit. In other words, the faulty storage unit no longer performs an information storage function but

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takes their place entirely to a reserve storage unit away. In the preferred exemplary embodiments, the read and write decoders are also assigned to the reserve unit are specially activated to also replace the read and write decoders of the faulty memory unit.

FIG. 2 shows a more detailed diagram of the memory array shown in FIG. 1, but particularly the area the write decoder WD1, WD2, WDS. Although only four storage units and a spare storage unit are shown, it goes without saying that additional storage units including reserve storage units can be provided in a corresponding manner. In the present illustration, the storage means are as shift register SRI, SR2, ..., reserve shift register RSR shown. The domain generators Gl, G2, ..., GS are each assigned. Every shift register are natural Read decoder and write decoder assigned. For example, the left decoder RD1 for shift register 1 consists of the domain switches SWl and SWl, which are identical to the domain switches SWl in the write decoder WDl. These domain switches are used for Selection of the transmission paths of the magnetic cylindrical single wall domains and will be discussed in detail later with the representations of FIGS. 3 and 4.

During operation, they move through the various domain generators generated domain patterns to their respective write decoders. Depending on the directions of the current pulses I and I get the magnetic cylindrical single wall domains either to a selected shift register or to the domain cancellers AIa, A2a, etc., which not everyone selected shift register are assigned. The information generated by the domain generator GS is always sent to the domain canceller Transfer ASa, if the reserve storage unit does not use one of the other storage units in the event of a failure has to replace.

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In detail, the information is entered into the various shift registers, as is determined by the direction of the decoding current pulses I ^{un <} ^ ^ v-. For example, the information from Xiornänengenerator Gl is only transferred to the shift register SRI if the currents I and I are in reference

* 'direction, as in FIGS. 3 and 4 shown. Normally is namely the upper Keiterleitungspfad with uen Domainv / calibrated SW1 effective to transfer the supplied magnetic cylindrical single-walled Danianas to the shift register SRI, if both currents I and I are in the reference direction, as soon as the raagnetic cylindrical single wall domains through the respective points SWl arrive in WDl.

if one of the four storage units in FIG. 2 fails, the spare storage unit takes effect. Regardless of which combination of current directions of the currents I _DA / I _DB occurs, the magnetic cylindrical single-wall domains are always transmitted from the domain generator GS to the domain canceller ASa. The write decoder WDS contains the electrical switching devices SAl, SA2, and SBl, SB2, which can be operated selectively in order to obtain closed or open circuits.

Of course, the write decoder WDS is the other write decoder WDl, ..., WD4 same. In the same way, the read decoder RDS consists of domain switches like WDS and is also set up to replace the respective failing read decoder.

As detailed below, the switching devices SAl, SA2, SBl and SB2 from transistor circuits or similar switching means exist, which by their nature are capable of providing open and closed circuits, depending on which line they are in. The operation These switching devices take place under separate control, ciie in response to received information from a test

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f tings facility becomes effective, which is specifically used for this purpose will / detect a faulty storage unit. Of course, manual actuation can also be carried out due to magnetic detection or visual inspection is done to determine possible sources of error.

Defective storage units can be detected during production, e.g. by using an ilicroscope, .to locate errors in a particular decoder or register. Furthermore, electronic test equipment can be used by means of which known domain patterns are entered into each shift register. In this case, the Sensing means checked the output of each shift register to determine whether a correct reproduction of the in the Spexcher details entered information is present. In addition to this, auto-diagnostic tools can be used to monitor during normal operation of the memory arrangement periodically to check whether errors occur in one of the Spexcher units. In in this case, the shutdown states of the switching devices SAl, SA2, SBl and SB2 in the reserve write "and read decoders changed automatically, if necessary for a faulty one Storage unit can be used.

The FIGS. 3 and 4 show the domain switches SW1 and SW2, which are shown in FIG the write and read decoders of each memory unit are used. The switches consist essentially of the soft magnetic strip elements 40, preferably permalloy, on the magnetic disk 10 in a corresponding arrangement are knocked down by known means. Each domain switch is also assigned to a conductor 42 that carries a current I to able to lead. Depending on the direction of the current, the magnetic cylindrical single-wall domains fed to a domain switch follow one of the two wext extension paths that can be defined by the switches. The in FIGS. 3 and 4 displayed Current direction represents the reference direction (positive)

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Due to the arrangement of the soft magnetic elements in the domain switches, the magnetic cylindrical single wall domains each follow an upper path in the absence of a current. This is due to the "fact that the pole 2 ¹ on the soft magnetic strip 401 is closer to the pole 1 on the I-shaped strip 40 than is the case for the pole 2 'on the I-shaped soft magnetic strip 40 I.

3 shows a domain switch SVvI in which normally the upper forwarding path is effective. That is, cylindrical magnetic single wall domains that are applied to the domain switch SW1 arrive in the direction of arrow 44, normally continue to migrate in the horizontal direction to the domain switch SWl to leave in the direction indicated by arrow 46. This also applies if the current I is in a positive direction flows through the conductor 42. However, if the current I flows through it in the negative direction, then the magnetic cylindrical single wall domains follow a forwarding path as indicated by arrow 48. That is, the magnetic cylindrical single wall domains move towards pole 2 'on the T-shaped strip 4OT and not towards the Pole 2 'on the I-shaped strip 401. This change in the further extension path is based on the effect of the magnetic field, which is due to the current I in the conductor 42.

4 shows the domain switch SW2, in which the lower conduction path is normally active when a current I flows through the conductor 42 in the reference direction. This means that magnetic cylindrical single-wall domains which get into the domain switch along the forwarding path indicated by arrow 50 normally follow the magnetic poles 1, 2 "on the T-shaped strip 40T and then the domain diverter again via the forwarding path indicated by arrow 52 due to the effect of the magnetic field caused by current I. Only if ^the direction of the current I is negative or if none

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Current occurs in conductor 42, the magnetic cylindrical single wall domains follow the poles 1, 2 'on the I-shaped strip 40 and leave the domain switch SW2 along the forwarding path indicated by arrow 54.

As can be seen from FIGS. 3 and 4 are the arrangement patterns of the soft magnetic strips in both domain switch types same. However, it can be stated that there are differences in the Line routing of the conductor 42 are provided. It goes without saying that preferred forwarding paths pass through these domains can easily be provided in that the geometry of the arrangement of the soft magnetic strips and the lines of conductors 42 is changed. As a result, other types of domain switches can also be implemented with modified forwarding paths.

Referring now to Figure 5, the interconnections of the domain switches are detailed SW1 and SW2 and the other routing path elements shown. To repeat in the description To keep these drawings to a minimum, the arrangement patterns of the soft magnetic stripes are only for write decoders WD1 and WD2 shown in detail, it being understood that the connections for the other write decoders in are carried out in the same way. It is also noted that the read decoder for each memory unit has the same structure as the write decoder for this memory unit. From this Basically, the special interconnections for these domain switches of the read decoder are not shown / because they are would result in a duplication of the write decoder for this memory unit. The magnetic disk is also a further simplification 10 not in. 5 shown.

In the arrangement shown in FIG. 5, the magnetic cylindrical single-wall domains produced by the generators arrive to the write decoders and are assigned to the corresponding Transferring shift registers or to a domain canceller

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like Ala. These domain triggers are described in detail elsewhere and work as follows: A magnetic cylindrical single-wall domain reaching the domain tripping device AIa moves to the pole positions 2, 3 and remains there _f as long as the magnetic relay field H is aligned in the directions 2 and 3. Since the pole position 4 is sufficiently removed from the bend of the L-shaped strip, the magnetic cylindrical single wall domains are not able to move into pole position 5 when the magnetic relay field H rotates in this corresponding direction. uh _r the cylindrical magnetic domain is single wall it were trapped this L-shaped strip at the crease and held. If the magnetic transmission field H then rotates in direction 4, then a magnetic field in the same direction as that of the bias field H is generated at the bend of this domain eliminator, so that the magnetic cylindrical single wall domain captured here is brought to collapse.

If the shift register SRI is used for the purpose of explanation, then the cylindrical magnetic single-walled moraines normally follow the upper forwarding path between the switches SW1 and reach the shift register SRI via the forwarding path indicated by arrow 28. These magnetic cylindrical single-wall domains pass on to the read decoder RD1 and then follow along the transmission path 32 to the sensing means S1 when the direction of the currents I and I,. _T assume the reference direction, specifically in the conductors that are assigned to aem reading encoder RD1. If these currents flow in the regative direction, then the magnetic cylindrical single-wall domains are brought back to the shift register SRI via forwarding path 30. After sensing by the sensing means S1, the magnetic cylindrical single wall domains follow the forwarding path indicated by arrow 34 and thus reach the separating means CL1. The disposal CLl provide other stream-controlled Jomänen turnouts with two

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Output forwarding paths represent, which are each effective depending on the direction of current flowing through. In the exemplary embodiment shown, CLl is constructed in the same way as the domain switch SWl, the magnetic cylindrical single-wall domains normally following an upper conduction path through CLI and exiting at the conduction path indicated by arrow 36 when the current I flowing through CLI has the reference direction. In this case, the magnetic cylindrical single wall domains are captured and destroyed by the domain extinguishers Alb. If, however, the current I _{f <T flows} in the regative direction through the separation means CL1, then the magnetic cylindrical single-wall domains follow the transmission path 38 and get back into the shift register SRI.

The other storage units in the storage arrangement operate in the same way as the storage unit 1 and are therefore not further described. As already mentioned, if a fault occurs in a storage unit, the reserve storage unit occurs in their place and then stores the information originally intended for the defective storage unit.

FIG. 6 shows a section of the arrangement according to FIG. 2 and specifically a part of the write decoder WDS. Fig. 6 illustrates the use of the reversible switching devices SAl, SA2, SBl and SB2. As I said, these switches can be common Be transistor switches, e.g. bistable resistance elements, etc., which are known per se. The switch control A is used for optional Control of the switching devices SAl and SA2, while the switch control S, the switching devices SBl and SB2 controls. Of course, the switches can also be non-reversible switches, such as switch-type ladder elements that Ensure that the circuits are permanently open after the corresponding currents have been applied.

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ills example let us mention a laser beam, which a line no The piece burns to create an open circuit. However, the application has obviously been more reversible Switches with two different resistance states, larger ones Convenience and adaptability. For example, the read reserve storage unit can be used as a replacement for an initial faulty one Storage unit at a given first point in time and for a second faulty storage unit at a specific one use the second time.

FIG. 7 shows part of the memory arrangement according to FIG. 1, only some components being shown for the sake of clarity. In this case, the memory fineness 1, 2 and the reserve storage unit are located on the magnetic disk lü. Line automatic test capture device 6ü is used to detect a defective memory unit, if such is present at all, and to output an output signal on conductor 62 in order to actuate switch control A and switch control B. It goes without saying that the switch control units change both the write and read decoders of the reserve control unit in such a way that they can replace the faulty memory unit. The automatic test device 60 could for example consist of electronic means which _{transmit a fixed pattern of current pulses I w} to each domain generator Gl, G2, ..., Gn in order to then receive a corresponding response at the sensor outputs of each memory unit. Depending on which memory unit is defective, the automatic test device 60 supplies the necessary signals to the various switch controls A and B in order to then automatically switch on the reserve memory unit and thus keep the memory arrangement functional.

A complete chip memory device with backup circuits has been described. It should be noted that the mentioned Chip storage units together with a reserve storage

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are given by way of example only. For example, more than one reserve storage unit can easily be used for each group of four shift registers can be provided. In addition, the Reserve storage unit in time allocation with several storage units cooperate in response to appropriate clock pulses.

The special storage units can consist of ring buffers or from open shift registers. A storage unit can also consist of a domain creation device in which magnetic cylindrical single wall domains can be optionally generated and destroyed, depending on which binary information is stored shall be. Furthermore, the reserve storage units can also be activated other than by cable runs; that's the way it is E.g. possible to transfer magnetic cylindrical single wall domains to locally selected places in order to create animal effects from domain to domain if a replacement is to take place.

When operating the arrangement according to the invention, it can be possible to completely switch off a shift register that turns out to be faulty. This is easy to do, by selectively one of the strip-shaped elements in the routing path between the generator of this storage unit and the actual storage means of this storage unit is removed. This ensures that no special information comes into effect through this faulty storage means. Another The method for this is that the appropriate control circuits, which are used by sensing means in a faulty memory unit originating information, ignore.

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Claims (1)

- 19 P A U. E Ι-ϊ T A ϊ, SPRÜCHE 1.1 Storage arrangement consisting of a magnetic disk, in which magnetic cylindrical single-walled moraines are generated, be forwarded and deleted with multiple storage units for through magnetic cylindrical single wall domains represented binary information, characterized in that in addition at least one normally unused Reserve storage unit (RSR) is provided and that control means (SW) are attached to the magnetic disk (10) that replace a regular storage unit (SRI to SRcI) with a reserve storage unit (RSR) control in such a way that the replaced storage unit no longer serves for storage purposes. z. Arrangement according to claim 1, characterized in that the control means (SVv) measures are assigned to ensure that the reserve storage unit (RSR) in the event of a replacement property and characteristics of the replaced memory unit. 3. Arrangement at least according to claim 1, characterized in that the storage units (SRI to SRIJ) and reserve storage unit (RSR) each control means (SW) for forwarding magnetic cylindrical single wall domains via multiple forwarding paths, where the Control means (SW) provide the same forwarding paths for replacement in the reserve storage unit (RSR), as in the replaced storage unit. 4. Arrangement at least according to claim 1, characterized in that both in the memory units (SRI to SRN) as well as in the reserve storage units (RSR) Doraän turnouts (SVi) are used, both of which have outputs (32, 3u) a domain eraser (Al) and a domain 309847/1012 YO -J 71 1U2 Usage area (SRI) are assigned, and which become _{effective depending on the assigned current pulses d DÄ} f I _DB ). 5. Arrangement using I- and T-shaped soft magnetic Forwarding strips on the magnetic disc interacting with one in the plane the magnetic disc discontinuously rotating relay field according to claim 4, characterized / that with one input (44) and two output forwarding paths (46, 48) an output forwarding path (46) in extension of the input forwarding path path (44) is arranged by two first I-shaped soft magnetic strips (401) behind one another at a distance the order of magnitude of a domain diameter (BD) in the alignment of the first relay formed thereby processing path (44 to 46) are arranged that in the gap between the first two I-shaped soft magnetic Strip (401) which lies one end of the cross piece of a T-shaped soft magnetic strip (40T), wherein the cross piece is perpendicular to the two I-shaped strips (401) that parallel to the first passing processing path (44 to 46) relatively distant second forwarding path (44 to 48) the foot of the T-shaped soft magnetic strip (40T) close to the magnetic flux coupling of the second Weiterlei processing path (44 to 48) is arranged, wherein the free foot end of the T-shaped soft magnetic strip 4OT in the vicinity of the gap between the two second I-shaped, in the direction of the second transmission path (44 to 48) aligned, soft magnetic strips lies / that in the middle of the gap of the two second I-shaped forwarding strips the free end of one first I-shaped soft magnetic strip oriented perpendicular to the forwarding direction, whose free end of the first forwarding path (44 to 46) 102 309847/1012 is directed away that perpendicular to the first forwarding path (44 to 46) each to the center of the direction of the first forwarding path (44 to 46) I-shaped strip (401), a second and third I-shaped soft magnetic strip in the vicinity of the magnetic flux coupling are arranged, which are directed away from the second forwarding path (44 to 48) and that perpendicular an electrical conductor (42) is arranged in relation to the forwarding paths, which conducts at least the cross piece of the T-conveyor migen soft magnetic strip (4OT) covered. 6. Arrangement according to claim 5, characterized in that the electrical line (42) is led vertically up to the second transmission path (50 to 52), in the first Kink an I-shaped strip in the direction of the second forwarding path (50 to 52) covered, in the second bend perpendicular to the first forwarding path (50 to 52), there in the third bend one in the direction of the first forwarding path (50 to 54) oriented I-shaped strips and in the fourth bend the transverse piece of the T-shaped soft magnetic strip (40T) is covered, in the fifth bend runs parallel to the forwarding paths, in the sixth bend on the first perpendicular to the first Forwarding path (50 to 54) oriented I-shaped soft magnetic strip leads and this partially covered, in the seventh bend parallel to the first forwarding path (50 to 54) up to an extension of the vertical supply line (42) runs in an eighth bend perpendicular to the forwarding paths as an extension of the cross piece of the T-shaped soft magnetic strip (40T) from the transmission paths. 71 102 30 98 47/1012 Arrangement according to Claim 5 and Claim 6, characterized in that, when used as a read decoder (RDl), the first output (32) leads to the sensing means (Sl) and the second output (30) leads back to the shift register (Rl) in which the cable runs are under appropriate pulse control (l " _DA f ¹ Qr). φ · Arrangement according to Claim 5 and Claim 6, characterized in that when used as a write decoder (WDl) the first output (26) is connected to domain cancellation means (AIa) and the second output (28) is connected to the shift register (SRI) by the cable runs are under the appropriate impulse control (I _DÄ , I _DB ). 9. Arrangement according to claims 1 to 8, characterized in that that a test device (60) is provided for testing the memory units with their decoders is and the means (62, A, B) in response to the test device (60) are provided to a To put reserve decoder in the same switching state as in one of the tested decoders. 10. The arrangement according to claim 9, characterized in that the reserve decoder in its lines Contains reversible or non-reversible switching means that selectively under appropriate control can assume high resistance properties. 309847/1012 YO 9 71 102 Blank page