DE2256697C3 - Circuit arrangement for expanding a code from 1.10 to the power of 6 to 7 .10 to the power of 6 codes by deliberately reversing the code signals - Google Patents

Description

The invention relates to a circuit arrangement for expanding the coding from I ■ 10 "to · 10 * possibilities by recoding a seven-digit into a six-digit phone number, with the The seventh digit placed in front of the prefix enables a switch to five additional ringing frequencies.

In the case of call services that use a six-digit call number, the coding option is limited to a number of I · ⁶ codes. But now it increases with certain services, e.g. B. paging services, the need for codes increases significantly with the growing number of subscribers.

A method has been proposed for expanding a code from 1 · 10 ^{e to 7 · 10 * [G.} Strunz «The European radio paging service». Zeitschrift für Post- und Fernmeldewesen, 21 (1969), pp. 816 to 819], which is based on the following considerations:

The numbers 0 ... 9 are the frequencies / 0 ... / 9 assigned. Since the code signals consist of six signal elements, 999 999 six-digit numbers can be created Coding numbers, but this is not enough. The referenced procedure suggests a Seventh first digit and five additional frequencies / 10 to for the frequencies / 0 ... / 9 / 14 to be added, with the first Pre-digit indicates to the coder at which points of the code sign - compared to the original coding rule according to table 1 - the frequency / 0 to / 4 (case ».v«) or the frequency / 5 ... / 9 (case »+«) must be converted into one of the additional frequencies / 10 ... / 14.

The prefix »1« does not cause any change the coding, so that the evaluators already in operation with up to six-digit phone numbers no changes were made when the number of numbers increased beyond a million Need to become.

A method has already been proposed for converting a decimal code formed by η parallel digits into a sequence of veil λ tone signals, where K </ », corresponding to a multi-frequency code with a number A of fundamental frequencies for the digits 0 to 9 and a repetition frequency are composed (German Offenlegungsschrift 21 03 310).

This method uses a link arrangement in the form of a dynamic transcoder, which reduces the / 1 parallel arriving digits expressed by a Α code to A- parallel digits, a parallel-serial converter that converts the parallel code into a serial code, a repeater converter, which recognizes each of the successively repeated λ-digits, as well as a control converter, which converts the digits supplied by the repetition converter into control signals for a tone generator implements.

Furthermore, a sequencer is also provided which receives as input a number of η to k of the reacted numbers and on the basis of these digits, the implementation of the other K-Zifie ^r n carries means Ziffernumcodierer, each one corresponding to it digit from the decimal code in a code implements with a higher base.

The digits 0 .. 9 are replaced by the 10 values of the (-i) codes and code translation done by changing that code to (f).

The object of the invention is to provide a further circuit arrangement with which the known code extension can be carried out.

The features of the circuit arrangement according to the invention are given in the claims.

The invention is not directed directly to the frequency conversion, but rather to the recoding of the seven-digit call numbers pending at the input of the circuit arrangement in the BCD code into a six-digit coded call number.

The mode of operation of the circuit arrangement according to the invention is illustrated below with reference to FIG. 1 and FIG. 2 and on the basis of a numerical example

3,483,377

explained in more detail.

The seven-digit call number in the ßCD code controlled by a clock Γ is fed into the arrangement in such a way that the prefix "3" is entered in the prefix memory VZ and the entered value via the outputs A ". D to the downstream first decoder DV wird- given followed by subsequent measures by the succession to enter the present Rufziffern in Rufziffernspeicher RZ. from here, the coded numbers go above the outputs A ... D to the downstream second decoder OP and the Exkiusiv OR gate group U with the single gates u4 ... «1 to.

a) Pre-digit

After the prefix has been stored in the prefix memory VZ and the downstream first decoder Dr ', it will be kept for the six-digit call number over the time of the following clocks, until the end of the transmission of the whole number from the clock ^ao s: ebcr T over the Line »/« Deletion takes place. The decoder DV applies the potential "Z." to its corresponding outputs for each digit 0 ... 9; in the present example, the criterion> · /. " Appears for the prefix" 3 "at output 3 of the decoder DV; the criterion "0" is applied to all other outputs. From output 3, only the gate group 3.1: 3.2 and 33 of the gate matrix M is activated, while the other gate groups 2; 4; 6; 7: 8; 9 and 0 are blocked.

As can be seen in FIG. 1, the connection i of the decoder DV is free, ie the prefix "1" does not cause the digits to be recoded.

b) First number

The second digit "4", which is the first call / iffer, is transmitted via the call digit memory RZ, its outputs A .. D, the second decoder DP and one of each of the exclusive-or gates m4. . . u \ supplied, which either let * ° pass the incoming potential, which is respectively carried to one input - shown in a slark - if the other input carries the criterion "0" or invert this potential if the other input fulfills the criterion "Z." leads.

At the same time, the criterion "Z." is given to the first output α of the clock generator T for the duration of the same cycle , while the other outputs b. . . / show the criterion »0«.

The line "α" leads to gate group 2.1; 2.2 and 2 3 of the gate matrix M. This gate group is blocked by the prefix: this means that the criterion "0" is also present at its outputs, the OR gates yi ... yS of the gate matrix Y are therefore not activated.

Since the digit "4" is not in the digit group 5 ... 9, which is recognized by the OR gate N , the criterion "0" is also at its output. This "(" - state is also at the one input AND gate, where a C, the other input receives clock T via the output h a short "^." - pulse at the output of the gate G appears thus for the counter Z , which can consist of flip-flops, for example, no set pulse. In the idle state and with the digits 0 ... E.g. with the digits 5 ... 9, the criterion "L '" at the left exit and the criterion "0" at the right rias.

In the present case, the idle state is retained, the criterion “0” is at the left exit / from Zu and the criterion “L” is at the right / criterion.

Since none of the gates rl ... ν 5 of the matrix K is activated at this stage, uh the kiiterium "0" is given at the output, the exclusive-or gates U do not invert, ie the first call digit "4" is not recoded , it passes through the coding device unchanged.

c) Second number

After the second digit "8" has been received, the clock generator T outputs the criterion "Z." again for the duration of one clock, but via the line "Z>", while on the other lines a, c ... / the criterion "(> «Lies.

The criterion "Z." is supplied to the activated by the prefix 3 gates 3.1 and 3.2 of the gate array M via the line "b". At the same time, the coded number »8« is sent via the outputs A ... D of the memory RZ to the second decoder DP and to one input of the exclusive-or gate V. Since the number »8 <* in the number group 5 .. 9, appears via the decoder DP at the output of the OR gate S that has the property. that at its output the criterion /. appears if the criterion »Z.« is offered to its input via outputs 5 ... 9 of the decoder DP - the criterion »L« -.

This criterion "L" is applied to the comforting input of the Lind gate G and the short-term "/." Pulse coming from the clock is sent to the output skk-ir ,; At the output of the AND gate L, e / 1 generates a seizure pulse "Z." which sets the flip-flop Zb of the counter device Z so that the criterion "£." at its output 2 and the criterion "0" at its output 2 is present.

The criterion "/." Is thus applied to gate 3.2 of the gate matrix U at all three inputs and the gate switches through. As a result, the criterion "L" is also at its output, ie the line "-" is subjected to "L", whereby the OR gates .rl and yl of the matrix K are activated. The OR gate ν2 is applied from the output 8 Jijs Decoders DP , it switches through and thus inverts the exclusive OR gate ul, the gate i / 3 is applied from "·" and also inverts and thus the digit becomes "8 «(0001) after the recoding applicable in the present example -> p! An (Fig. 2) recoded into the number» 14 «(Olli). To understand the recoding plan, it should be noted that in the first column of the same, the code digits after the i'Cß code are listed in reverse order and that the coding for 1 ') was selected for the digit 0.

d) Third call number

After the third digit "3" has been received, the clock generator Γ sends the criterion "L" to line c for the duration of a clock cycle and thus to the corresponding inputs c of the gate matrix M. Here, too, lies the remaining lines β, b, c, d. . . / the criterion »0«.

The line c leads the second input de ^ activated Galter 3.3 of the matrix M the criterion "/." / U. At the same time, the coded number "3" is sent from the memory RZ to the exclusive-or gates t / 1 ... uA and the decoder DP . Since the number "3" is not in the number group 5 ... M, the decoder DP appears at the output of the OR gate, V the Kriier ^ im

22 56 S97

"0", which is also applied to one input of the AND gate G ', the other input is assigned the criterion "L" .

This means that the counter Zc is not set, at its output 3 is according to the already in section b. 2 the criterion "0" and at its input 3 the criterion "L" and thus the criterion "L" is based on the previous input assignments at all inputs of the gate 3.3.

Since the line »λ« is loaded with »L« and the gates v3, _v4 and _v5 are activated and the exclusive-or gate i / 4 of the group U is switched to inversion, the criterion »Z.« of the call number »3 «Through the decoder DP through the gates v3 and r4 and thus the exclusive-or gates i / l and u2 are also switched to inversion.

Since according to the recoding plan used in this example According to FIG. 2, the number "3" has the code 1100, it is used in the present example recoded to the number "14" (0111).

For the other (4th to 6th digits) - in this case 3: 7 and 7 - the clock outputs cL c. / to non-activated gate groups 4 ... 0 of the Galler matrix M. The lines "j" and ".v" have criterion "0" applied to them and thus gates J ¹ I ... v5 of gate group Y also remain on the criterion "0", the exclusive-or gates // 1 ... // 4 are switched to through, the call digits remain unchanged.

This has the number

3 | 4ί8; 3! 3 | 7! 7 |

changed in

The memory (prefix memory VZ, Rufziffcrnspeiciher RZ and the counter Z) are deleted at the end of the last call number by a clear pulse from the clock T via the line /.

The recoded digits are fed from the output of the exclusive-or gate U in a known manner to a frequency allocator.

For this purpose 2 sheets of drawings

Claims (3)

Patent claims: 1.Circuit arrangement for expanding the coding for six-digit telephone numbers from 1 10 * to 7 10 * possibilities by recoding a seven-digit number into a six-digit number, whereby the seventh digit preceding as a prefix enables a changeover to five additional calling frequencies, characterized by a prefix memory (VZ) with a first decoder (DV) and a call digit memory (RZ) with a second decoder (DP), as well as a group of exclusive-OR gates ul ... u4 (U), which are normally switched to passage »5 which, however, can be inverted individually by an inverting criterion, whereby the inverting criterion is generated by the interaction of two gate matrices (A / and Y) in such a way that a clock pulse of the gate matrix t \ f) on the one hand the decoded prefix, on the other hand the feature determined by an OR gate (.V) and a six-digit counter (Z) whether the respective call number in the digit group 0. 4 or 5 .. .9 is included. is transmitted, and that the activation inputs of the gate array (Y) by said gate array (Λ /) given criterion ( ".v" or "-") and the other inputs of the gate array (Y) of the second decoder (DP) decoded call digits are supplied and linked in such a way that the criteria for recoding by the exclusive-or group (V) result at the outputs of the gate matrix (Y) , and that the storage of the call digits, the incremental switching of the counting device and the control of the individual gaiter the matrix (V /) in the Rhvthmuf of a clock (T) . 2. Circuit arrangement according to claim 1, characterized in that the prefix in the decoder (DV) and the feature of whether the respective call digit is contained in the digit group 0 ... 4 or 5 ... 9, from the counting device (Z) to is held at the end of the transcoding process. 3. Circuit arrangement according to claim 1, characterized in that the counting device (Z), the pre-digit memory ( VZ) and the call digit memory (RZ) can be deleted after the recoding by the clock (D (line;)).