DE2245969B2 - Electronic slot machine with rules similar to poker - Google Patents

Description

The present invention seeks to provide a slot machine that uses the game of poker - the most played card game in the world - in a simplified way Form is reproduced in such a way that it can be played "against chance" by a single player can that there is also the greatest possible incentive to carry out further games and that after all, fraudulent manipulations are practically impossible.

From US-PS 20 99 173 a coin operated slot machine is already known, the contains five rotatably mounted drums, on the circumference of which map symbols are arranged. The case This slot machine contains a window through which a card symbol of each drum is visible is. The drums can be set in rotation by a handle and should then be in random Positions stand still. The position of the drums is determined by a scanning device determined and printed out by a printer.

Through the DT-GM 16 91 435 a slot machine with three rotating bodies is also known that with Profit display disks, slip clutches and contact carriers for the electrical payment of winnings are provided. The rotating bodies are loosely arranged on a common drive shaft in such a way that that they start with a jolt at the moment the common drive shaft starts up. she can then be stopped and run by a brake lever assigned to each rotary body for itself momentarily again as soon as the corresponding brake lever is released again.

With constructions as used in the above-mentioned known gaming machines the game of poker cannot be reproduced in such a way that a rapid course of the game is guaranteed and that there: Issuing a card twice and avoiding the risk of fraudulent manipulation will.

The present invention accordingly resides The underlying task is to create an automatic electronic game that emulates the game of poker ensure that the games are carried out quickly

5 6

and fraudulent manipulation is practically impossible- credit is stored. With the described Auslich power. guide example is for the initial output

This task is achieved by the one coin unit (z. B. 1 DM) and in claim 1 of five cards

characterized invention solved. one for each new card bought after it was returned

Further developments and refinements of the invention require 5 additional coin units. The required approval are characterized in the subclaims. can have in the credit memory 14 by throwing

In the following, an exemplary embodiment of the insertion of coins 35 into the insert unit 11 is created

Finding explained in more detail with reference to the drawing; it will or consist of a previous profit,
shows The start of the game is activated by pressing a

F i g. 1 shows a block diagram of an embodiment io start button 37 triggered, which is connected to the control unit 25

of the gaming machine according to the invention, is coupled to a. Pressing the start button 37

Card memory, a display unit, a retroactive effect that all stages of the card memory 15 in the

dispensing unit, a dispensing unit, a result idle state can be reset and accordingly

interrogation unit, a control unit and a Auschend all fields 18 of the display device

payment unit, 15 delete. After a certain delay (e.g.

Fig. 2 is a somewhat simplified circuit diagram of the Kar- 0.5 seconds) the control unit then provides a

tens memory, the display unit and the return dispensing command to the dispensing unit 19, which on pure

unit, static way, one after the other five storage levels

3 shows a block diagram of the distribution unit which sets the card memory 15. That way

4a to 4f circuit diagrams of parts of the result- ao completely randomly distributed cards are shown by loading

nisabfrageeinheit, illuminated fields 18 of the display unit 17 are displayed.

F i g. 5 shows a circuit diagram of the control unit and the distribution unit is illustrated with reference to FIGS. 3 still

F i g. 6 is a schematic representation of the goods explained in more detail. After issuing the first five

have unit and the payout unit. Cards the player has the option within

In the following exemplary embodiment of the invention, for a certain period of time (here, for example, 20 seconds), the player pays his stake by means of inputs which are determined by the control unit 25, up to tossing coins that are thrown by a coin validator issued cards are checked by actuating, to return the corresponding counting signals to a good unit 21 when the corresponding return keys are accepted in the return coins. By actuating a have store supplies. Of course, instead of the 30 return key, the returned card coins can also be used with other tokens of value, assigned memory level from the first to the second such as tokens, tokens, banknotes and the like - 18 in the display unit 17 goes out,
character input and test device, which can be formed in known after actuation of a new distribution button 39 ter way. 35 (provided that the credit in the credit storage

The game shown in block form in FIG. 1 is more or less sufficient) as many new cards are dealt Automat includes an insert unit 11 with how cards have been returned. The card coin validator 13 and a credit memory 14, fer- memory is constructed so that the returned ner a card memory 15 with a display unit cards cannot be issued a second time.

17 for the cards, furthermore a distribution unit 19, 4 °. So in all cases the player gets others a return unit 21, a result query unit when it has returned cards.

23, a control unit 25, which controls the timing if the player does not return cards to the game unless he wishes to be influenced by the player, he actuates the re-deal key 39, without is, and a payout unit 27, which actuates a return key beforehand to have.
Coin storage 29 and a coin dispensing device. The coin store 29 accepts the preferential return key in the card store 15 five stores the coin levels accepted by the coin validator 13 are in the first storage state, the zen is on. Result interrogation unit 23 causes the memory stages located in the first memory stage, ie

18 for 32 cards of a Skat game. The card memory 50 so check the issued cards whether rather, accordingly, contains 32 memory stages and a profit has been achieved or not.

the return unit 21 contains 32 return keys. In the present exemplary embodiment,

Before a detailed description of the following card combinations, which are

Structure of the various units of the sequence of increasing profit percentages shown in Fig. 1 are:

Slot machines only shown schematically should 55 1. DriDing (three cards of the same value, e.g.

the rules of the game and the general way of working of these three kings).

Slot machines are explained: 2. Full House (three and two cards of the same

Before starting, all circuit units of the game value, so z. B. three ladies and two

machines with the exception of the card memory to Neuner).

reset. The card memory also stores the ^6o 3rd flush (five cards of the same suit, which, however, are the result of the previous game and therefore do not form a continuous sequence),
The display unit 17 accordingly shows the cards drawn in the 4. four-stand or normal poker (four game played back. This enables the same value, for example four queens, but not one but four aces in the case of a complaint by the player) .
Verification of the game result by the ⁶ S 5. As-Poker (four aces).

surveillance staff. 6. Straight Flush (five consecutive cards-for the implementation of a game is required of the same color, e. B. Seven of Hearts to Hearty, that there is a sufficient jack in the credit memory 14), without ace.

7 8

7. Royal Flush (five cards in a row- a five-position counter 67 and the other too

values of the same color including the ace). a random generator 69 can arrive.

The facilities for realizing the above-explained The five levels of the counter each have one terted functions and the described Spielablau- 1 output and an O output. Steps at the 1 output fes are in the following with reference to FIGS. 2 to 6 5, the signal "L" (binary digit 1) when the stage is explained, is set, while with a reset level on the O-Off

An »L« appears in the following description of the mode of operation.

of the present gaming machine on the basis of a typical The random number generator 60 consists of a known

see game it should be assumed that the circuit arrangement, e.g. B. a feedback

Credit memory 14 is empty that the coin memory io shift register, which is a quasi-statistical binary

29 contains a certain supply of coins and that, in succession, delivers a very long period. The ones from

Card memory the random number generator 69 generated in the previous game generated quasi-statistical lines

save five cards. The display unit 17 sequence is fed to a frequency divider 71,

accordingly shows the images of these five maps of the frequency of the quasi-statistical pulse train

by the corresponding illuminated fields 18, 15 so low that the "distribution" of the cards

and, preferably, the profit that may have been made. at a sufficiently slow speed

At the beginning of the game, the player throws appropriately in order to be noticed. The quasi-statistical pulse sequence divided into several moderate coins 35 in the coin validator 13 of the frequency. The coin validator can be configured in a known manner in a pulse shaping and delay mode and, when a coin 20 is accepted, supplies circuit 73 and in such a phase position an electrical pulse which, on the one hand, contains the coin validator normally contained in a clock pulse supplied to the counter 67 Coin switch CP brought that the respective quasi-statistical switchover, so that the accepted coin only occurs through pulses after counter 67 reaches the clock pulse CP triggered by an acceptance channel 41 (Fig. 6) in the coin dispenser corresponding to the clock pulse CP, the z. B. from standing vertically 25 has finished switching. The quasi-statistical Imden tube can exist. The pulse generated upon acceptance of the pulse (hereinafter referred to as random pulses) Z will also be a forward from the output of the pulse shaping and delay counter input VZ of an up / down counter 43 contained in the credit memory circuit 73 each having an input of 14 32 AND elements supplied to trains, each leading to a stage, which is provided with a display device 45 assigned 30 of the card memory (FIG. 2). In is that shows the balance. The credit memory F i g. 2 and 3, only one such AND element 14 is shown in each case, furthermore, which is connected to the counter 413 and which is the memory stage for the card T 7 and is assigned to a decoder on an output line 49 (meet seven). The AND element provides an output signal when the counter 43 is set to zero. Each has 8 inputs, five of which are also created. The line 49 leads to an inverter 51, connected to 35 speaking outputs of the stages of the counter 67, the output of which a credit signal GU occurs, as is shown in the table contained in FIG. 3 when the counter 43 is a table other than zero. The five one-time credits concerned are saved. courses of the AND gate 75 of a first memory stage

After inserting one or more coins (i.e. here the spoke, level 7 "7) are activated with the

the player then presses the start button37 (Fig. 5), whereby 40 1-output of counter level 1 and with the O-outputs

a monostable multivibrator (in the following briefly connected to counter levels 2 to 5).

»Monoflop«) 53 is triggered, the five inputs of the AND gate75 that hit when triggered are located

a pulse of a given duration to one of then and only then loud signals of the value

two inputs of an AND gate 55 supplies. At the "L" when the counter 67 is at 1 (decimal). At the

The second input of the AND element is the good 45 advancement of the counter 67 by the clock pulses

have signal GU and since it was assumed, TP are the five inputs of the 32 AND elements

that the credit is different from zero, the 75 can successively in the ready-to-pass state

Impulse from the monoflop 53 the AND gate 55 biased.

to run. The output pulse of the AND element is used for the two remaining inputs of each AND element

as a reset pulse RS, the card memory and 50 are with 0 outputs of two flip-flops FF1 and α

the profit determination circuit is connected to the associated FFIb (Fig. 2), which together the memory

Resets displays to zero. The output pulse form Γ 7. The card memory 15 contains

RS also runs through a delay element 57 through 32 memory stages in four rows and eight columns

and an OR gate 59 and then arrives at the setting, as the following table shows, and

input of a flip-flop 61, which is thereby set. 55 the two flip-flops corresponding to the flip-flops

If the flip-flop 61 is set, FFla and FF Ib occurs at its included.
1 output a distribution command signal AB , which is a
AND gate 63 (FIG. 3) is supplied in the distribution unit 15. The AND gate 63 has two more
Inputs, one of which is clock pulse (frequency 60
e.g. 10kHz) from an oscillator65, while the third input has an exclusion signal,
that disappears when five cards are "dealt" word id Af di E d Atilhlßials

ds disappears if fn g

who are. J to the generation of Austeilschlußsignals _{ΤΊ rg T9} J _{10 TB TD TA TK}

is used in conjunction with FIG. 2 still received. 65 ^ pl pft ... PA

At the time under consideration, all three input "

signals at the AND gate 63 available so that the

Clock pulses are allowed through and on the one hand to 4 K 7 KA

row ! split 2 3 1 T9 J _{9 1} Tl PS. ... 2 Pl 3 Cl . 4th Kl.

In the table: _{Hpn A R} , _c . ,

that the player wishes to return cards. Tl = Club Seven The return of the card requires that at least one

Credit from a coin unit is stored _{in the credit memory TB = T ff R} , ^{che r.}

⁵ _n . ^{D "le} card return is effected by actuation of

"" J ""'Return keys 91 in the return unit 21 ( ^FIG . 2 1A - Meeting As below). The return keys 91 each control a P7 = seven of spades single-pole changeover switch 93 which is shown in FIG. 2 are connected in series such that

Cl = CoeurSieben ^l ° S? t ¹ SJf ^ * ^ü G ^{abing of} two cards impossible-

iicn is. By pressing the to be returned

v'n v ' cu card ( e.g. Tl) assigned return counter93

Kl = Karo Seven becomes the set input S of the second flip-flop

^^ "/ end storage stage, so the flip-flop 1 b of the ¹⁵ storage stage Tl a card return signal! KRS zu-

These are thus abbreviations of the values Wenn.'i η ^d f ^{sets the second flip-flop in question} , a 32-sheet card game S ₁ "^ ί * ^{Τ assigned to the S} P ^eic herstufe Tl

Since the 32 memory stages of the Ksrfenwirh ^ u switch 93 is operated, the flip-flop 1 b ge

nes card game S ₁ £ ^{containing 32 sheets of the S} P ^ herstufe Tl

Since the 32 memory levels of the card memory IS, 7T ⁹³ . ^betatI 8 ^l the flip-flop 1 b is set> ^w > r ^d

tär ^are ' ^{it is enough} > ^{the memory} - ^ie "- £ s, ^^ $ ^^ t ^ k s

The set input of the flip-flop FFl «is connected to the lower t ^ esef ° £ 7 * ° ^de ^. ^b , ^meet " ^the stage reached

The output of the associated AND element 75 resets vertnin T L? · H'PHop. This goes out

the. The flip-flop FFIa is thus set when δ ^ents P ^re sponding display device 79 in the

1. the counter 67 on the number assigned to the relevant Soei., ^ F * ¹ "/ ¹ ^ · By setting the flip-flop U cherstufe, the signal is vcrsawindet at its O output!» />,

2. a random pulse Z occurs and τ ι ^zugehöri g ^e AND gate 75 can therefore no

3. Both flip-flops of the relevant storage stage Si ^ZUI "^ f" of ^{the first} flip-flop FF la are more reset. pe.cnerstute let through, even if the relevant storage level

By setting the flip-flop la occurs at whose u ^ 7 ^de " ^Zah! F ^{r67 is} selected and at the same time

1 output the signal to "L" while the sK ΪΚ, T ",? ^auftlitt ·

at the O output becomes zero and the AND gate 75 c T changeover switches 93 to the Setzeingänsperr. The signal from the 1 output of the flip-flop FFl α rfnH »τ ^Γ · ^second hipfltps of the memory stages firstly switches a display device 79, ζ B an IZa ^L ™ ^tm & ⁿ ( ^z · ^B - the line 97) are with an on-lamp of the corresponding field 18 in the order «Ih ^S » "? ^{Es OR} - ™ edes99 connected to the display unit 17, which then indicates that the relevant" £? "Has been ^smooth S ^e g e card ^just an output pulse lie-card is given. Furthermore, reaches the d" mh ^"Z _T g ^{of from} 8 ^sim pulse is wärtsläh after forming Signalvoml-AusgangdesFlipflopsIezueinemvon?" ^ TH ^^ rschallung 101 back 32 inputs e.nes OR gate 81, whose Aus ^ rT ³ ' ^RZS fed to ^{the Za h'er83.} The transition with the forward counting input of a VZ v _{or 4O} ^ ₁ - ^ J ?? * ^PREV ckgegebene card is connected to a step-down counter Windwärts 83rd The counter k ^ J ^The KEnter ^To ™ of more than three 83 may count up to 5 and always switches to "κ ™" Π ^dadu rch prevents the decoder one step further, if one of the first Flipflons H ^ '^{"1, Number 2} a signal 2 A '("two cards") of a storage stage (ie one of the ^card return signal A'R5 from the corresponding flip-flops set to the fiipfloo FF 1 "F ₁ and 35) is switched off. The signal KRS is in the manner described above İTÜ '"/' ^{g '5, it illustrates} g' dlte circuit in statistical {j, generated shear sequence corresponding to the random pulses Z demand nI" f ^Kartenrü ckgabe the player operates the mutually any five cards from Vomi 4 "S Γ £ *" ?? ^(Fig - ⁵⁾ - ^{through which a Fli} P ^flo P 32 cards "dealt". When five cards are dealt Zt ^g ι? ^{mT ± When} the flip-flops have been set, ie the first flip-flops of five Soe so nff ¹ ^ S ⁸¹¹ S occurring signals are set by a step, the counter 83 is 5 οηροΐί ', · ^Γ ^ ^η3 ' ^ι « ^η ε 105 differentiated and via the counter 83 a decoder 85 is connected to ^{the set} input of the flip-flop 61 and a signal 5 K ("5 cards" ) Sι ^V ° ^{rher through the Si} S at the counter reading 5 ^{naI 5 K} resets which is sent via an OR gate 87 to the set input Γ? ^Wa , u ^By setting flip-flop 61, flip-flop 77 occurs and sets it. When the ss 5 "distribution command signal ^ fi is back on and since flip-flop77 is also set, the signal AS SL- ^'pfl , ° ^{P 7? back to Nu "ste} ht, the and the cards, is by locking the rr JT? f ^{c t frOm Os} zi" ator65 again from AND AND Gliedes63beendet. ^{P dCS? d} f ^passed, and the above described the SignaM5 can In a non-illustrated ^{way , the process} begins again. If again so much control a display that informs the player that 6o n * L ", ^from ß ^e S have ^{just become} , how back he now gives back three of the five cards dealt fii" f ^ ^{"been wa} reindeer, that is, when can buy a whole and for new cards again. for this, ή is λ 1 °?" ^{look like? eteiIt are} - the flip-flop 77 is reset as it has a certain period of time available _Be tli ^{signal 5A} ', and the issue, which in the present example is ^ 0 seconds ^te ' ^ ^or Sf ⁿ S ^w <rd, amounts to. Is the player within 20 seconds 6, P {Ta ^{may dle} profit determination by the return to the map, it is the result to ask one _h '"Y shown profit determination scarf headed, as will be described ^tu" g begin. ^B The following should, however, first be assumed foliL tI """ ¹ ' ¹¹¹ " ^ "follows due to the

luvenden table specified criteria:

11 sequence 22 45 969 M. 12th 2As number
the
Lines number
the
columns no 3 no Triplet
in column
+ poker
in column
+ IAs - - Triplet 2 no Yes no - 1 Full house 5 no Yes no - no - Flush 2 no no no - Yes - poker 2 Yes Yes Yes - - 1 Ace poker 5 Yes Yes Yes - - 1 Straight flush 5 no no no Royal flush no no Yes

The circuit arrangement shown in FIG. 4a is used to determine the number of lines and the presence of a sequence (five consecutive values). It contains an AND element 105 at the input of which the signal NAS from the 1 output of the flip-flop 103, the signal 5 K from the decoder 85 and the clock pulses TP from the oscillator 65 are present. The clock pulses are only allowed through when the flip-flop 103 is set and five cards have been dealt.

The clock pulses passed by the AND gate 105 reach the set input of a flip-flop 107, which is set by the first clock pulse passed. The leading edge of the pulse appearing at its 1 output triggers a monoflop 108, which supplies a storage signal to all eight stages of an eight-stage shift register 109. The inputs of the eight stages of the shift register 109 are each connected to the output of an OR element lilac to HIA. The inputs of each OR gate are coupled to the 1 outputs of the first flip-flops of the memory stages of a column (see Table 1). The input of the OR element 111 α, denoted by Tl , is thus connected to the 1 output of the flip-flop FFl a ( FIG. 2) . At the output of the OR element 111a, a column signal SP 1 occurs when there is an issued card in the first column (see Table 1), that is, when a seven is issued. The same also applies to the other OR elements, the column signal SP 8 therefore occurs when an As is output.

The column signals 5Pl to 5P8 are represented by the The memory signal generated by the monoflop 108 is stored in parallel in the eight stages of the shift register 109.

The clock pulses from the output of the AND element 105 are also transmitted via a delay element 113 shift inputs of the eight stages of the shift register 109 are supplied. The delay element is like this fcemessen that the first clock pulse at the shift inputs only occurs when the storage of the column signals 5Pl to 5P8 has ended. The clock pulses shift the contents of the shift register in a counter 115 which can count up to five and is connected to a decoder 117, which has three outputs, at each of which a signal 25, 35 or 55 occurs when the drawn Cards are in two, three and five columns, respectively.

The gap signals 5Pl, 5P2, 5P3, 5P6, 5P7 and SPS are also inverted by inverters 119 and each in groups of three in the manner shown in FIG. 4 a manner shown four NAND gates 1.21 to'l24 supplied, which then and only then all deliver an output signal "L" to an AND element 125 when the unoccupied columns are distributed so that a sequence is possible. The AND element 125 is supplied with the signal 55 as a fifth input signal, so it delivers a sequence signal SQ if and only when a sequence (regardless of the color of the cards) is present.

The circuit arrangement shown inFig.4b is used to determine poker, i.e. four cards of the same value (corresponding to a full column). The output signals of the first flip-flops of the memory stages are each supplied to eight AND gates 127a up to 127 Λ in columns. The AND gate 127a then supplies a signal VS 1 (column 1 full) if and only when all four SieLener are output. The outputs of the AND gates 127 a to 127Λ are connected to corresponding outputs of an OR gate 129, at the output of which a poker signal PS occurs when and only when a full column is present.

The in F i g. The circuit shown in FIG. 4C consists of an AND element 131 and supplies a signal 2 A (two-aces signal) when ace of clubs and ace of spades have been output. The inputs of the AND gate 131 can be connected to any two As memory stages, since the circuit according to FIG. 4c is only used to determine Ace Poker.

The circuit according to FIG. 4d is used to determine whether the cards drawn are distributed over one or more lines. This circuit supplies a signal 1 ZS (1 line) if and only if all the cards drawn are in a single line. The circuit according to FIG. 4d contains an OR element with eight inputs for each row of the memory stage matrix (see table!), Of which only the upper element 133 is shown for the first row. The inputs of the OR gate 133 are supplied with the signals from the 1 output of the first flip-flops of all memory stages of the first line, it supplies a line signal Zl whenever the first line (club) contains a drawn card. The same applies to the other OR elements not shown.

The line signals Z1 to ZA are fed to corresponding inputs of a threshold value circuit 135 which supplies an output signal when two or more line signals are present at its inputs. The output signal of the threshold value element 135 is negated by an inverter 137. At the output of the inverter 137 there is then or only a signal of the value L when all the cards drawn are in a single line.

The circuit according to Fig. 4e is used to determine

958

13 14

whether a triplet has been dared. For this purpose, there is preferably no payment or the four signals from each column in groups for credit, but an optical or acoustic three and three AND elements 139, 140, 141 pull display by an alarm device 151 (Fig. 4f), leads, as shown in Fig.4e. The outputs dz large amounts only poorly in coins from the AND gates 139 to 141 can be paid with the inputs 5.

an OR gate 143 connected. The one signal in the present slot machine can

Dl (three-of-a-kind in column) always delivers if the player registered his in counter 43 at any time! the first column contains three of a kind, i.e. when three credits can be paid out in full or in part. Here-sevens were drawn. to he actuates a payout key 153, whereby a

A circuit corresponding to switch 155 is closed for each of the eight columns and a voltage U is applied to the AND gates 139 to 141 and one input of the AND gate 157. OR gate 143 provided, these circuits are at the other input of the AND gate, but this is only indicated in Figure 4e. So there are ins- credit signal GU. If a credit is available, a total of eight OR gates, the voltage U is connected to a payout OR gate 143 , the signals Dl to D 8 15, which, for example, deliver a reciprocating squint. The signals Dl to D8 are the eight input oil, which can be supplied to an OR element 145 in the coin store 2S, on whose stored coins 35 a triple signal DA occurs one after the other in the output when it is in an output tray 163 ejects. The ejected any column has three of a kind. Coins are detected by a light barrier 165,

The evaluation which takes place in the above-described "° and the pulses resulting undergo a manner generated winning criteria signals pulse shaper circuit 167 and an OR gate by the illustrated in Fig.4f circuits 169 to the down count input of the counter 43. Fuei of inverters and AND members exist. The counter 43 changes the value of every coin dispensed and the operation of these circuits is openly set back one step. If the counter reading is zero, they deliver the following profit signals: »5 reached, the credit signal GU disappears, the

AND gate 157 blocks and the further output of

GDR = profit triplet, coins are prevented.

GFH - Profit Full House, The delayed signal from the output of the delay

GFL = profit flush element 113 is a further delay

"." ZT . 1T. _t . _x 30 member 170 supplied, which is a backlash reset

GPH = win poker (simple), signal / WS for the circuit settings to be reset

GAF = Win As Poker, units of the slot machine (with the exception of the card

GSF = Straight Flush profit, total memory and the profit display, which is

GRF = Royal Flush win. setting of the counter 115 by the signal RS goes out)

35 supplies. The duration of the delay is calculated in such a way that

The winnings can be viewed. ^that the profit determination described above ends

is before the RSS signal occurs.

If the player does not return a card, you will

Preferably, however, display is made out of or instead of the profit after the expiry of 20 seconds determines a winning payout or Gewinngut- 40 after the Kartenriickgabesignal KRS (Fig. 5] in the credit storage magazine 14. For this purpose can be, for. Example, disappears. The signal is KRS on this the winning signals are fed to a coder 147 inverter 172 and an OR element 174 is fed to the AND (FIG. 6), which feeds a counter 149 to element 105 and triggers the same processes to set a number corresponding to the win rate The content of the counter is then fed into the counter 43 45 M4S signal (which is transmitted to the AND element 205 via one of the credit unit 14, which is indicated by the second input of the OR element 175, connection xx will be great).

In addition 8 sheets of drawings

Claims (8)

Claims: 22 3 1. Electronic slot machine with poker-like rules of play, according to which five cards are dealt first, then there is the possibility of returning up to three cards and buying a corresponding number of new cards, and the profit finally according to the final value and color distribution of the final one Cards is determined, containing a display unit with a display device for each card from a group of possible cards, a distribution unit which, when actuated, causes the display unit to display a predetermined number of arbitrarily selected card symbols, a return unit, with which the displayed card symbols are deleted and the new display a corresponding number of card symbols can be caused by the display unit, a stake unit for the stake required to carry out a game, a result query unit that determines the result of the game on the basis of the card symbols ultimately displayed and a winning unit which displays and / or stores or pays out the winnings, characterized in that the display unit (17) is coupled to a card memory (15) which has a storage level (7 "7 to KA) for each card, the three storage states is capable, namely an idle state, a first memory state in which a display device (79) assigned to the card in question indicates to the display unit (17) that the card in question has been issued, and a second memory state which occurs when the card is returned, wherein the deletion of the associated display device (79) is carried out that the distribution unit (19) contains an oscillator (65), a random generator (69) and a counter arrangement (67) for setting a predetermined number of randomly selected memory stages in the first memory state, that the return unit (21) for each storage stage contains an actuator (91) which can be operated by the player and which b ei a first cycle of the distribution unit (19) selected card by switching the relevant memory level from the first to the second memory state that by actuating a new distribution button (39) in the presence of memory levels in the second memory state, the distribution unit (19) becomes effective again and the The reissuing of cards corresponding to the number of cards returned while simultaneously establishing the first memory state of the memory levels corresponding to the newly issued cards and causing the display by the associated display device (79) and that the result interrogation unit (23; 4a to 4f) is coupled to the card memory (15) for querying the memory stages located in the first memory state. 2. Slot machine according to claim 1, characterized in that each memory stage (z. B. Tl, Fig. 2) of the card memory (15) contains two bistable style fen (FF la, FFl b) , the first of which by a set signal from the distribution unit and the second through one through the corresponding 969 Actuating element (91) of the return unit can be set and the first bistable stage (FFla) in the set state supplies a signal that activates the corresponding display device (79), and that signals are picked up from each storage stage that generate a further set signal for the first Prevent bistable stage as long as one of the two bistable stages is set. 3. Game machine according to claim 1 or 2, characterized in that the counter arrangement (67) is able to accept as many settings as cards are possible that the counter arrangement by the output signal (TP) of the oscillator (65) can be switched so that they all possible settings repeated that a logic circuit (75) is provided for each level of the card memory (15), which with the output of the random generator (69), lock outputs (O outputs of FF 1 α and FF 1 b) of the relevant memory level and corresponding Outputs of the counter arrangement (67) is coupled so that it generates a set signal for the first bistable circuit (FF 1 a) of the relevant card storage stage and only when the counter arrangement is in the position assigned to the relevant card storage stage, an output signal (Z) from the random generator is present, neither of the two bistable circuits (FFla, FFlb) of the associated memory stage is set and the first bi stable circuits of at most four card memory levels are set. 4. Slot machine according to claim 3, characterized in that all stages of the card memory (15) are coupled to the up-counting input (VZ) of an up and down counter (83) in such a way that this counter when the first bistable circuit is set ( z. B. FF ia) a card memory stage is advanced by one step; that a decoder (85) is coupled to the up / down counter (83), which delivers an output signal (2 K or 5 K) for count value 2 and count value 5, and that the signal (5 K ) a logic circuit (87, 77, 75) is fed to the termination of the distribution process. 5. A slot machine according to claim 4, characterized in that the logic circuit for ending the distribution process contains a flip-flop (77), the set input of which is connected to the output of the decoder (85) delivering a signal (5 K) when the count is 5 and its output is connected to the reset State activated O output is connected to an input of each of the AND gates (75) which supply the set signals for the first bistable circuits (FF 1 a) of the memory stages. 6. Slot machine according to claim 2, characterized in that the Rürkgabeeinheil for each Storage stage contains a single-pole changeover switch (93), which by that of the relevant storage stage associated actuation quality (91) can be actuated that the changeover switch is in its one position are biased and automatically return to this after actuation, that all changeover switches are connected in series in that the fixed Contact piece of the first changeover switch on which the associated movable contact piece rests in the idle state, is connected to the movable contact piece of the next switch, the fixed contact piece of the next switch, on which its movable contact piece rests in the idle state, is connected to the movable contact piece of the next but one switch, etc. ., and that one end of the series connection is supplied with a card return signal (KRS) which is only present during a predetermined period of time after five cards have been dealt for the first time. 7. Slot machine according to one of the preceding claims, characterized in that the memory stages of the card memory have a matrix of lines which correspond to the colors (clubs, spades, hearts, diamonds) and columns which. correspond to the different card values (7, 8 ..., king, ace) and that the result _{query contains ao} unit (23): a) a column counting circuit? (109, purple to 111Λ, 115, 117) which have a first, second or third column signal (25, 35, 5 5) delivers, depending on whether the card memory levels in the first memory state are split into two, three or five columns; b) a sequence determination circuit (119, 121 to 124, 125) which generates a sequence signal (SQ) when the card values form a sequence of five cards; c) a determination circuit (poker, FIG. 4b) which supplies a signal (PS) when all four memory stages in a column are in the first memory state; d) a determination circuit which supplies an output signal (2A) when at least two of the memory stages corresponding to the highest card value are in the first memory state; e) a line number detection circuit (Fig.4d) which supplies a line signal (1Z5), when all the first storage state occupying memory stages m are one and the same row ^; f) a detection circuit (Fig. 4e) which delivers a signal (DA) when one of the columns contains three storage stages located in the first storage state; g) a circuit arrangement (111 A) which supplies a signal (PLC) when at least one memory level corresponding to the highest card value is in the first memory state, and that the existence of a profit is determined by a logic circuit (Fig. 4f), that operate according to the following Boolean equations or equivalent equations: 60 (35) (DA) = L. (25) (DR) (P) = L
(55) (TZS) (50 = L (P) (ZA) = L (P) (2/1) = L. (55) (SQ) (SPS) = L
(55) (SQ) (SPS) = L 8. Game machine according to one of the preceding claims, characterized in that the insert unit (11) contains a security check device (13) and an up-down counter (43) with up-counting input (VZ) and down-counting input (RZ) that the stamp checking device (13) delivers an up counting pulse to the up counting input of the up / down counter (43) upon acceptance of a valid stamp; that the backward counting input of the forward / backward counter can be fed backward counting pulses which are generated when a value token is paid out and when a card is returned; that the counter (43) is connected to a decoder (47) which, when the counter reading is 0, supplies a blocking signal (GU = 0) which prevents the initiation of a game, the return of a card and the payment of a token.