DE2225219C3 - Pulse generator - Google Patents

Description

The invention relates to an improvement of an inipulse generator known from GB-PS 12 20 505 with two parallel flip-flops, of which the output of the second, further flip-flop forms the generator output. The known pulse generator is used to generate one or more The duration of the output pulses can only be specified after a delay time. The first toggle switch behaves due to the addition of two additional monostable arrangements and an associated special delay line as a whole similar to a monostaoile multivibrator, but this first flip-flop only after a relatively long recovery time - between on the one hand their return to the starting position and on the other hand, your next control in the working days - in this your next working position can be controlled. To the control are apparently only very short trigger pulses are used. This results in a minimum period of the period supplied by the pulse generator (ienerator-output ii'ipiilse safe-guarded where these periods are much longer than the duration of the trigger pulse. A subsequent change separated from pulse duration and pause duration is quite a bit awkward, because the / eilkoiislanlen of the individual parts This impulse generalor can act on the impulse duration and Paiisendaiier according to relatively complicated cones.

According to the invention, on the other hand, the pulse generator should deliver one or more alarm output pulses for the entire duration of the trigger signal, with the first output pulse delivered not appearing until after a certain delay after the start of the trigger signal. The input of the pulse generator should be so simple that it is easy to adjust the respective timing and the generator output pulse duration by changing its timing conslania. Above all, however, the re-counting line should also be negligibly small, so immediately after the end of a first trigger signal - in whatever state the pulse generator is up to then - a next, second trigger signal immediately after the specified delay line a new general authority. Aiisgungsimpiils supplies. The task or advantages of the invention thus differ from the task or advantages of the known Imptilsgcneniliirs.

The invention thus relates to a pulse generator with two cascading sound waves, from which the output of the / Weilet), further Kippschal development forms the Generaioraiisgang, to generate a oiler of several generator output pulses that occur after a defined delay specifiable duration. The inventive impulse

generator is characterized in that, to generate the generator output pulses without re-availability time during the entire uninterrupted duration of a single trigger signal, an output of a monostable, retriggerable, to which the trigger pulse is applied, the first of the flip-flops forming flip-flop is connected to an input of the further flip-flop and that in a Connection between the output of the further flip-flop and the input of the monosilable Flip-flop a first AND gate su is inserted that the generator output pulse has an input this first AND gate is fed that the output of this first AND gate with an input the monostable multivibrator is connected and that for feeding the trigger signal .iu to the pulse generator another input of the first AND gate is provided.

The pulse generator according to the invention is thus triggered by a trigger signal which is a continuous signal triggerable, and / was accidentally so that even without using a special jerk ·; ! / signals the readiness for action is extremely small. To At the beginning of the trigger signal, it initially does not generate an output pulse for a defined delay time. Only after this defined delay has expired it generates an output impulse that can be specified in terms of its own duration or erases one Output pulses. where the distance of the one Output pulse of this sequence is equal to the defined delay / eii. After the Trigger signal that / ti can be terminated at any time can be carried out practically without repetition a new trigger signal a new output pulse that occurs after the defined delay has elapsed or a sequence of such output impulses again to be born.

The crfinding-like pulse generator is provisionally particularly suitable for generating Starting inifulseii. animals duration very small compared to the is a defined delay. where, by the way, both this delay time and the output pulse duration can be made easily controllable. The delay can be done with the perfect pulse generator voricillialierweise especially / ur improvement Certainly against malfunctions in an extensive arrangement, i.e. in a system be used in which it is cingesel / t: Dorl This is because disruptive swinging processes often occur the extensive l.eiiui.gsnct / wcrk and only after If these decaying processes have subsided sufficiently, e. more unacceptable registers for the input of / Ii storing or / u \ processing signals are given. The defined delay part of the first pulse generator can now advantageously as a waiting time, in which these oscillating processes decay sufficiently, so that only the delayed generator output pulse for such registers b / w. Organs taking over the b / w to be saved. processing signals.

The first monostable multivibrator can be relriggered. d. h .. if its input signal is interrupted, it is practically without the need for a recovery. immediately controllable by a new input signal in their unstable working state. its duration regardless from the point in time is. to which the previous input signal of this non-labile multivibrator was interrupted. Such a retriggerable monostable multivibrator is ζ, B. in module SN 74122 of Texas Instruments included,

The invention is explained with reference to two figures, wherein

Fig. I shows the structure of a special embodiment the pulse generator according to the invention and

F i g. 2 shows a timing diagram associated with this embodiment.
Based on the in F i g. 1 shown embodiment

lu of the invention, several such exemplary embodiments will now be described, each of which is special Have advantages.

In Fig. 1 is a pulse generator according to the invention shown, which is used to generate a defined after a

H delay time VZ occurring generator output pulse of predefinable duration is used, see Fig. 2. A monostable, retriggerable flip-flop M to which a trigger signal Es is applied is provided - this trigger signal / fs is also shown in FIG. 2

Ji) shown. The output of the monostable trigger circuit Λ / is connected to an input of a white trigger circuit VV, which can also be clock-controlled with the help of a clock pulse Tu , but does not necessarily have to be clock-controlled. The output A of the ImpuKgene-

r> rators is formed by an output of the further flip-flop VV. Here is this or a such output of the further flip-flop VV with an input of the mono-stable flip-flop Λ / tied together. The further flip-flop circuit VV can

in particular bislabil oiler be monostable, whereupon im following will be discussed.

The duration of the unstable state of the mono-stable multivibrator Λ / corresponds essentially to the defined delay time VZ. after which the

ii GencraUT output pulse / s, related to the beginning ties trigger signals /.'s. occurs. The connection of the The output of the further flip-flop VV with an input of the mono-stable flip-flop Λ / causes, that the output pulse. z. B. its trailing edge, the

i <> monostable multivibrator controls again in the unstable state and thus ilen start of a new delay line VZ. initiates, with the white flip-flop VV during the duration / of the output pulse / 's in its one country and during the

r> rest of Zeil in their other country i'l. The connection mentioned can also have an influence on the duration / 'of the output pulse Ts , as will be explained further below. The white toggle switch VVtlicnt here ii. a. to generate the output pulse Ts.

> 'i where the duration / of these output pulses / * not only by the white flip-flop IV itself, but before especially by the connection between an output of this further flip-flop W with a Input of the mono-stable flip-flop Λ · / determined

ii can be.

When the trigger signal / 's is first fed as an input signal to the moon-stable, retriggerable multivibrator M , as in FIG. 2, thus arises after a defined delay time VZ, which of its-

On the one hand, depends on the duration of the unstable state of the mono-stable multivibrator M , a single output pulse Ts . 2 continues to apply the trigger signal fc'.s, so a plurality of output pulse Fs that can be specified arise

■ Duration Γ - in Fig. 2, two output pulses / 's are the Duration / ". Without a special reset pulse being necessary, the invention can therefore use Pulse generator a single output pulse

7s or a whole mole of such output pulses can be generated, with a defined delay period VZIicgt between the beginning of the trigger pulse f: s and the occurrence of the first output pulse Ts.

The pulse generator according to the invention has practically no recovery time in that, after the trigger pulse Es has been interrupted, a new trigger pulse f's can be supplied again practically immediately, which is retriggerable. monostable multivibrator Λ / in its unstable state and thus an output pulse 7 "s or a sequence of such output pulses is generated again after the defined delay time \ 7, the delay line of the same size between the individual output pulses of this sequence.

\ t \\: ι 'mn. ι

Γ Ii = i η ιτ I

c-

in each case from the special structure of the guide example. in particular from the structure of the further flip-flop circuit and often also from the runtime in your through the Feedback of an output of the further flip-flop with a Mingang the monostable tilting scarf feedback loop formed.

Because the duration 7 of the output minute pulse Ts is practically independent of a choice of the duration of the delay time. The pulse generator according to the invention is also particularly suitable for generating pulses whose duration is extremely short compared to the defined delay time. For this reason, the linear generator according to the invention is particularly suitable for controlling registers or organs whose input signals should only be accepted after a defined, slow delay line for the duration of a single generator output pulse that is very short compared to the delay time Dei are caused by the (ienerator-Ausgangsim pulse. the register or organ can here a component of a data processing system oiler z. Ii. also make a Memsprechsystems. erfindungsgemälle pulse generator makes up iroiz e ger Ioleranzen not be extremely difficult for a grudge reliability / u reach.

In an exemplary embodiment of Mrfindiing, provision is made for the further flip-flop IV to be made bistable. In this lalle create! So the further flip-flop circuit H 'during its one stable state the output pulse 7s and during its other stable state no output pulse is generated. The duration 7 "of the stable state generating the equalizing pulse 7 ~ s is determined by the feedback, ie by the connection between the output of the bistable flip-flop W and the M input of the monostable flip-flop Λ /: this feedback is namely achievable that the stable state of the bistable multivibrator W generating the output pulse Ts lasts only a very short time, with a corresponding selection of the polarity of the feedback signal even only during a time which is solely due to the transit time in the feedback circuit 1. The delay of this delay element can even be made controllable, for example by inserting a delay element K. In this embodiment, the duration T of the output pulses can thus be controlled.

However, the duration T of the output pulse Ts can also be changed by other measures, e.g. B.

by making the bistable flip-flop switch W laktgestcucrl. See the clock pulses Tn shown in FIGS. 1 and 2. In this case, the duration 7 "of the output pulse Ts can be determined by the freely selectable clock frequency of these clock pulses Tu or often also through the freely selectable duration after setting up the flip-flop circuit W of a single clock pulse Ta can be regulated as required. In M i g. 2 it is assumed that the duration 7 of the output pulse Ts and thus the duration

κι the relevant stable state of the bislabile Flip-flop H'by the clock frequency of the Taklimpulse 7.1 is determined.

The training of the further flip-flop IV as clock control. bistable toggle switch still has ilen

ι> preference, because not only the duration I of the output pulse Ts by the 'lactimpulse Di. but also the lit .- ^ inn iIp'. Aiist'ani'simnulses 7's l! .Ih ii die Taklimpulse 7 ;? can be co-determined. see M ig. 2: After the defined delay time \ /. the duration of which is determined by the DiUiLi 'Jcs unstable addition of the monosUihilcn toggle switch Λ /. not entsieht immediately once the Ausg.nigsimpuls T. ersl but after I iner Aufsynchronisationszeil .17! this synchronization line between 0 and the reciprocal of the clock frequency of the laktimpulse / '; he ι camp; l ^ ann. By using a Mk igest. bistable toggle switch!> it is therefore possible! the output pulse / s is generated in a clock phase predetermined by the clock pulse Tu by inserting an synchronization signal 17 between the linear ver / ögcruiigszeii l '/ and the output pulse / s. This example guide de; In accordance with the invention, the general pulse generator is particularly suitable for controlling the lactated system components, e.g. B. of registers in data processing systems or for the control of registers in ticklgesleucr th I "speaker systems. In particular for this purpose the registers after a longer, delimited delay time / during a definable phase of the clock period of the clock pulse 7, 7 for writing or writing Reading are enabled. This also ensures that the duration and especially the phase position of the output pulses 7s with respect to the pulse generator are independent of tolerances, time-determining components of the pulse generator - in contrast to the exemplary embodiments in which no synchronization time is provided.

In the last example mentioned. in which the further trigger circuit W is designed as a taktgesiei .nc bistable trigger circuit. can advantageously also be achieved that the duration 7 of the output pulses Ts is very much shorter than the duration of the defined delay time V / . the duration of the output pulses 7s can be controlled very precisely; for this one only has to choose the - possibly controllable - period or duration of the clock pulses Ta controlling the bistable multivibrator W much shorter than the duration of the bistable state dci monostable multivibrator Λ /.

In another exemplary embodiment of the invention, provision is made for the further flip-flop circuit W to be made monostable. In this case, the duration Ί of the output pulses Ts can be specified by the duration of the unstable state of the monostable, further flip-flop circuit H. If this monostable further flip-flop W is not clock-controlled. zwischer is the delay time and the duration T VZ dei output pulses Ts no Aufsynchronisationszeit ΔΊ

inserted.

However, it is also possible to make the mono-stable, more multivibrator W clocked, thereby Aufsynchronisationszeit Δ 7 is inserted "between the delay time VZ and the output pulse Ts. V> geous enough, is thus also achievable in the last-mentioned embodiment, that the output pulses Ts occur only during a certain phase of the clock pulses Ta , so that this embodiment is particularly suitable for clock-controlled systems such as clock-controlled data processing systems and clock-controlled telephone systems.

In a further embodiment it is provided that in the connection between the one output of the further flip-flop W - however the further flip-flop itself may be configured - and the one input of the monostable flip-flop M a first AND gate Gl is inserted so that the generator output pulse Ts is fed to an inverse input of this first AND gate G 1 or that the inverse generator output pulse Ts is fed to a normal input of this first AND gate GI, see FIG. 1. The output of this first AND gate G 1 is connected to an input of the monostable multivibrator M. Another input of the first AND gate G 1 is used to supply the trigger signal £ 5. This first AND gate G \ allows in particular to superimpose the output pulse 75 with the trigger signal Es in such a way that the two do not interfere with one another in an undesirable manner to use only one retriggerable monostable multivibrator M , which has only a single input. This AND gate GX here also takes on the function of preventing a continuously lasting trigger signal £ 5 from the input of the monostable multivibrator for the duration of the output pulse 7s, so that, so to speak, this continuous trigger signal £ 5 is fed to the monostable multivibrator M during the duration 7 "of the output pulses 7s is interrupted. Since the monostable multivibrator M can be retriggered, the unstable state of the monostable multivibrator M begins again immediately after the start of the output pulse Ts or, if the monostable multivibrator M is constructed accordingly, immediately after the end of the output pulse Ts . The defined delay time VZ thus begins anew.By applying a continuous pulse £ s as a trigger signal to input E of this exemplary embodiment of the invention, sequences of output pulses Ts - possibly controllable, even variable from output pulse to output pulse - duration without affecting the duration of unstable state of the monostable multivibrator and thus the duration of the delay time VZ is influenced by it. As mentioned, the beginning of the delay time can also coincide with the end of the output pulse Ts, the duration of the delay time VZ here too being independent of the duration of the output pulses Ts.

As in Fig. 1 is shown, it can also be provided that the output of the first AND gate Gl is additionally connected to an input of a second AND gate C 2, that a further input of this second AND gate Gl is connected to the inverse output signal of the monostable multivibrator M. is applied and that the output of the second AND gate G 2 is connected to the input of the further flip-flop W. In this embodiment of the invention, the input of the further flip-flop W is only fed an input signal if both the inverse output of the monostable flip-flop M and at the same time the output of the first AND

Gate G 1 an output signal is taken. If the monostable multivibrator M would allow the generation of an output pulse Ts at the end of its unstable state, but if the trigger pulse £ s already ends at this point in time,

a faulty output pulse Ts is no longer generated here because this second AND gate prevents the occurrence of the output pulse Ts due to the disappearance of the trigger pulse £ 5. If the additional flip-flop switch W by a (possibly even

■ to retriggerable) monostable trigger circuit formed is, through this insertion of the second AND gate C 2 can even be achieved that an output pulse 7s, which has already started but has not yet been generated for its full duration, is interrupted immediately will.

1 sheet of drawings

Claims (9)

Patent claims: 1. Pulse generator with two flip-flops connected in series, of which the output of the second, further flip-flop forms the generator output, for generating one or more generator output pulses of a predetermined duration, each occurring after a defined delay time, characterized in that, for generating the generator output pulses ( Ts) without recovery time during the entire uninterrupted duration of a single trigger signal (Es), an output of a monostable, retriggerable, to be acted upon with the trigger pulse (Es) , the first of the flip-flop circuits (M) with an input of the further flip-flop circuit (W) is connected and that in a connection (V) between the output of the further trigger circuit (W) and the input of the monostable trigger circuit (M) a first AND gate (GV, is inserted so that the generator output pulse (T) has an input this first AND gate (G I) is fed that the output this the first AND gate (6'I) is connected to an input of the monosable multivibrator (M) and that a further input of the first AND gate (G I) / is provided for supplying the trigger signal (Es) / u to the pulse generator. 2. Pulse generator according to claim I, characterized in that the further trigger circuit (W) is bistable. J. Pulse generator according to -. Nspruch I. characterized in that the further flip-flop (W) is monostable. 4. Pulse generator according to claim 2 or J. characterized in that the further trigger circuit (VV / throughTaklimpulse (TVi / 'laklgcstcucrt is. ). Pulse generator according to claim 4, characterized in that between the delay line (V /) and the beginning of the GencraiorAiisgangsimpulscs (/ 'v / a Aufsynchronisalionszeil (.1 /) fed by .Control with a delay compared to the line of the Vcr / ögcrungszeil (V /) Taklimpulse '/ ^ is inserted. H. Pulse generator according to claims 2 and ^r i, characterized in that the period of the unstable multivibrator (VV / Mcucrndcn Taklimpulse (In) is very much shorter than the duration of the unstable / iislandcs (V /) via the monostable multivibrator (M) . 7. Pulse generator according to one of claims 2 to h. characterized in that a delay element (V) is inserted into the connection between the output of the further trigger circuit (W) and the input of the monostable trigger circuit (M). 8. Pulse generator according to one of the preceding claims, characterized in that the output of the first AND gate (G I) is also connected to an I input of an IJND-Ciailc-rs (f <2), that another input this / while AND gate (G2) is acted upon by the inverse output signal of the monostable trigger circuit (M) and that the output of the / wide AND gate (G 2) is connected to the input of the further trigger circuit 'W ^. 9. Using the pulse generator after a of the preceding claims in an extensive system of circuits, characterized in that the defined delay time (VZ) is used as the waiting time in which the decay processes in the system decay, 10, use of the pulse generator according to claim 9, characterized in that the respective generator output pulse (Ts) is used to control organs of the system which are caused by dadu.ch to accept signals to be stored or processed.