DE2221217C3 - PCM time division multiplex telecommunications network - Google Patents

Description

available at the correct time for their connection With the autosynchronous method (phase switching

stand. This prerequisite is not to be driven from the start) the individual PCM time division multiplexing is fulfilled, since the individual switching centers to a PCM time division multiplexing on the individual clock generators switching center of a PCM telecommunications network, but not independent of one another, but rather PCM time division multiplex lines usually 5 synchronize with each other, have different runtimes, which, in addition, with the asynchronous method (heterochronous method)

are subject to temperature-related fluctuations, and weisi each PCM time division multiplex switching center because the bit clocks of the individual PCM time division multiplex their own independent clock generator, and each Switching centers, at least not without further ado, receive time-division multiplexing lines that thus flow into one another to match. To the above mentioned full memory, the storage capacity of which is the To create suspension, there are basically three tasks that correspond to the number of bits per pulse frame and the to be solved: Binary words received on the transmission path are to be retained for as long as standing small phase fluctuations (so-called until they are in the pulse frame of the relevant PCM time jitter) to be eliminated, and the bit frequency sub-multiplexing exchange must be matched (the full memory different between on different PCM time multiples at the same time causes the above-mentioned frame plex lines, d. H. from different directions, compensation).

equalize transmitted signals; Finally, with the quasi-synchronous method (in the following also

so that all time channels with the same ordinal number called blind bit method) finally, the in-incoming PCM time division multiplex exchanges of a ^PCM "and outgoing direction within the respective pulse frame also have their own independent clock coincidences and thus the connection transmission generators, but the information bitfret for Both transmission directions are always the same, ie the average number of information can take place at the same time (so-called isochronous bits per second, for all PCM multi-time operations), a so-called pulse frame equalization of preplex switching centers for the entire PCM telecommunications. a ₅ network equalized by the difference between

The first-mentioned task can be solved with a so-called bit clock frequency of the individual PCM time multi-called flywheel circuit, in which the plex switching centers and the uniform information-transmitted bits trigger an oscillating circuit of high quality by inserting information, which triggers the clock of the thus regenerated bits, so-called Bhndbits, determined (Proc. IEE 113, [1966], 9, pp. 1420 to 1428, 30). For this purpose, each receive time multiplex 1422; information telephony switching technology5 leads into a buffer memory of limited Speicner- [1969], 1 , 48 to 59, 51); the latter task capacity. If the storage time in ^a £ ^m can be a minimum limit (dummy bit-measured delay elements in the individual to the limit) by inserting corresponding buffer memories, then the associated PCM time-division multiplexing individual PCM time-division exchanges add a dummy bit by adding a dummy bit to a The PCM receive time division multiplex lines carrying out the line loosened the correct position of their office pulse frame for the duration by which the runtime on the relevant bit on the receiving end reading from the rutter PCM time division multiplex line is interrupted to a whole multiple, which means that the storage time of the Information frame duration is supplemented so that, enlarged, and on the transmission side an information-less bit, the pulse frames of all the so-called blind bit at the respective PCM time 40, is transmitted; in the case of a PCM reception leading to a multiplex switching center, such a dummy bit at a (counter) PLM-z: eitfangs time division multiplex lines with one another and with the multiplex switching center, this door interrupts the writing into_ihren runer PCM time division multiplexing switch given by the office pulse frame for the duration of the dummy bit in question Pulse memory, but continues to read from the buffer memory frame everything that leads away from this exchange, which means that the storage time is reduced here. the PCM transmit time division multiplex lines come later due to the different coincidences (see BSTJ ₁ XXXVIII [1959], 4, p. 909 clock frequencies again to a "" ^ "" ¹ Jf "** to 932 922; Proc IEE, 111 [1964], 12, p. 1976 to dummy bit limit, the processes described in 1980, 1976, r. Sp., O .; Proc. IEE, 113 [1966], 9, p. 1420 are repeated This results in a uniform information bit-switching technology 5 [1969] 1, pp. 48 to 59, 52, 53) equal to the bit clock frequency * of the slowest. In connection with the frame PCM time division multiplex switching line of the PCM remote balancing, a logout network is expediently at the same time temperature-dependent (Proc. IEE 113 [1966J, Λ i>. i <wu m ») Runtime fluctuations before 1428, 1427). _R i _inr lhit

taken (see e.g. Proc. IEEE, 113 [1966], 9, 55 In connection with «"«" »J ^C £" J ^B '"£. pp. 1420 to 1428, 1421, r. Sp .; information remote method it is known to provide in de "'JCM-Ärtn ^ t.ptex sprechvermittlungstechnikS [1969], 1, pp. 48 to 59, exchanges of a PCM telecommunications network Put 53V ferspeicher with a storage capacity,

For the compensation of bit frequency differences that are equal to a multiple of the number1 of the m one, various solution principles are known (see 60 bits contained in the PCM binary word (Proc IEE Ui Proc. IEE, 113 [1966], 9, pp. 1420 to 1428, 1421; In -. [1966], 9 pp 1420-1428 1422) touring opposite formations telephone switching technology 5 [1969], they * the invention, the object emen Ausie cb 1 S 48 to 59 51) ^of Bitfrequenzunterschieden between ^a ^ ^ELN ^ ⁿ

With the servo synchronous method (homochronous method, PCM-time multiplex vemM

ren master-slave method) a central 6 ₅ time division multiplex telecommunication network with if possible called clock generator enables the bit frequency of the individual PCM buffer memory ™ -

reporting network.

5 6

PCM time division multiplex lines connected PCM time - in each case the earliest possible point in time; otherwise must

multiplcx exchanges, in which with the help of the determination of the blind bit limit storage volume

Buffer stores a compensation of bit frequency below n-icns up to the actual dummy bit generation

is made by taking into account the possible further reduction in storage time when it drops.

Buffer storage time to a minimum limit that will be 5 blinded.

bit limit, from the relevant exchange It is also advantageous if the invention generates a dummy bit to that effect; According to the invention, a further development is to be developed that in the said minisolches PCM time division multiplex telecommunication network marked storage capacity άιτ buffer memory of a two net by a minimum storage capacity of a PCM time division multiplexing station connecting buffer memory which is at least approximately equal to the sum of this time division multiplexed PCM time division the delay elements increased by 1 bit and then inserted with the line each cause an artificial quotient of the maximum and minimum bit frequency borrowed running time, which is equal to the maximum multiplied by the double of the blind bit limit memory - natural running time on the time division multiplexing and volume, from the maximum .η number of while the minimum sum of the buffer storage times for a period of time equal to the duration of the total runtime, 15 maximum bit frequency, reduced half of the maximum outward and return time, ultimately artificial total runtime. A long dimensioning of preferred transit times and sums of the buffer memory enables, without an experimental transit time, on a PCM time-division multiplex line running between two PCM time-division multiplexing at the moment a PCM switching center is switched on, and from the line-generating dummy bits in the entire frequency range The maximum change in the specified Ge condition must be adhered to in bits from between the maximum and minimum bit frequency, namely that the total run time (total run time is. and return time including artificial run times

Such a buffer storage dimensioning brings and the sum of the buffer storage times) to one

with the advantage that on the one hand in the case of a blind between two PCM time division multiplexing stations

bit generation at an exchange whose memory 25 running PCM time division multiplex line is a straight

cherzeil so that it is one bit time span larger. Numerous whole multiples of the current information

as the dummy bit limit storage time, the storage time is a mation bit frame duration.

the dummy bit limit of a counterpart exchange. The invention is explained in more detail with reference to the drawings

does not fall below and thus the counter-mediating explained. It shows

processing point does not also generate a dummy bit that the 30 F i g. 1 a connection between two PCM time multiples

Dummy bit generation by the former exchange plex exchanges;

would compensate, and that the overflow of a F i g. 2 illustrates the insertion of a dummy bit;

Buffer memory even if the storage time F i g drops. 3 illustrates the course of the buffer storage

ce> buffer memory of the remote exchange for time within a dummy bit period;

Zero, as in the case of a third reduction 35 F i · ». 4 shows further individual circuitry

treatment center caused blind bit generation happen heal.

could, it can be avoided that, in addition, the beginning. 1 shows schematically in a for understanding

Changes in the information bit frequency within the scope required by the invention establish a connection

Limits of maximum or minimum bit frequency grain between two PCM time division exchanges

can be paid and that finally 40 VSt 1 and VStI; it is indicated that this PCM-

Runtime fluctuations of the respective PCM time multiplex time division multiplexing points in corresponding

plexleilungen can be compensated, while way with further exchanges of a PCM

and.ererseils the expenditure on buffer storage capacity of the time-division multiplex telecommunications network can be connected,

can be kept very low. It is also indicated that the PCM time division multiplex

In this case, the dummy bit limit switching center VStI is expediently dimensioned with a momentary bit storage volume of the buffer memory so that frequency f _x works and the PCM time division multiplexing with a maximum permissible bit frequency of the associated switching center VStI with a momentary bit I CM time division multiplexing center and minimally frequency / ₂ . The two exchanges are connected in normal bit frequency of the respective counter-time multiplex two transmission directions via PCM-Zeitmultir.lex \ determination center as well as transmission of a dummy 50 plex lines L , into each of which a vertits by this counter-time multiplex switch delayed VI or V \ is inserted and each of the buffer storage times in the period between two Weil's open into a buffer memory Pl or Pl, the dummy bits generated at the minimum interval are greater than. For this buffer memory, it is indicated that that of J \ ull remains. Such a design ensures that the PCM time multiplex switching center VST never 55 PCM Zeitmultipbxvermitllungsstelle VSt2 may be out übervcllig empty at the even in the worst case, a buffer memory without by simultaneously transmitted bits of bit frequency J _x PCM time Blindbiterzeugung a Compensation of the bit frequency multiplex switching center VStX in the buffer space difference would be brought about. Particularly expedient rather Pl are written and from which PuffermäLig is a minimum Blindbitgrenz-storage memory Pl with the bit frequency / ₂ of the PCM Zeitvolurr.en a buffer memory, the arrival at least as multiplex switching center VStZ be read approximated equal amounts expressed the in bit minimum and that the bits transmitted from the PCM time division multiplex exchange of two dummy bits, multipli: brt with the VStI to the PCM time division exchange quotient of the maximum and minimum bit frequency VSti with the bit frequency /, in and reduced by the mini reduced by 1 bit - The buffer memory P \ is written in and from this time the distance between two bundle bits is. Such a loading 65 can be read out with the bit frequency: Z _1. The Γ measurement, which leads to a correspondingly low level of writing in a buffer memory, is based on the so-called ex, which is decisive for the PCM reception leading to it, and any necessary dummy bit generation for the time division multiplex line -

t learn

7 8

There is no information bit clock before it, reading out time division exchanges VSt 1 and VSt 2 itself

_a from the buffer memory with the so-called internal extending PCM time division line loop one

Information bit clock of the associated PCM time multiple even number N of information bit frames for each

j plex switching center. because KB information bits for K channels in the PuIs-

If the storage time in a buffer frame falls below 5 and includes B bits per PCM word:

save a minimum limit, namely the one below χ. β

J more detailed blind bit limit, then generates the to- ^π ι + ^π 2 + ² · λ + 2 · κ = N ■ —— ·.

j associated PCM time division exchange a ■ / <»/

Blind bit by placing it at a certain point in the information bit frame number N depends on it

-: clock pulse frame for the. Duration of a bit received io depends on the line length and is

_{On the s} side, the reading from the buffer storage is the same as the lines underneath with a length of up to 25 km

\ breaks, which increases its storage time, and 2, to choose 4 for a length of 25 to 50 km

ί a bit without information on the sending side, the so-called being. Such an information bit frame includes

-. · ,,. ·. .. ·.! .._ .. «_ ♦. ; „,„ Mo ^ lrphrtfer transmission K · B + 1 or K · B clock bits, depending on whether the

Blind bit, transmits; in ^^^ T ^^ S- * s relevant pulse frame a blind bit faded in direction interrupted «™ J ^ SAKA was or not. In the event of changes in the duration of the

Agency on receipt of such a dummy bit for wurae oaer nium, dci LnuitBiauuvmug «. -w ~~.

₍ the duration of which is the writing in the buffer memory, the sum Tt ₁ + π _{4 of} the buffer

but continues to read from the buffer memory, which means that the storage times are the same but with a corresponding

its storage time is reduced. The extent, in opposite signs.

\ that by such a dummy bit generation an out ao The sum π _χ + π _{2 of} the buffer storage times of the

equal to bit frequency differences is possible, both buffers Pl and Pl are now allowed in the

! it depends on how often dummy bits are generated. Operation cannot be arbitrarily small; it must be avoided

ι can be: The difference between that in the PCM that both buffers Pl and Pl of

'■■'.: - ι-ί ~ - ™ .Η «ι» ΐ7 maximaF permissible bit PCM time division multiplex line loop with its momentary

a5 tan buffer storage time fall below the blind bit limit and thus both at the same time mutually

generate instantaneous dummy bit frequency of a r ^ -ivi- ^ cu- compensating dummy bit. In order to meet this foriplex switching center of PCM time division multiplexing, the sum of the storage times of the telecommunications network must always be equal to the difference between the two buffer memories P1 and P1 with a blind of the current bit frequency of the relevant limit memory volume c of such a buffer memory.

..., ... 1I- "" α A ~ r must not be less than 2c + 1 bit time spans due to the bit frequency of the chers,

that is, even with the minimum bit frequency / _{m (} "

PCM time division multiplex telecommunications network

mation bit frequency / <"/. From F1 g / 2 it can be seen that _{(πι +} „j _{mtn =}

like the pulse frame of a PCM time division multiplex switch 35 ltll dch jg ^ ÄS? £ Ä Ϊ

_m <»

management office by jg ^ ÄS? £ Ä αΪ must be fulfilled. In addition, one should overflow one

extended _W1 rd; »^ ¹ ? ⁸ ^^^^ Pulse buffer memory can be avoided, which is when it drops

occur ^^^^^^ andIor the storage time of a buffer memory down to zero

frame transmitted PCM word of a gn / maximum sum of the buffer storage times

_r Ä ° e ⁿ n ^S1 pS :; E üLra _g ^{n d} ene ^as a PCM word speaking storage capacity P of the other

Response time channel VKl inserted dummy bits ; BB of buffer memory conditional:

by one bit of the preceding signaling or syn- P> K + nj _max ■ / max.

SSSSK ^ SÄt ^ SaÄToS: «The demands raised are now taken into account αΪΞ ZeSSl B VKl) transmitted PCM through a minimal storage capacity generation time channel tz β. κλ ) _{6 of one I puff which} approximated to the rear

STaS pTg ^{g to} come back, so there is still equal to the sum of the increased by 1 bit and

to am r 1 g. 1 /. pcM time division multiplex lines L then with the quotient of the maximum and minimum

SnA ^ uiJA ^ SSSWdieiidens-nuto bit frequency multiplied by double the

PC M Zdtmuiiplexlitungen inserted delay blind bit limit storage volume, from the maximum PCr-l-ZeitmulUpiexieu g ε _{B number γοη during a} period of duration

rungsghede. Fl Vl ^ J ™haben _{1 and p2 one of the} total runtime on a PCM time division multiplex? ^r "r? Si ^ TS ways, the line loop generating dummy bits and from the in

i ihlih artificial 55 bit expressed maximum change of the mentioned

? ufferr _C he? Sti b ^ TS wise, where the line loop can be generated dummy bits and from the in

rfrh C ^ flyback time including artificial 55 bit expressed maximum change of the mentioned

save and steT of the buffer storage times is the total runtime, i.e. if the storage capacity

gXne overall course of the between the two PCM- P _min at least approximates the condition

P _ntn = (2c + 1) ^ + ^N - ^ - ■ if _max - /..-) + 2 · Δλ ■ f _m

fmin JmIn

7 · --.- ,, ■ • "» r.rn.TQaiieder Vl VZ frequency and then it is not their running time ", but the fact that the V ^m ° & ™ ^a f £ ^ tei ™ iaien * emerge 6 _5-number k which they each _standing continuous bits independently hangige constant ^ "^^^ _A nalogue-encryption of the instantaneous bit rate, which has _esscn in the pre ™ i ™." dua ta the V ™™™ * ^ ^ _jAM given equation by an * additionalcuuiiK «· (shift register) would affect the subtracted subtracted:

^v wo jun / 170

9 10

D ίΊ y. ι 1 \ / '»<" ι N- KB f \ \ ") Λ1 f" il fmax - fmin

Pmin = (2 · f - | - 1) - - -! - (J max - JmIn) + 2. ■ Δ λ ■ J _m ax - 1 K

Jmin "./min J min ·,

which, however, is practically negligible. Practically To without experimental runtime comparison <-Ii at

In both cases, a minimum storage capacity is ensured.

that even with the mentioned minimum

_ ' N ■ KB ■ fuBmax. ,. Storage capacity P _{min of} the buffer memory Pl, Pl die

Awifn - 1. + -r -, - ----- \ -it \ i total running time on the PCM time division multiplex line

loop equal to an even multiple of

wherein 2-.1 is in bit off io current fnfonnationsbitrahmendauer be sufficient / wergedrückte maximum total transit time change designated the eventually the delay elements Vl, Vl is net, such dimensioned that when candidate lines that they respectively an artificial Runtime 0.15 bits per kilometer of simple line length, which may be the same as the maximum natural length. Runtime on the time-division multiplex line and the minimum The dummy bit limit storage volume of the buffer 15 Sum of the buffer storage times with the maximum bit memory Pi, PT, is expediently dimensioned so that the frequency-reduced half of the maximum total at the maximum permissible bit frequency / max is the run-up time:
belonging PCM time division exchange and IiN-KB 2-4-11

minimum permissible bit frequency / _m j _{n of} the counter-time κ = - - J 2 · X _max ^C -— .

multiplex exchange as well as sending out a 20 2 [ fmax / max ί
Blind bits through this counter-time division multiplexing

The above equation applies in this case to the formation of the minimum spacing generated dummy bits larger than the respective delay element remains as analog zero. This can be achieved by a delay element with a bit frequency-independent running time; Minimum dummy bit limit storage volume c of a buffer when designed as a digital delay element with bit memory, which is at least approximately equal to the minimum distance between two dummy bits, expressed as a frequency-independent number of bits, the following equation applies to this number:
bits, multiplied by the quotient of the maximum, _ j,

and minimum bit frequency and reduced by the ~ * >" ^K ' ^B ~ -' ^λτηαχ 'f ^max - 2 c - 3!
distance between two dummy bits reduced by 1 bit. The writing into a buffer memory and the reading out of the buffer memory for this minimum dummy bit limit memory volume is then appropriately controlled by counters whose counting volume corresponds to KB \ 1 KB 1 1 memory capacity of the buffer memory. D a at

hl) \ -fmax, ^the writing into the buffer memory is done by a

^s I / min s fmax J 35 hereinafter referred to as external counter

controlled, which is in the external information bit clock,

where s denotes the number of possible dummy bits per information ■ ie with the information bit pulse frame freed from received dummy bits (s is the internal bit rate, is advanced; the readout should be equal to or less than 1). F i g. 3 gives for the from the buffer memory is carried out by a circuit arrangement shown below according to FIG. 1 controlled an example of 40 counters designated as internal counters, which are incremented in the course of the buffer storage time Tt _{2 of} the buffer-internal information bit clock, memory P1, this example being based on the assumption that there is one reason in each of all the buffer memories that the Bit frequency J _{1 of} the switching PCM time division switching center simultaneously issued VStI is read approximately equal to the minimum bit frequency. It is expedient that all fmin is that the bit frequency / _{2 of} the switching 45 buffer memory of a PCM time division multiplex exchange VStI is equal to the maximum bit frequency f _max are placed equal to each other; for this and that from the exchange VStI to read out from these buffer memories, only one exchange VStI is then required (from a third internal counter).

processing point originating) blind bit BB is transmitted; In the case of the one carried out according to the invention, the upper part of FIG. 3 the bit stream arriving in the memory P1 when dimensioning the buffer memory capacity and the bit stream read out from the general number ZiT · B of information bits per buffer memory P1 is shown. Pulse frame is not divisible by the number of memory As can be seen from Fig. 3, under the previously set a buffer memory; there is therefore a specified condition at the end of a dummy bit - there is then also no fixed assignment between the period of K · B / s information bit, the storage time 55 of a specific memory location and a specific one, which is certainly still greater than zero. Appropriate bit of a PCM word given. In order nevertheless to be sure, the blind bit limit storage volume c is provided that a buffer memory P is set with 1 or 2 bits in a specific storage location. Information written into a buffer memory - It should be noted at this point that the preceding bit is read out again at the correct point in time certain phase position to each other is generated frame, which point after falling below. This can now expediently occur in the manner of the dummy bit limit. If it is not clear from here that the position of the internal counter is not possible under the circumstances to be discussed, then the beginning of a pulse frame of the internal bit clock must be noted at a later point in time of the dummy bit generation and with the position of the external counter possible further reduction of the Buffer storage time at the beginning of the pulse frame of the external bit clock is compared from the start when determining the dummy bit limit and when it is determined that the counter settings are the next step of the external

11 ¹²

Counter is delayed by a bit period. This giving external bit clock is applied whereby a decoration can be brought about by suppressing an Im- also with the PCM reception time multiplexing pulse of the external bit clock connected to the input of the external PCMe syncronous response SE via counter. The comparison of its output rt and the · blocking input of a blocking signal upstream of the change signal at the beginning of each pulse frame 5 input of the external counter EZ , the output of which is repeated, if necessary, each time a dummy bit occurs; rnlhler on the r _e fo a bit time span is stopped until PCM receive Zeitmultiplexle.tung a PCME We, -chSl ch the counter positions correspond to each other. Switching of the external payer EZ prevents Since normally a pulse frame of the internal bit control of the read-out from the memory PS clock is timed after the corresponding pulse frame io, always from the exchange clock generator TG the relevant -xteYne bit clock begins PCM time-division multiplexing switching center counter position comparison in each case the controlled internal counter JZ , which is controlled in the internal information brit clock, is provided at the beginning of a pulse frame-switched internal counter JZ, the output of the external ßitt clock with that position on the side via a decoder ^ D nut the taxes

sä SS ^ at ssssz

TnternzzählisteHung just a difference from the frame of the internal bit clock can be inferred

? f iw P «Kb« "fst ^mö 8 ^e · ^{with a memory JS for those in this eye} "

F U4 shows some internal counter settings connected to the circuitry

Fin ₇ plits in the circuit arrangement after the internal counter position memory / S on the one hand and on

fT? 4 leads to a PCM reception time division multiplex 25 the output of the external counter EZ on the other hand is a

lei une PCMe are connected to a comparator V which has P memory locations and which is operated by the synchronous

Bufferersoeicher PS "de! On the output side to the coupling field wortempfänger SE via its output ea each.ls only

71 de ^P relevant PCM ZeUmultiplexvermiUlungs- at the beginning of a pulse frame of the external bit clock

S leads to the control of the registered mail in which it is to be unlocked and the in this' eye-

sSSherA is dn External counter EZ provided 30 looking given counting position of the external payer EZ

SUie via a decoder ED with the position de stored in the memory JS,

SwnSsct Sb ^ atterschaltungenfi; Internal counter JZ compares. The comparator V g.bt

via which the PCM reception time muk- each time a lock pulse is sent to the blocking

SSÄÄ «dt to individual storage locations input of the external counter EZ

piexieuungcii_ r _{puffe ichers} ^ _{5 is} connectable. 35 barrier gate when compared with each other

c cV; t; a _w irH the external counter EZ from a counter positions each other in the sense of the above

^^^ i ^ Sii ^ Siivi ^^ ^pcMe ***** ^{not according to} P ^reche «.. ^s ° ^{that the next step} ;

Connected extreme clock regenerator ET with which the PCM reception time division multiplex line PCMe is measured on the external counter EZ delayed by a bit time span.

1 sheet of drawings

Claims (7)

ι 2 eration of the writing in a buffer memory Claims:. (PS) by an external counter (EZ) and 1. PCM time division multiplex telecommunication network with a control of the readout from the buffer memory plurality of among each other via PCM time multiplex 5 (PS) by a PCM time division multiplex connected in the internal information bit clock internal counter (JZ) the position exchanges in which with the help of Buffer the internal counter (JZ) each at the beginning of a pulse storage a compensation of bit frequency under-frame of the internal bit clock is noted and carried out with different, in that when the position of the external counter (EZ) falls below a minimum limit io of a pulse frame of the external at the beginning of the buffer storage time Bit rate yer- (dummy bit limit) from the relevant switching equals and if a dummy bit is not identified, the next step is marked by a minimum storage capacity of one of the external counter (EZ) buffered by a bit time span that is at least approx hert is about to hesitate. the sum of the increased by 1 bit and dqnn 15 with the quotient of maximum and minimum
Bit frequency multiplied twice the dummy bit limit storage volume, from the maximum Jn conventional telecommunications, especially telecommunications A number of times from the telephone exchange takes place during a period of time Duration of the total run time (outward and return time 20 of chronologically continuous analog signals in spatial including artificial transit times and total borrowed from separate transmission channels the buffer storage times) on one between two. Make newer telephone exchanges PCM - time division exchanges run - not from the space division principle, but from the time use of the blind multiplex principle that can be generated using the PCM time division multiplex line, whereby bits and out of the maximum 35 virtual analog signals expressed in bits. In the last Change of the total term mentioned is. In addition, telephone exchanges 2. PCM time division multiplex telecommunications network according to systems meaning in which a transmission Claim 1, characterized in that the blind (also temporally discontinuous) digital bit limit storage volumes the buffer so signals takes place; In this context, it is measured that with the maximum permissible bit 30, special significance is given to pulse code modulation (PCM) frequency of the associated PCM time division multiplex obtained, at which to periodically successive exchange and minimum permissible Bitfre- times the amplitude instantaneous values of the sequence of the two-way time division multiplex exchange voice signal are mapped by binary words, as well as sending out a dummy bit through these which are then transmitted. The basic task of a Against - the time division multiplex exchange the buffer 35 PCM time division exchange is then storage time between two at the minimum distance that leads to the exchange generated dummy bits remains greater than zero. '' PCM receive time division multiplex lines in time channels 3. PCM time division multiplex telecommunications network according to Anlen, who use these lines for the individual connection 2, characterized by a minimal fertilization are allocated to the occurring binary words Dummy bit limit storage volume of a buffer memory 40 desired connection according to selected, chers, which is at least approximately the same as the PCM transmission expressed in bits from the exchange minimum distance between two dummy bits to switch through time division multiplex lines, namely multiplied by the quotient of the maximum to the time channels that are used on these lines and minimum bit frequency and reduced by the two connections are allocated. The four-wire 1 bit reduced minimum distance between two moderate operation of the blind bits used in PCM time division multiplexing is. agency arriving or departing from 4. PCM time division multiplex telecommunications network according to incoming PCM time division multiplex lines accordingly Claim 3, characterized by a blind bit limit - it is always a four-wire type Storage volume of a buffer memory of 1 or connection, d. i.e., are connected 2 bit. 50 both transmission directions must be considered separately. 5. PCM time division multiplex telecommunication network according to the visible ones. For the transmission of the im Claims 1 to 4, characterized in that the course of a call connection to be transmitted with the mentioned minimum storage capacity binary words via one with such a switching device Buffer memory of a four-wire PCM exchange connected to a PCM time division multiplex connecting PCM-ZeitmuKi- 55 time division multiplex line usually (with consideration of aul plex line the technical control simplifications with regard to the time division multiplex line added term elements each have an artificial association of the two over-term cause the same time channels ir natural running time on the time division multiplex line to the individual time division exchanges) ir and the minimum sum of the buffer storage times 60 is the same in both transmission directions at the maximum bit frequency, reduced half of the time channel within the respective, on the Amtsder maximum total runtime. pulse frame of the relevant transmission-side switching 6. PCM time division multiplex telecommunication network according to the station-based pulse frame used (see claim 1, characterized in that all, for example, Proc. IEE, 111 [1964], 12, p. 1976 to 1980, 1976 buffer memory (P1) of a PCM -Time division multiplex- 65 r. Sp., M.). are the same as each other. Prerequisite for a perfect through-switch 7. PCM time division multiplex telecommunications network after being connected to a PCM time division switching center Claim 1, characterized in that in the case of control that the binary words to be switched through in each case