DE2219288B2 - Keypad multi-press protection arrangement - Google Patents

Description

The invention relates to a keyboard multiple actuation protection arrangement, in particular for data processing devices, for connection to a keyboard matrix with keys, each of which is divided into a first and a second state can be brought to query the keyboard matrix in successive scanning cycles, to detect loads in their second state and to provide a single actuation signal for each scan cycle indicating each key that is in its second state in this scan cycle and which, however, was not in its second state in the immediately preceding scan cycle.

Keyboards with a plurality of writing wires and reading wires arranged in a matrix-like manner, one A large number of manually operated switches are used to selectively connect the write and read wires, are from DT-AS 10 30 069 and DT-AS 11 31 435 known. DT-AS 10 30 069 also discloses means for scanning the writing wires and reading wires in a timed manner. Such keyboards form a known means for feeding information into data processing devices. However, the disadvantage of such keyboards is the fact that that if two keys are accidentally pressed down at the same time, garbled information occurs which leads to incorrect coding.

According to the state of the art, such operating errors are prevented by switching on a two-key reverser that excludes N keys, which is also available under the abbreviation »NKL / 2KR« is known. With this device, the coding of a specific key is only transmitted if it is the only key depressed on the keyboard (N-key lock) and moreover only once with each occurrence the above condition (two-key reverser). This known device also has disadvantages, which consist in the fact that a second key is pressed down when writing is very fast and not entirely uniform can be released before the first one is released. The typing staff must therefore constantly strive to keep up with

write more smoothly, not too fast, which reduces work performance will.

The object of the present invention is to provide an arrangement of the type mentioned at the beginning with which higher stroke speeds are possible while avoiding double actuation errors.

This object is achieved with an arrangement according to the invention of the type mentioned at the beginning, which is characterized by a storage device for Receiving actuation signals from the keyboard and storing the signals representing the state of the keys during the cycle during each Cycle, a comparator device for both receiving actuation signals from the keyboard in each scanning cycle and for receiving in the Memory device stores actuation signals representing the previous scanning cycle and, in each cycle, those from the keyboard compare received actuation signals with the actuation signals stored in the immediately preceding sampling cycle, and an output terminal of the comparator means for generating a key detection signal to each Point in time at which the comparator device receives an actuation signal which indicates a key in its second state, but does not receive an associated actuation signal for the same key from the previous scanning cycle, whereby a key is identified which is in its second state in the respective scanning cycle and which is not in theirs in the immediately preceding scan cycle second state, and thereby a key detection signal is generated only for newly pressed keys.

This arrangement enables hitting while reliably avoiding double actuation errors of the keys at almost any speed, since the duration of a single scanning cycle is simple Way so small, e.g. B. 100 microseconds can be held that an actuation of two keys within such a cycle is practically impossible.

Further advantageous refinements of the invention emerge from the subclaims ".

An exemplary embodiment of the invention is shown schematically and by way of example in the figures. Show it

F i g. 1 and IA a circuit diagram of an embodiment the invention,

F i g. 2 shows a section through the keyboard to show one of the keys and its relationship to the reading and writing wires and

F i g. 3 is a timing diagram for the sampling pulse generator.

Reference will now be made in detail to the drawings. 1 and 1A, a keyboard double-actuation monitoring arrangement according to the invention has a two-dimensional scanning matrix 10. The matrix contains a plurality of writing wires 12 arranged along an axis of the matrix, namely along the vertical axis in the illustration, and a plurality of reading wires 14, which are arranged along the other axis, namely the horizontal axis in the illustration. The writing wires or lines 12 are sequentially pulsed by a pulse writing circuit 16 while the reading wires or lines 14 are scanned by a multiplexing device 18. The timing of both the write circuit and the Multiplexvc: direction takes place from a common counting register 20, which is operated by a clock 22, which generates a first output signal Φι and a second output signal Φι , which is delayed relative to Φι in 180 ° The connection from the counting register 20 to the write circuits 16 is established via a decoder 24. The register 20 is incremented with each pulse of the clock generator, and for each advancement of the register a new switch position is selected and a new binary output coding is provided. Each key switch in the keyboard has a position in the matrix depending on the coding assigned to it, which in turn is determined by the respective writing or reading wire selected.

F i g. Figure 2 shows a key and its relationship to the matrix; this button is generally similar to the one that in U.S. application by Victor M. Bernin, serial no. 879 220 of November 24, 1969 for a solid-state keyboard is disclosed and claimed in detail.

According to the illustration in FIG. 2, each crossover between a write wire and a read wire is passed through an annular ferrite core 26. It is a magnetic body 28 of the reverse A U-shape made of steel or another magnetic material is provided, the depending leg 30 and 32, each carrying magnets 34 and 36 which are magnetized in opposite directions. It can e.g. B. magnet 34 has a north pole on its left side in FIG. 2 and have a south pole on the right-hand side facing the ferrite core 26. Similarly, magnet 36 has a north pole facing core 26 and a south pole on the distal one Page. The depending legs 30 and 32 and the arc 38 connecting them of the inverted U-shaped Bodies form the magnetic circuit. The arch 38 of the U-shaped body is attached below a non-magnetic finger operated push button 40. which may consist of plastic, for example, and a central assembly 42 below the push button is provided with a spring return device (not shown) to the button, as shown, in a normally raised position to hold over a flange 44 of the button structure, the aul a plate 46 rests, which can form a common plate for the entire keyboard.

The magnets 34 and 36 normally hold the annular core 26 in a state of magnetic saturation, and therefore no signal can be transmitted from the writing wire 12 to the reading wire 14. However, when the push button is depressed, the magnets move away from the ring-shaped core, which then leaves its magnetically saturated state, whereby a signal on the write wire is inductively coupled to the read wire, together with it through the ring-shaped core 7 * is passed through.

In order for the present invention to be applied to a scanning system

^ft ° stern can be operated, the button must be pressed for little at least one scan cycle in the depressed

Remain in position. However, there is one scan cycle

usually on the order of 100 to 50

Microseconds, and. it would be practically impossible to i

this time to press a key down and up to let come. Therefore requirements with Be not worried about the time when using the keyboard what matters.

22 19

Although the probe system makes the operation of any key switch independent of the state of any one another key on the keyboard, the signal output of a depressed switch is when a system of this kind inevitably repeated once for each duty cycle due to its nature, as long as the switch remains in its depressed position. It is obvious that only that first encoding generated by a depress signal can be tolerated. Therefore all '° subsequent codings can be switched off. In particular, a signal appears at the output when a button is pressed. This pulse appears in a unit of time corresponding to its position in the Matrix, which also corresponds to the corresponding count or '5 coding in register 20. This impulse switches a sampling generator to be explained in more detail below, which generates a single sampling pulse which coincides with the correct coding from the register.

Before proceeding with the signal canceling circuit and the scanning signal generator in this description, it is advisable to come back briefly to the matrix 10. A typical matrix for a seven-digit ASC 11 code would be, for example, a 16x8 matrix, consisting of 16 write lines and 8 read lines, which result in a code combination of 128. 128 will also be immediately recognized by those skilled in the art as 2 ⁷ , ie 7 bits in a binary coding. The write scan circuit consists of a 1 in 16 decoder connected to 16 line driver amplifiers. The decoder 24 takes an address part of 4 bits (LSB). and the 8-input multiplexing device 18 accepts an address part (MSB) of 3 bits from the counting register. The multiplexing device advances one digit for every 16 scans of the writing circuit.

A write wire equalization system is used in the matrix to reduce crosstalk between the write and read wires. A common write return line 50 is fed back through the write wires in close proximity to them. The signal of this write return line is of the same amplitude as the write wire signals, but of opposite phase. The field surrounding the write lines is therefore canceled, as a result of which the undesired write signal is reduced to such an extent that it cannot be coupled to the read lines.

In order to determine the ratio between the signal in the output signal of the multiplexing device . and improve the interference level zn, an additional read line 52 is built into the matrix. This line or wire is routed along the same path as the other read lines, but is not looped through any of the ferrite cores 26 füiiri a gleichtaktiges interference signal (coherent noise), and this wire is connected to a differential amplifier 54, ^fo connected plexvorrichtung to which the Ansgangsleitung 48 of the multi Since the interference on the line 52 similar to that on each of the sense wires 14, it is of the differential amplifier 54, only the difference between them, that is the code signal, amplifies the output signal 56 of the Differenzverstär- ** kers 54 is transferred to a Summrerungskreis 57, the output of a level or threshold detector 58. the Schwenwertdetek gate is in turn connected to a pulse stretcher 60 connected to the entrance steering rimpulse of a phase which is shown in FIG. 3 are indicated as Φι, are transmitted from the clock 22 to 62. The output signal of the pulse stretching device is taken at 64 and goes directly at 66 to a pulse generator 67 which is connected to an input of a scanning lock gate 68.

The pulse stretching device 60 is also connected to a shift register 70 to which an input control pulse from the clock generator 22 is additionally transmitted at 72, but of the opposite phase to the pulse transmitted to the pulse stretching device at 62, as shown in FIG. 3 indicated as Φι.

The keyboard pulses from the multiplexer are relatively narrow pulses (see Fig. 3, third line) and nominally coincide with the start of a clock pulse. The switching pulse to the shift register, however, is delayed by half a clock period, namely as Φι to Φι (lines 2 and 1 of FIG. 3). The pulse stretcher stretches the narrow input pulses (line 4 of Figure 3) so that they can overlap the advanced switch register pulses so that the keyboard data pulses can be shifted into the register by the multiplexing device.

The output information as it is taken from the shift register at 74 (see also lower line of the F i g. 3) is transmitted to an inverter 76, and the output information of the inverter is applied to the Comparator device 68 transmitted. This can also be interpreted in such a way that the output information from the pulse generator 67 with the delayed and inverted signal pulse of the shift register in one And-term is compared. The first signal pulse that is generated as a result of the actuation of a switch is thus lead to the generation of a sampling signal because the delayed pulse is not present. However, the following signal pulse in the next or other subsequent sampling cycle by the delayed pulses of the switching register blocked As a result, only one scanning pulse is generated for a given keystroke no matter how long the key in question is held down.

It can be seen that the in FIG. 2 keyboard an analog switch shown is because its output signal level proportional to the switch position is To this switch type to use in practice, a hysteresis circuit requires Without a hysteresis of the sampling circuit would be quite susceptible to noise, which would lead to an unstable scan (multi-scan).

There is therefore a positive feedback loop 80 from the output 74 of the shift register to the input of the Summing circuit 57 provided, which provides the required hysteresis

In addition to the coded output signals in the As discussed above, it is necessary in a keyboard to provide a contiguous single channel non-coded output or a function output. The function keys are built into the wiring matrix 10 and operate in it in the same way as the coded ones Keys. The output of such keys is generally uninterrupted as there is one output for each Sampling cycle is present The output signal will be received from inverter 76 as shown at 82 and on the D input of one or more

»Dw flip-flops 84 transferred. Any flip-flop circuit 84 has an input from a decoder 88 at 86, the decoder at 90 are connected to the output of the counting register 20. Each decoder generates a clock pulse for the Flip-flop circuit, which is timed with a corresponding function signal from the pulse of the multiplex device coincides. When a function key is pressed, the corresponding one changes Flip-flop circuit its state and remains in this state as long as the function key is pressed is. Since the flip-flop circuit its state only during the positive edge of the decoding pulse can change, this creates an uninterrupted output signal. The "D" flip-flop circuit thus forms an uninterrupted output signal of high reliability at a low cost in contrast to known devices in which it was necessary to give a series of pulses with unsatisfactory results rectify and filter. Each of the flip-flop circuits has an output indicated at 92 on.

No scanning signal is allowed through a function signal or during the transmission of a function signal be generated. As a result, all decoder outputs 86 are connected to an OR element 94, the output of which is connected at 96 to the comparator 68 to disable the sampling signal which otherwise would be generated during a term of office.

Pushbutton control circuits are provided for switching to the above operating mode or control mode. These signals are generated in a manner similar to a functional circuit and at 104 to a Code translator 100 is transmitted to modify the code of the counting register as necessary, thereby at 106 the correct coded output signal is formed. The output 98 of one of the flip-flops 84 is connected to the code translator 100, and it is also an input from the count register 20 at 102 available. The encoded output signal 106 is also connected to a parity generator 110 at 108 to at 112 to form a parity bit output signal.

It should be noted that the switches or buttons used in connection with FIG. 2 were discussed, Are analog switches, but can be operated together with digital circuits. The usage of Analog devices in digital circuits has always posed difficulties, however this is Switch type superior to all other switches, as this switch does not have a break contact, which could possibly fail. As for the use of this switch in the operation of the present circuit makes possible is the simultaneous use of the hysteresis feedback loop 80. The output signal from the switch usually contains some noise components. When the switch is depressed and its output level increases, then finally the threshold value becomes the detected Threshold reached. Due to the randomness of the disturbance, the signal value fluctuates for a given number of Sampling clocks between a value above and below the threshold, resulting in multiple sampling leads until the signal has grown enough so that the noise components do not decrease the Can bring about signal value below the threshold value. If a hysteresis is used, however, after the first triggered signal, which is generated by the threshold value detector, the shift register output pulse added to the input register, and thus the input value is currently sufficient above the threshold value, so that a fault cannot affect the circuit. The hysteresis feedback loop is a gate feedback circuit in nature and hence the hysteresis only applicable to depressed switches. The other switches are therefore unaffected.

Two features of the matrix deserve particular interest, namely the use of the common Write return parallel and opposite to the write wires, creating a balanced writing system with reduced field radiation and consequently reduced interference and fewer spurious signals which, if inserted into the read wires, could cause improper operation. the Use of the common common mode signal together with those connected to the differential amplifier Multiplex read wire signals further reduce the noise level and act in prevention of a fake operation with

It should also refer to the use of the "D" flip-flop facilities be pointed out, as well as the associated signal decoder circuits, the acquisition serve an interrupted function output signal.

For this purpose 3 sheets of drawings

Claims (3)

Patent claims: 1. Keyboard multiple actuation protection arrangement, in particular for data processing devices, s for connection to a keyboard matrix with keys, each of which in a first and a second State can be brought to query the keyboard matrix in successive scanning cycles to in to determine which keys are in their second state and to provide a single actuation signal for each scanning cycle that indicates each key, which is in its second state in this sampling cycle and which, however, is in the immediate state previous scan cycle was not in its second state, characterized by: a memory device (70) for receiving actuation signals from the keyboard and for storing the signals representing the state of the keys during the cycle during each cycle. a comparator device (68) for receiving actuation signals from the keyboard in each scan cycle as well as for Receiving actuation signals stored in the memory device which represent the previous sampling cycle, and to compare, in each cycle, the actuation signals received from the keyboard with the actuation signals stored in the immediately preceding scanning cycle, and an output terminal of the comparator device for generating a key determination treatment signal at each point in time at which the comparator device receives an actuation signal receives that shows a key in its second state, but no associated actuation signal for the same key from the previous received scan cycle, thereby identifying a key which is in its second state in the respective scan cycle and which is not in its second state in the immediately preceding scan cycle Condition, thereby generating a key detection signal only for newly printed keys. 2. Keyboard multiple actuation protection arrangement according to claim 1, characterized in that the Comparator device (68) has a first and a second input terminal, of which the first input terminal is provided during serial scanning of the keyboard a serial in-. . «Rmations signal train, also a den Output of the storage device with the second input terminal of the comparator device connecting sound (76), a device (22) for • erial advance of an actuation signal train from the storage device to the second input terminal of the comparator device synchronously with the Recording of the actuation signal train received in real time scanning of the keyboard on the first one Input terminal, the output terminal of the comparator device thereby generating a key detection signal whenever the first Input terminal receives an actuation signal for a pressed key from the keyboard scan. while the second input terminal does not receive an associated key pressed signal for the previous scan of the keyboard 3. Keypad keystroke protection arrangement according to claim 2, characterized in that a scanning device (20, 24, 16 and 18) is provided, with which each key of the keyboard is scanned on a predetermined scanning path in order to generate an actuation signal train in which a time interval is assigned to each key of the keyboard and in which an actuation signal is contained in each of these time intervals when the corresponding key is pressed, wherein circuit devices (54, 57, 58 and 60) the scanning device with couple of the memory device in order to supply the signal train to the memory device so that signals corresponding to a complete scan of the keyboard are stored therein, and wherein a further circuit device (67) the scanning devices with the first input connection the comparator device connects to serially feed the signal train to the first input terminal.