DE2131159C3 - Color synchronizer circuit - Google Patents

Description

21 51159

Efc y including that its composite signal due to the phase identification

Sensitivity is small that its frequency control line of the oscillator circuit. Therefore, the

characteristic is not linear and that a temperature frequency due to variation of the added to the adder

compensation required .st. . xo led control voltage can be controlled freely. the

To overcome this Schwengkeita frequency control range or the phase control range, a voltage-controlled oscillator has already become known, can be freely chosen how it applies such a reactance-vanation element, including the selection of various factors. For example, in the essay "On IC Approach degree of phase shift by the Phasento the Subcamer regeneration problem," IEEE Trans _l5 slide and the frequency-phase characteristics of the actions on Broadcast and Television Receivers, Vol. Tank circuit is desired, ie, the BTR-15, No. 2, pp. 224 to 227, 1969, a color sync quality factor of the oscillator circuit. Furthermore, chronizing circuit can be specified which has such a voltage-controlled oscillator with a full-voltage-controlled oscillator. The oscillator used in this known circuit, which can be continuously adjusted, has ao if the phase shifters are arranged in such a way, however, that they have the deficiency that it has only one narrow absolute frequency values of the phase lead and the phase control range and the maximum variable delay between them are the same
rich in phase is only 45 ^ü . The invention is based on the drawing closer oscillator also has the disadvantage that it explains one. It shows

Unbalanced tax area due to the 15 F i g. 1 the block diagram of the basic version

stand shows that the variable range from -18.5 to the color synchronizing according to the invention

+ 26.5 ° is enough. In addition, the color synchronization circuit used is voltage-controlled oscillator

circuit with this oscillator difficult to inter-

grate because of a large number of external structures. 2a and 2b are vector diagrams showing the vectors

elements and connections, so that an improvement 30 in the oscillator of FIG. 1 occurring signals

in the manufacturing yield and the degree of integration,

(Relationship of the integrable parts to the non-integrated part. 3 the circuit diagram of an embodiment,

gratable) of the parts cannot be expected. F i g. 4 waveforms at different points

The invention is based on the object of providing one of the circuit of FIG. 3,

Color synchronization circuit of the 35 F i g mentioned at the outset. 5 the circuit diagram of a further type of embodiment specify the, with simultaneous easy integration example,

availability for the adder in the oscillator such a F i g. 6 the block diagram of another embodiment

Structure has that the relationship ρ -f q = 1 is always an example in application with a color synchronization

is filled, where ρ and q are coefficients which the signaling circuit,

parts of the output signals of the two phase shifters 40 FIGS. 7a, 7b and 7c are vector diagrams showing the

on the output signal of the adder. Vectors of the signals at different points in the

This task is carried out according to the characteristic of the block diagram in FIG. 6 represent

Claim 1 solved. F i g. 8 the circuit diagram of a more detailed version

The two transistor pairs are used to modify the embodiment of FIG. 6 and

the division ratio of the signals from the phase 45 F i g. 9 signal curves at different points

Shifting and thus enabling the adder to perform that of the circuit of FIG.

The relationship ρ + q = 1 is maintained. The oscillator is for According to FIG. 1, an amplifier 1 gives an output, an integrated structure well suited. It has a signal ά from which is generated by two phase shifters 2 and 3 ge frequency control sensitivity, which sends the ten to, so that a signal b, which is around Q ₁ in the hundredfold of oscillators, has a capacitance 5 ° phase leads, and a signal c, which is used in the phase by zitäts-Variations-Diode, as well as an er Θ _{2 is} delayed, generated by the phase shifter 2 and 3 extended and well balanced phase control range. These two signals b and c are in and finally a control characteristic good linearity, is fed an adder 4, the d a sum signal so that the provided with him (integrated) Farbsyn- generated which verdoppel- the vector sum of the input signals b chronisierschaltung a substantially 55 and c is. This sum signal d is positive in the th and nevertheless well balanced phase control amplifier 1 via an oscillator circuit 5 and coupled to a reduced number of so that the oscillator with the natural frequency of pins and external components in the circuit of the oscillator circuit 5 oscillates. The vectors do the same as usual such circuits. the signals ά, b, c and d are related, like

Which can be seen in the color synchronization 60 according to the invention from FIGS. 2a and 2b. That signals? is

The oscillator used in the circuit works as follows - given by the following equation:
measure:

A control voltage in d - ph + qc (1),
fed the adder to suit the size of the

Output signals of the two phase shifters to vari- 65 where ρ and q are variable coefficients, which the fol-

that satisfy the equation added by the adder:
den should, so that the phase of the compound

Signal at the output of the adder within the ρ + q = 1 (2).

The phase of the signal d can be controlled by feeding a control voltage V _c to the adder 4, thereby changing the ratio of ρ and q.

If this signal d is fed back positively to the amplifier 1 via the oscillator circuit 5, the oscillator oscillates with a frequency and phase corresponding to the phase difference between the signals d and ά due to the phase characteristic of the oscillator circuit 5.

The oscillator of Fig. 1 is a voltage controlled oscillator since the phase of the signal d is controlled by the control voltage V ₀ which is fed to the adder 4 as described above. An automatically frequency-controlled or automatically phase-controlled oscillator can be obtained if the oscillation output signal of the oscillator is compared with a suitable reference or control signal and the system deviation voltage then serves as the control voltage or now the control voltage of the adder 4.

From Fig. 2 b it can be seen that the variable phase range of the signal d is Q ₁ + Q ₂ . Therefore, a voltage controlled oscillator with very high control sensitivity can be obtained by appropriately selecting the quality factor Q of the oscillating circuit S. It is further understood that the phase shifters 2 and 3 can be easily realized by using a coil, a capacitor and an ohmic resistor.

A more detailed embodiment of the voltage-controlled oscillator according to the invention is shown with reference to FIG. 3 and 4, the same reference numerals as in FIG. 1 designating the same assemblies. Referring to Fig. 3, a differential amplifier pair _{consisting of transistors Q x} , Q ₂ , Q ₃ and Qi operate as the adder 4. Another differential amplifier pair _{consisting of transistors Q 6} , Q _t , Q ₁ and Q ₉ is provided so that each differential amplifier amplifies a sinusoidal input signal to a saturation level to obtain a rectangular output signal. A suitable bias voltage V ₆ is fed to a terminal P _h which is connected to the collector of the transistor Q ₅ and to a terminal P ₉ which is connected to the collector of the transistor Q _s . Furthermore, two transistors ß 1 and Q _{10 are} provided in order to achieve a constant current. A switched as an emitter follower transistor Q ₁₁ serves as the oscillation amplifier I. The phase shifter 2 causes, as already mentioned a phase lead to Q _1, while the phase shifter 3 is a phase delay of O ₂ performs a harmonic notch filter 6 suppresses harmonics, and the oscillator resonant circuit has a Kiistaü X. A supply voltage V ₁ is applied to a terminal P ₁ , while suitable bias _{voltages F 1} , V ₃ and V _{4 are applied} to the corresponding terminals P & P ₃ and P _t .

During operation, an output signal ά of the crystal .y is derived from the emitter of the emitter follower tran SBt (BS Q ₁₁ and sent through the phase shifter 2 trad 3, am as a signal S ₉ which is phase shifted by +0, and as a signal C _0, the _x phase shifted by B to occur. the Differenzvexstäxkerpaar to the transistors Q ₆ and _Q% amplifies these signals 4 and 4 to zn a Sättigangspegei in order έ in RechtecksignaJe, or convert C _1. the Recnteckaosgangssigaaie b ± and c, from this differential amplifier pair are fed into the emitters of transistors Q ₁ to Q ₁ , which form the adder 4. The signal b _x is distributed to the transistors Q ₃ and Qn , while the signal C _{1 is distributed} to the transistors Q ₁ and Q _{2 is} distributed so that part of the signal b _x and part of the signal C _{1 appear} at the collectors of the transistors Q ₁ and Q ₃ to be added to each other, The phase of the sum signal thus obtained is determined by the magnitude of

ίο part of the signal c "which occurs at the collector of the transistor Qi, and the size of the part of the signal S ₁ which occurs at the collector of the transistor Q ₃ . The extent of the distributed signal is determined by the difference Δ V between the base voltage of the transistors Q ₁ pnd

Q ₂ or Q _t and Q ₃ so that the phase of the signal (/ within the range of Q _x to - Q ₂ can be varied by controlling the difference ΔV.

F i g. 4 shows the course of the signals a, b ₀ , C ₀ , A ₁ , C ₁ and d. In Fig. 3, the differential amplifier pair , which consists of the transistors _{Q 5} to Q _s , is provided for converting the sinusoidal signals b _B and c ' _o into the square-wave signals S ₁ and C ₁ for reasons to be explained. Even in an integrated circuit, there are generally fluctuations in current gain

"Hfe 5 and the base-emitter voltage V _B of a transistor e, which forms a part of such an integrated circuit. In the circuit of FIG. 3 there is a deviation in the ratio of the current distribution to the transistors Q _s and Q ₆ or Q ₇ and Q ₈

due to a difference of about 20 mV between the bias voltage for the transistors Q _s and Q ₆ or Q ₇ and Qg and due to a difference of about 10 mV between the base-emitter voltage Vbe of these transistors when the level of the signals b ₀ and C ₀

is less than about 50 mV peak to peak. That is, in this case: S ₁ φ - b ₂ and r, Φ - C ₂ . Thus | έ, | continues to apply + | c, |, and signal d is out of phase with signal ά, and an initial phase deviation occurs even if / 7 = q - ■ ¹ U

in equation (1) is that of equation

d = P b _x + qc _x

leads. Furthermore, a change in the ambient temperature can lead to a corresponding change in the

Base-emitter voltage V _B e and the bias voltage lead. This causes a change in the phase deviation, which leads to unstable operation. The transistors Q _& to Q ₃ are preferably arranged for switching operation in order to reduce the adverse effect

due to a fluctuation in these voltages. More precisely, the level of the input signal can be increased so much that the transistors are saturated, so that several on-off signals are output in response to a sinusoidal input signal

appear. With this arrangement, the adverse effect caused by a deviation in h _fe , V _B s and the base bias can be avoided. Such an operation is particularly useful if the initial phase deviation is precisely specified

However, if the specification is not so precise, the transistors need not be arranged for switching operation, and a contradiction with a suitably large resistance value can be connected to the emitter UOt transistors, om the switch.

⁶ Reduce the above mentioned alters to a certain extent. In this FaQ the "'" ~ *

to reduce. In this case, the SmHsefagaBg * signal can be fed in in unsaturated form. BssWT will antfsi * the fluctuations of h ^, Vbs etc.

3

negligible extent due to further improvements in integrated circuit manufacturing technology reduced. In such a case, it is also unnecessary to convert the sinusoidal signal into the square wave signal. When the sine signal no longer needs to be converted into a square wave signal, has that has the advantage that an Obenvellar notch filter, such as described below, does not have to be present in the output circuit.

If the differential amplifier pair , which consists of the transistors _{Q 6} to Q _B , is provided to convert the sinusoidal signals b ₀ and C ₀ into the square-wave _{signals ^ 1} and C ₁ , as shown in FIG. 3, the output signal d of the adder, which consists of the transistors Q ₁ to O ₄ , is a square-wave sum signal with. Harmonics as shown in FIG. 4 pictured. This signal d has harmonics of odd-order such as _{3/0, 5/0,} etc., where / ₀ is the fundamental frequency. On the other hand, the crystal X also vibrates with harmonic vibration modes of odd order, e.g. B. third order, fifth order, etc., in addition to the fundamental mode. Thus, if the crystal X is controlled by the signal d having many harmonics, these harmonics appear in the output signal ά of the crystal X, so that a distortion of the output signal ά the result is what often leads to unsatisfactory operation of the circuit. In order to avoid this, a harmonic blocking filter 6 such as a transformer or a blocking circuit may be provided as the load of the adder composed of the transistors Q ₁ to Qt in order to suppress these harmonics. The same effect can be achieved by an upper shaft barrier on the exit side of the crystal X.

In the arrangement of FIG. 3, the transistors Q ₉ and Q ₁₀ , which serve as a constant current source, can be omitted and the emitters of the transistors Os. Qi as well as Q ₇ , Q _s are grounded directly via corresponding common emitter resistors. In this case, however, there is a deviation in the current switching effect of the transistors Q ₆ and ß _e or Q ₁ and Q ₉ . Therefore, this arrangement is only practically useful if the stability of the oscillator, is not very important in circuit using this oscillator.

F i g. FIG. 5 shows a further exemplary embodiment, the same reference numerals for the same components as in FIG. 3 are used. Die.Phasenschieber 2 and 3 feed the output signals b \ and c ₀ in the base of the transistors Q _t and Q ₁₀ , and corresponding output signals at the collector of these transistors Q ₉ and Q ₁₀ are fed directly to the adder, which consists of the transistors Q. ₁ , Q ₁ , Q ₃ and Q _t. Such an arrangement is advantageous because the circuit is structurally simplified and can operate with a lower supply voltage V _1.

F i g. 6 shows the block diagram of a further exemplary embodiment of the oscillator, the voltage-controlled oscillator being used in a color synchronization circuit. An amplifier including a la Oszfllatorschwingkreises an output signal from ά of 3.58 MHz. This output signal ά is fed to a - + ^ "- phase shifter 2 and a -45 ° phase shifter 3 in order to obtain signals b and c , which are in a vector relationship according to FIG. 7a. These two signals 6 and c are fed into the adder 4, to which a control signal from a phase detector 9 for adjusting the size ratio of these two signals b and is supplied c. the signals b and c, which are controlled in their size ratio by the control signal, are added together, to generate the signal d . The signal d 'is positively fed back into the oscillation amplifier la. In this way, an oscillator is formed by the above assemblies. The relationship between the signal J and the signals b and c is the same as given by the equations ( 1) and (2) were added. Therefore, by setting the size ratio of ρ and the phase q "of the sum signal d in a way be controlled, as shown in Fig. 7b or 7c. F ig. 7 b represents the Represents the case in which ρ <q , while FIG. 7c considers the case in which ρ> q . For ρ ~ 1 and q = 0, the signal d is equal to the signal b, ie d = b, and the signal d is delayed by 45 ° with respect to the signal ä. For ρ = O and q = 1, i.e. d = c, the signal d is 45 ° ahead of the signal α . This oscillating circuit thus forms a phase shift oscillator with a variable one

ao phase range of ± 45 °.

The phase detector 9 in FIG. 6 compares the phase of a pulse signal v & with the phase of the output signal b of the phase shifter 2 and outputs its output voltage to the adder 4 as a phase control voltage. The circuit works as a voltage-controlled oscillator of the automatic phase-locked loop when this phase control voltage is used to regulate the size ratio of ρ and q . The signal, the phase of which is compared with the phase of the pulse signal v &, can be the output signal ά of the vibration amplifier la . The output voltage of the phase detector 9 is zero, and the oscillating loop is stabilized when the phase difference between the signal b and the pulse

signal v _{6 is} 90 or 270 °

The signals b and c can be fed to an adder 8, which is constructed similarly to the adder 4, in order to obtain a signal e , which is the vector sum of these two signals b and c , with a color value control voltage V ' _c in the adder 8 can be fed from an external source. With this arrangement, a chrominance subcarrier e which has a variable phase range of ± 45 ° can be obtained according to the same principle as described above, so that color value regulation is achieved.

The pulse signal vt and the signal c can be fed to a detector 10 to detect the level of the pulse signal v &, and the output signal of the detector 10 can be fed to an ACC (automatic chrominance control) or color lock so that this output signal can be used to control the operation of the ACC circuit or the color lock. Furthermore, the signal c can be fed into the phase detector 9 instead of the signal b

SS and the signal b can be fed to the detector 10 in place of the signal c.

The input signal of the detector 10 can be equal to the input signal of the phase detector 9, the output signal 6 or c from the phase shifter 2 or 3 or the output signal from the amplifier In this case, however, the phase of the pulse signal supplied to the detector 10 must be around 90 or 270 ° relative to the phase of the pulse signal fed to the phase detector 9 will. It is therefore necessary to provide a phase retarder therebetween.

In the preceding description it has been assumed that the phase shifters 2 and 3 a «

609634/14 '

3

ίο

Carry out a phase shift of ± 45 °. According to this design, the phase difference between the output signals from the two phase shifters 2 and 3 is exactly 90 °, and the input signal of the detector 10 is shifted by 90 ° with respect to the input signal of the phase detector 9. This arrangement is advantageous because the pulse signal fed to the detector 10 does not have to have a phase difference of 90 ° from the pulse signal fed to the phase detector 9, so that no additional circuits are required, which facilitates the integration. The amount of phase shift by the phase shifters can be freely selected depending on the intended purpose, so that the phase shift can be * 30 °, i 60 °, and so on. Such a phase shift can be used not only when the oscillator is used as a voltage-controlled oscillator, but also when it is used in a color sync circuit. Furthermore, the size of the positive phase shift through one of the phase shifters does not necessarily have to be the same as the negative phase shift through the other phase shifter. There is no significant obstruction to the operation of the circuit if the difference therebetween is acceptably small.

F i g. 8 shows a detailed embodiment of the color synchronization circuit of FIG. 6, continuously in FIG. 9 shows the course of the operating signals at various points in the circuit of FIG. 8 pictured is.

According to FIG. 8, the supply voltage V _{1 is applied to} the terminal P ₁ , and suitable bias _{voltages K 2} , V ₃ and V _t are applied to the terminals P ₂ , P ₃ and P 1. Harmonic cut filters 6 and 7 are also provided.

A crystal X emits an output signal ά to an emitter follower transistor Q _n . The output signal of the emitter follower transistor Q _n is passed through the + 45 ° phase shifter 2, which consists of a resistor R ₁ and a capacitor C ₁ , and the -45 ° phase shifter 3, which consists of a resistor R ₂ and a capacitor C ₂ , to associated emitter follower transistors öie "nd Qu in order to receive signals S ₀ and C ₀ from the emitters of these transistors Q ₁ and O _17. These signals ά, S ₀ and c ₀ have a sine curve, as shown in FIG. 9 can be seen.

The signal B ₀ is fed into the base of a transistor Q ₈ , while the signal c ' _{o is} fed to the base of a transistor Q _5. The transistors Q ₅ , Q "and Q ₇ as well as Q _? form two differential amplifiers, which the sinusoidal signals o _? ^and <\> ^au f ^{e "nen} saturation level reinforce to be put in square-wave signals S _1, O ₂ (= -O ₁₎ and c \, _έ Λ (= C ₄₎ as in F i g. 9 to convert. The signals i, and C ₁ are fed into the adder 4, which consists of transistors Q ₁ , Q & Q ₉ and Q ₄ , which form a differential amplifier pair, so that a signal d, which represents the vector sum of these two signals b and c \ occurs on a load connected to the collectors of transistors Q ₁ and Qq. The size ratio of the signals O ₁ and c \ is determined by feeding the output voltage of the phase detector 9 into the interconnected bases of the transistors Q ₁ and Q ₄ and into the interconnected bases of the transistors Q ₂ and Q ₃ in the

Controlled in a manner as described above with reference to the block diagram of FIG. 6 was explained. In this case the base voltage of transistors Q ₁ and Q ₄ or Q ₂ and Q ₃ in adder 4 can be fixed, and one of the output signals from phase detector 9 can be used to determine the base voltage of transistors Q ₂ and Q ₃ or Q ₁ and control _{Q 1.} This circuit works in the same way as the voltage controlled oscillator described above. In the case of the color synchronization circuit, the following operation takes place in addition to this operation.

In a manner which is similar to the generation of the vector sum of the two signals S ₁ and c \ , the signals S ₂ and c _{2 are} fed to the adder 8, which consists of transistors Q ₁₂ , Q ₁₃ , Q ₁ , and Q ₁₅ , which form a differential amplifier pair, so that a signal e, which is the vector sum of these two signals S ₂ and r. represents, occurs on a load connected to the Koliektoreri of the transistors Q ₁₂ and Q ₁₄ . A control voltage is similarly fed to the interconnected bases of the transistors Q ₁₂ and Q ₁₅ as well as the interconnected bases of the transistors Q ₁₃ and Q ₁₄ via a chrominance control variable resistor VR in a manner as described above in order to increase the size ratio of the signals S ₂ and C. ₂ control.

The signals S ₀ or c ' _o and c ₀ or S ₀ are fed into the phase detector 9 or detector 10, which compare the phase of these signals with the phase of the pulse signal v _ft and detect the level of the pulse signal v _b. In this circuit, the pulse signal fed into the detector 10 must not be 90 ° out of phase with the pulse signal fed into the phase detector 9, and the two pulse signals can have the same phase. Therefore, the pulse signal v & can be fed into this circuit through a single terminal P ₇ as shown.

In the circuit of FIG. 8, the sinusoidal signals are converted into the square wave signals by the differential amplifier pair, which consists of the transistors Q ₅ to Q ₈ , for the reasons mentioned above. Furthermore, the upper blocking filters 6 and 7 are also present for the reasons given above. That is, these filters serve to eliminate harmonics of odd order, that is, the frequencies of which are three times, five times, etc. the fundamental frequency of 3.58 MHz.

For this purpose 4 sheets of drawings

Claims (4)

7. / and a signal wins whose level from the occurrence claims: or lack of the pulse signal so certain that this signal is used to control an ACC-scarf 1. Color synchronization circuit including a device or a color lock is suitable (Fig. 6). Oscillator with an amplifier, a first 5 5. A circuit according to claim 4 characterized by phase shifter for generating a phase advance that the signal mn of the fixed phase angle <division of an input signal, a second phase to the output signal of the amplifier (I ₀ ) eu shifter for the PtesWr delay of the input signal (c), which is obtained when the output signal passes through an adder with a device for signal (ά) of the amplifier through the second setting of the size ratio of two to io phase shifters (3) ( Fig. 6). signals to be added to each other as a function of 6. Circuit according to claim 4, characterized in that the signal with the fixed phase position is an oscillator circuit, a device for the output signal of the amplifier (la) a for feeding in the output signal of the Signal (b) is obtained when passing through the output amplifier in the two phase shifters and a signal (ä) from the amplifier through the first phase feedback device to the positive return shift (2) (FIG. 6). coupling of the output signal of the adder in 7. Circuit according to claim 4, characterized in that the signal with a fixed phase position is characterized in that the output signal of the amplifier (la) comprises the output adder (4): a first and is the second transition signal of the amplifier itself (Fig. 6). pair of sistors (Q ₁ , Q _s ; Q ₃ , Q ₄ ), for each of which the Emitter of the transistors connected together are, a conductive connection for feeding the phase shifted by the phase shifter The invention relates to a color synchronization switch Signals (S ₁ , C ₁ ) in each case the common emitter 25 device including an oscillator according to the upper of the first and second transistor pair (Q ₁ , Q ₂ ; term of claim 1. Qs, Qu, a conductive connection for the application of such an oscillator is known (FR-PS control voltage (J V) between the base terminals 9 7? 004). In this oscillator, two phase-shifted signals of the first and second transistor pairs are controlled by a control voltage (Qi, Qz ', Qs, Qt) in such a way that one of the signals is phase-controlled and amplified with two pentodes. The shifted signals are divided and combined with one of the stronger signals at the anodes of tubes control voltage (J V) dependent division. Since the phase-shifted ratio in the first transistor pair (Q ₁ , Q ₂ ) and the signals are divided with a phase-shifted signal by a transformer and modulated with the fed modulation signal, they are the same division ratio in the other 35 controlled so that one is small is when the other pair of transistors (Q ₃ , Q ₁ ) is fed, and one is large. conductive connection between the collector of an apart from that such an oscillator The transistor of the first transistor pair and not because of the tubes, coils and capacitors Collector of a transistor of the second tran- can be integrated, the output signal of the transistor pairs. 40 at the point of attachment of the anodes relatively strong swan 2. Circuit according to claim 1, characterized kungen. by a Pnasendetektor (9) to compare the There is also an oscillator known (US-PS phase of a signal (b) with the phase of another 30 02 159), in which only one of two phase-ver signal (v _s ), the an output signal is amplitude-modulated according to shifted signals and generated with the phase difference, is combined by a second 45 to the other. The amplitude of the adder (8), by means of a device that produces a composite signal, can therefore also change signal (b) as the one input signal of the phase. A strong amplitude change, however, has the output signal of the amplifier, due to the disadvantage that a large voltage source and a conductive connection for feeding in a pulse limiter are required to provide a sufficient signal (v _b ) in the phase detector (9) as its oscillation to ensure what the circuit makes use of on another input signal, through a conductive one. connection to the feed of the output signal of the similar oscillators, but also only Phase detector (9) in the adder (4) as its one of two phase-shifted signals amplified external control voltage, which is modulated by a link to 55, are no longer new. This oscillating Infeed of the output signals of the two phators also have those with too great a change ienschieber (2, 3) in the second adder (8), linked to the tion of the composite signal a color carrier (e) wins (Fig. 6). Disadvantage. 3. A circuit according to claim 2, characterized in that the Colpitts oscillator, which is characterized by one of the known ones, that the signal (b) with the fixed phase is 60 voltage-controlled oscillators, uses a capacitance for the output signal of the amplifier (la). -Variation diode as one of the capacitances, the signal that determines the oscillator frequency when passing through the output. A control signal (ά) from the amplifier through the first phase voltage is obtained from this capacitance-varying diode shifter (2) (FIG. 6). fed to the oscillation frequency of the oscillating 4. A circuit according to claim 2, characterized to control 65 gate. by a detector (10), which the pulse signal (v _b ) A reactance variation element such as a capacitance with a signal that a fixed phase-variation diode, which in such an oscillator location to the output signal of the amplifier (la) has tor is used, has the disadvantage that the variation