DE2055238A1 - - Google Patents

Description

PIIN 5? ^r , GILS / TIC

α; ν /: ίί
AkJ ₃ , PHN-5258

Arinr.siüyng VOiVi: Q. Nov. 1970

Tiiel: Door circuit arrangement, a special automatic search and voting system

(Addition to patent. ... ... (patent application P 19 60 Π4.0)

The invention relates to a circuit arrangement for an automatic transmitter search and tuning system for a receiving device, especially for a radio or television receiver, its voting elements, especially capacitance iodes, are electronically tunable, whereby (ixe voting span: u £ possibly after previous reinforcement to one; Capacitor is removable, its charging or discharging, takes place via separate constant current sources, which are supplied by a Frequerizdiskriminator are controllable and 'v.' Where the tuning voltage a circuit arrangement with hysteresis (Schmitt trigger) which controls the KonstB.ntstrcinque3.len .. according to patent P. 1 ° .60114.0

In the main patent is between the Kystoi'escscha.ltung and A D: roi level switch is provided for the constant current sources

BAD OfIfG (NAL

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whose output voltage has three different values (3 V, 5 V, 7 V) can anneal. The lowest value is one of the Constant current sources conducting and the other blocked, at the highest value one constant current source is blocked and the other is conductive and at the middle value the constant current sources become of the difference between this mean value and one, the frequency deviation between the tuning frequency and the transmitter frequency proportional, DC voltage controlled. However, the use of a three-level switch indicates that

agreed to disadvantages, especially because it was used for frequency readjustment it is essential to keep the mean value of the drop level switch constant very precisely, which in particular encounters difficulties integrating the circuit. The present invention aims at the three-level switch avoid and has the characteristic that between the hysteresis circuit and the constant current sources two similar Gates with a first and a second input are switched on, so that each first input of the gate each with one of two gogenfasigen outputs of the hysteresis circuit are connected and that the two second inputs of the gates with the output of a control voltage (AGC) controlled by a control voltage dependent on the amplitude of the received signal bistable trigger circuit are connected.

The invention is illustrated below with reference to that shown in the figures illustrated AusführungsboispJ.elen explained in more detail.

Fig. 1 shows an embodiment example of the indiuigs arrangement and

Fig. 2 a dcitalllertos example of a hysterosis

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Flg. 1 shows a capacitor 1 of which one document is grounded and the other document is connected to it; the collectors of two constant current source transistors 2 and 3 with Emitterwidei'stands U and 5 is connected. In front of the transistor 2, a polarity conversion transistor 6 with a single resistor 7 and a collocator stand 8 is connected upstream. The KonstantetromquG 11 is supplied by a battery (for example 6 V) whose positive pole is connected to resistors 5 and 7 and whose negative pole (ground) is connected to resistors k and. Depending on whether the constant current source 3 or the constant current source 2 is switched on, the capacitor 1 is either charged or discharged. This creates a voltage that rises or falls linearly over time on this capacitor, amplified by an amplifier 9 with a very high input resistance (e.g. IG.FET transistor) which prevents the capacitor 1 from discharging and fed to the capacitance diodes of the receiver, not shown in detail will. The voltage at the Yerstäi'kcrausgang also controls, via a line 25, a hysteresis circuit 10 which is dimensioned so that it switches over at the highest and at the lowest tuning voltage. The hysteresis circuit 10 contains two opposite phase outputs 10a and 10b, the voltages of which are 0 and 6 V or 6 and 0 V, depending on the operating state of the hysteresis circuit. The output 10a is connected to the input 11a of a first NAND gate 11 and the output 10b is connected to the input 12a of a second NAND gate 12. A bistable multivibrator 13 controlled by the ACC voltage of the receiver is connected to the output at both inputs 1 1b and 12b dor gate 11 and

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12 gek O]) JMiIi. Dio outputs 11c and 12c dia sol "gate are over lh Tronnungsdioden and 15 mil", don the base electrodes connected Traiiüistoren 3 and 6. FIG.

A "long-tailed pair" scarf with zv / oi transistors 17 and 18, with common emitter resistance 19 and collocator resistors 20 and 21 is provided to amplify any AFC voltage applied to the base electrode of transistor 17 from the discriminator 2h of the receiver which is proportional to the difference between abstinence and frequency. The base electrode of transistor 18 is connected to ground and the two collectors, ύον transistors 17 and 18 are connected to the inputs of the constant current sources (the bases of transistors 3 and 6). The collector-emitter corner of a transistor 22 is connected between the base electrode of the transistor 17 uhcl /. The base electrode of the transistor 22 is connected to the output terminal of the flip-flop circuit 13 via a resistor 23.

An actuation unit 16 is coupled to the bi.stubile toggle switch 13 and to the jlysteresis switch 10. This operating unit contains two switches 16L and 161 < Avobei the switch 16L to activate the counterclockwise OB and the switch 16R is used to start the right run.

Assume that the switch i6li is operated. As a result, the bistable flip-flop circuit 13 flips into the search mode, its output voltage being high (+ 6v) during the hysteresis circuit 10 comes into the fencing stand, wherein output 10a is high (+ 6v) and output 10b is low (ov). With. both entrances 11a and I Ib dos Gatters 11 is high. the output 11c of this gate is low. As a result: is

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the I) J.oilo 1 ^ 1 and dor transistor 3 conductive. With the entrance 12a dos gates 12 low and input 12b high is the output 12c of this gate high, so that the diode 15 and thus the transistors 6 and 2 are blocked. The capacitor 1 is charged via the transistor 2, so that the capacitor voltage increases linearly. This has the constant change of the tuning voltage for the capacitance diode for clockwise search zui "episode.

When the end of the tuning range is reached, the hysterosis circuit 10 automatically switches over, with output 1Ca low and output 10b high wix ^ d. The two inputs of the gate 12 are high so that its output is low and the diode 15 and the transistors 6 and 2 are conductive. Of the inputs of gate 11, input 11a is low and input 1Tb is high so that output 11c is high and diode '\ h and transistor 3 are blocked. The capacitor 1 is thus discharged via the transistor 2, whereby the capacitor voltage decreases linearly and the search run shifts to the left. If the left end of the AbstirusiiboroicliRS is reached, the hysteresis circuit 10 toggles again x.iin and the Rochtslauf is set in motion again.

During the search, the "long-tailed pair" amplifier arrangement is used thereby eliminating the transistor 22 from the high output voltage of the flip-flop 13 over the resistance 23 is conductive gestoitoi't and thus the AFC voltage at the E.ingfing of the amplifier “17-18 short-circuited against Mhes-o wlxd.

VZ (MUi währniid Roch Ι · - or L.I iikslaul 'a οίηρΓπ iigsuiirdigcr Sr'ii (l (! P ο; ιιρΓ''η, '/; η u'itil,. ·; Ο tilts Sn Folgo dor SU'U-M'iiii;';

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with the AGC saving the stable tilting seliiilfcung 13, whereby its output voltage is low. As a result, the output voltages of the two NAND gate 11 and 12, regardless of the status of the hysteresis circuit 10, are high and the two diodes Ik and 15 are blocked. At the same time, the low output voltage of the flip-flop 13> blocks the transistor 22, so that the short circuit for the AFC voltage is canceled and the "long-tailed pair" circuit comes into effect. By overturning stage 13, the control of the constant current sources by gates 11-12 is canceled and the control by the AFC voltage is put into operation. ^;

Is just tuned to your received station like that is the AFC voltage OV to ground. The "long-tailed pair" The amplifier is designed so that both output voltages are on are equal to +6 V so that the two constant current sources are currently locked. There is neither a charging nor a discharging of the capacitor 1 and the vote remains on the transmitter. A frequency deviation from Sollwex-t results in a positive or negative AFC voltage to ground. This results in a voltage at the collector of the transistor, which is about +6 V lower 17 and a higher voltage at the collector of the transistor or a higher voltage at the collector: of the transistor 17 and a lower voltage at the collocator of the transistor 18. It thereby becomes the constant tstroniquelle 2 respectively 3 gujtuuert something guiding and dio duiaua resulting KnI or charging of capacitor 1 corrected you. · Fr

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The toggle switch 1'3 retains its reception status even if the AGG-Spammng roars, for example fading Ersclioäncn or beam driving through a Tuiuiols (TaIJs oh you're a car radio line). Since the elite wofjhiclion of the charge of the capacitor 1 can be very gory, it is possible to regulate the adjustment to the nominal value in the event of a brief failure. It was not until the HeI al. igen dos switch 16L or. ¹ "1bl {the Pci ä i-igungseinheii 16 forces the stage 13, unabliängj g λ'υπ inr Grosso dor AGC voltage, iji the Surhlaui'stand, before a new search run is started.

It eel noted that instead uvr two NAND Gattor 11 and 1 .'J other types of gates, with appropriate Uinpolung the zugefühi-ton bcxioliuiigsv.cise voltages of the diodes 1 '| and 15 λ · can be used.

In Fig. 1 is: the Hy & teresr> sch <i It divides closer to the dcxrges This contains three transistors 26, 2? and 28 with earthed Emitter electrodes and with collector resistors 291 30 and 31 · The base electrode of transistor 27 is directly connected to the Collector electrode of transistor 26 connected. The base electrode of the transit gate 26 is above an understanding 3? - and the base electrode of transistor 28 via a voltage divider with Vxdersiänder 33 and 3 ^ of the spacing voltage the line 25 is controlled. The collector electrodes Transistors 27 and 28 are bistable with two inputs Flip-flop 35 connected, which is designed so that it flips over only in the event of a voltage drop at the inputs. For example, it causes a voltage drop to the collector electrode of transistor 27 such a tipping over

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Stage 35 »that their output 10a high and their output 10b becomes low and a voltage drop across the collector electrode of transistor 28 tipping over, output 10a low and output 10b goes high. With the collector electrodes of the transistor 27 or 28, the switch is ! OIL or 16R of the unit 10 connected.

During the search, the tuning voltage on the line varies 25 for example between +1 and + .30 V. This voltage keeps transistor 26 conductive until it is saturated. Therefore, the base potential of the transistor 27 is practically the same Ground potential, so that this transistor is blocked, and the collector potential of this transistor is high (+ 6v).

The voltage divider 33-3 ^ divides the tuning voltage (1 - 30 V) on line 25 so much that the base voltage of transistor 28 over the entire tuning range below about 0.7 V (the threshold voltage in the emitter base spanmuig of the transistor 28). The transistor 28 is therefore blocked and its collector potential is high.

Approaches the tuning their limit \ on 30 \ ^r so the base voltage of the transistor 28 rises above the threshold voltage of 0.7 V and the transistor 28 becomes conductive. The drop in voltage at its collocator electrode reverses step 35 , so that counter-clockwise rotation (30-MV) is set in motion as has been described with reference to FIG. 1. If the tuning voltage approaches the lower limit value of 1 V, the transistor 26 comes out of saturation. The collector voltage of transistor 26 rises above the 0.7 V threshold voltage of transistor 27, so that transistor 27 becomes conductive. The voltage drop on the collector electrode

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of transistor 27 leads to tilting back of stage 35 clexvir that the clockwise rotation starts again.

Regardless of reaching the limits of the tuning range the collector voltages of the transistors 27 and 28 by operating switches SOL and 26R, respectively be switched to ground potential, whereby the stage 35 change of direction of the search is switched.

BATH ORIGINAL 209821/0248

Claims (2)

CLAIMS: PHN 5258 Circuit arrangement for an automatic transmitter search and tuning system for a receiving device, in particular for a radio or television receiving device, the alistimin elements of which, in particular capacitance diodes, are electronically tunable, with the tuning voltage being removable, if necessary after previous amplification on a capacitor, whose Au: '- bo or discharge via separate constant current sources i which can be controlled by a frequency discriminator and wherein the tuning voltage is supplied to a switching arrangement with hysteresis (Schmitt trigger) which controls the constant current sources, according to patent application. P. 19 60 114.0, characterized in that between the hysteresis circuit and the constant current sources two similar gates, each with a first and a second input, are switched on, that each first; Input of the gates are each connected to one of two opposite phase outputs of the hysteresis circuit and that the two second inputs of the gates are connected to the output of a bistable multivibrator circuit controlled by a control voltage (AGC) that is dependent on the amplitude of the received signal 2. Circuit arrangement according to claim 1, characterized in that each output of the gates is connected to the input of a constant current source via an isolating diode and that a control voltage source is coupled between the inputs of the constant current sources, the one of the frequency deviation between the tuning frequency and the transmitter frequency propox'tionalo Rogel voltage supplies.
3 · Circuit arrangement according to claim 1 or 2, characterized 209821/0246 bathroom - PHN 5258 connected that the hysterosis clial another bistable flip-flop with two upstream, one of the Abs! Immspajmuiig controlled electronic level sensor en thä Ii-. ^. , Circuit arrangement according to claim 3> thereby keiinzoiclinet, that between the level sensors and the further bistable toggle switch for forced change are involved in the successive testimony. 5 '. Circuit arrangement according to Claim 3 »characterized that one of the pegol feelers white cascaded] solder transistors in emitter circuit and the other the cascade circuit · a voltage divider and a transistor contains in emitter circuit. BAD OTfGINAL 20982Ί / 0246 Leerfeite