DE2054459A1 - Planar semiconductor component - with leads connected to electrodes through a supplementary insulation film esp - Google Patents

Planar semiconductor component - with leads connected to electrodes through a supplementary insulation film esp

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Publication number
DE2054459A1
DE2054459A1 DE19702054459 DE2054459A DE2054459A1 DE 2054459 A1 DE2054459 A1 DE 2054459A1 DE 19702054459 DE19702054459 DE 19702054459 DE 2054459 A DE2054459 A DE 2054459A DE 2054459 A1 DE2054459 A1 DE 2054459A1
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Prior art keywords
insulating layer
electrodes
silicon nitride
layer
interconnects
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DE19702054459
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German (de)
Inventor
Werner Dipl.-Ing.; Scherber Werner Dipl.-Phys.; 7100 Heilbronn. M Mroczek
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Licentia Patent Verwaltungs GmbH
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Licentia Patent Verwaltungs GmbH
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Priority to DE19702054459 priority Critical patent/DE2054459A1/en
Publication of DE2054459A1 publication Critical patent/DE2054459A1/en
Pending legal-status Critical Current

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    • H01L2924/05042—Si3N4

Abstract

The electrodes perhaps with associated conductor tracks are first applied to the surface zones in the semiconductor body through windows in the basic insulation film in which a previous set of windows have been used for diffusion into the body of those zones. Over the electrodes/conductor tracks and the residue of the basic film a film of Si3Na is deposited from a mixture of SiH4 and N2 at a temp. of approx. 350 degrees C in a glow discharge field preceded by a glow discharge cleaning of the surface in an atmos. of O2 or an inert gas in the same plant. The leads to the electrodes are then applied and the insulation is pierced for them by thermo-compression, by ultrasonic energy, or by making openings using reverse sputtering. Easy method of interconnection of intergrated circuit elements with high reliability.

Description

Verfahren zum Herstellen einer Planaranordnung" Die Erfindung betrifft ein Verfahren zum Herstellen einer Planaranordnung, bei dem die eine Oberflächenseite eines Halbleiterkörpers mit einer Isolierschicht bedeckt, anschließend Halbleiterzonen durch Öffnungen in dieser Isolierschicht in den Halbleiterkörper eindiffundiert und durch Öffnungen in dieser Isolierschicht an den zu kontaktierenden Halbleiterzonen Elektroden, gegebenenfalls mit Leitbahnen, angebracht werden. Die Erfindung besteht bei einem solchen Verfahren darin, daß nach der Herstellung der Elektroden sowie gegebenenfalls der Leitbahnen eine weitere Isolierschicht auf der gleichen Oberflächenseite aufgebracht wird und durch diese weitere Isolierschicht hindurch an den durch diese Isolierschicht bedeckten Elektroden oder Leitbahnen Elektrodenzuleitungen angebracht werden. Method of Making a Planar Array "The invention relates to a method for producing a planar arrangement, in which the one surface side of a semiconductor body covered with an insulating layer, then semiconductor zones diffused into the semiconductor body through openings in this insulating layer and through openings in this insulating layer at the semiconductor zones to be contacted Electrodes, if necessary with interconnects, are attached. The invention exists in such a method that after the electrodes are manufactured as well optionally the interconnects a further insulating layer on the same surface side is applied and through this further insulating layer through to the through this Electrodes or interconnects covered by an insulating layer are attached to electrode leads will.

Die Erfindung hat den Vorteil, daß durch sie die Passivierung von Planaranordnungen verbessert und beispielsweise auf der ersten Isolierschicht vorhandene Leitbahnen durch die zweite Isolierschicht ebenso geschützt werden wie die erste Islierschicht selbst. Die Erfindung findet mit Vorteil bei sämtlichen Planaranordnungen wie z.B. Planardioden, Planartransistoren oder integrierten Schaltkreisen Anwendung. Die weitere Isolierschicht, die auch als zweite Isolierschicht bezeichnet werden kann, wird vorzugsweise sowohl auf die erste Isolierschicht als auch auf die Elektroden bzw. auch auf vorhandene Leitbahnen aufgebracht.The invention has the advantage that it enables the passivation of Planar arrangements improved and for example existing on the first insulating layer Interconnects are protected by the second insulating layer in the same way as the first Insulating layer itself. The invention is advantageous in all planar arrangements such as planar diodes, planar transistors or integrated circuits. The further insulating layer, which is also referred to as the second insulating layer can, is preferably applied both to the first insulating layer and to the electrodes or also applied to existing interconnects.

Während unter Elektroden Metallabscheidungen in den Kontaktierungsfenstern der ersten Isolierschidt verstanden werden, verlaufen die Leitbahnen bekanntlich auf der (ersten) Isolierschicht und stellen eine elektrisch leitende Verbindung mit den Elektroden in den Kontaktierungsfenstern her. Die Leitbahnen und die Elektroden bilden im allgemeinen einen gemeinsamen Teil. Bei Verwendung von Leitbahnen werden die Zuleitungen nicht an den Elektroden im KontakEErungsfenstern, sondern an den Leitbahnen angebracht. Bei integrierten Schaltkreisen dienen die Leitbahnen im allgemeinen zur Herstellung einer elektrisch leitenden Verbindung zwischen den einzelnen Bauelementen des Schaltkreises.While under electrodes, metal deposits in the contacting windows the first Isolierschidt are understood, the interconnects are known to run on the (first) insulating layer and establish an electrically conductive connection with the electrodes in the contact windows. The interconnects and the electrodes generally form a common part. When using interconnects the leads are not connected to the electrodes in the contact window, but to the Conductors attached. The interconnects are generally used in integrated circuits to create an electrically conductive connection between the individual components of the circuit.

Die weitere Isolierschicht besteht vorzugsweise aus Siliziumnitrid. Die Siliziumnitridschicht wird vorteilhafterwie in einem Glimmfeld aus SiH4 und N2 erzeugt. Diese beiden Gase können mit extrem hohem Reinheitsgrad hergestellt werden. Andere Nitridschichten (pyrolytische oder gesputterte) gehen von NH3-Gas oder festem Si3N4-Material aus, also Stoffe, die nicht so rein erhältlich sind. Das Abscheiden der Siliziumnitridschicht erfolgt beispielsweise bei einer Temperatur von 350 0C. Vor dem Abscheiden der Siliziumnitridschicht wird vorteilhafterweise eine Glimmreinigung des mit der ersten Isolierschicht bedeckten und mit Elektroden bzw. Leitbahnen versehenen Halbleiterkörpers durchgeführt. Diese Glimmreinigung erfolgt beispielsweise in einem Glimmfeld mit Sauerstoff oder einem Inertgas. Es empfiehlt sich, die Glimmreinigung in der gleichen Apparatur durchzuführen wie das Abscheiden der Siliziumnitridschicht. Die erste Isolierschicht besteht beispielsweise aus Siliziumdioxyd.The further insulating layer preferably consists of silicon nitride. The silicon nitride layer is advantageously used as in a glow field made of SiH4 and N2 generated. These two gases can be produced with an extremely high degree of purity will. Other nitride layers (pyrolytic or sputtered) come from NH3 gas or solid Si3N4 material, i.e. substances that are not available in pure form. The silicon nitride layer is deposited, for example, at one temperature from 350 0C. Before the silicon nitride layer is deposited, it is advantageous a glow cleaning of the covered with the first insulating layer and with electrodes or interconnects provided semiconductor body carried out. This glow cleaning takes place, for example, in a glow field with oxygen or an inert gas. It It is advisable to carry out the glow cleaning in the same apparatus as that Deposition of the silicon nitride layer. The first insulating layer consists for example made of silicon dioxide.

Das nachträgliche Anbringen von Zuleitungen (z.B. Zulitungsdrähten) an den Elektroden bzw. Leitbahnen erfolgt nach der Erfindung beispielsweise dadurch, daß die zweite Isolierschicht mittels Thermokompression oder Ultraschall durchgestoßen wird. Ee besteht auch die Möglichkeit, die zweite Isolierschicht vor dem Anbringen von Zuleitungen an den entsprechenden Stellen durch Rücksputtern zu öffnen.The subsequent attachment of leads (e.g. lead wires) on the electrodes or interconnects takes place according to the invention, for example, that the second insulating layer pierced by means of thermocompression or ultrasound will. There is also the possibility the second layer of insulation before attaching leads at the appropriate points by backsputtering to open.

Die Erfindung wird im folgenden an einem Ausführungsbeispiel näher erläutert.The invention is explained in more detail below using an exemplary embodiment explained.

Die Figur 1 zeigt einen noch nicht kontaktierten Planartransistor, der aus einem Halbleiterkörper 1 besteht, auf dessen eine Oberflächenseite eine erste Isolierschicht 2 aufgebracht ist und in dessen Halbleiterkörper bereits die Basiszone 3 und die Emitterzone 4 eindiffundiert sind.Figure 1 shows a not yet contacted planar transistor, which consists of a semiconductor body 1, on one surface side of which a first insulating layer 2 is applied and in the semiconductor body already the Base zone 3 and the emitter zone 4 are diffused.

Die in der Isolierschicht 2 vorhandenen Stufen sind auf die Diffusionsfenster zurückzuführen, die für die Basis-und Emitterdiffusion in die Isolierschicht 2 eingebracht wurden.The steps present in the insulating layer 2 are on the diffusion window which is introduced into the insulating layer 2 for the base and emitter diffusion became.

Die Figur 2 zeigt die Kontaktierung der in den Halbleiterkörper eindiffundierten Halbleiterzonen. Die Kontaktierung dieser Halbleiterzonen erfolgt dadurch, daß in die Isolierschicht 2 das Basiskontaktierungsfenster 5 und das Emitterkontaktierungsfenster 6 eingebracht werden. Zur Herstellung der Basiselektrode 7 und der Emitterelektrode 8 wird in die beiden Kontaktierungsfenster gemäß der Figur 3 Kontaktierungsmaterial eingebracht. Zu diesem Zweck wird beispielsweise auf die Oberfläche eine zusammenhängende Metallschicht aufgedampft, die bis auf die Elektroden 7 und 8 nachträglich mit Hilfe der Photolacktechnik wieder entfernt wird.FIG. 2 shows the contacting of the diffused into the semiconductor body Semiconductor zones. The contacting of these semiconductor zones takes place in that in the insulating layer 2, the base contacting window 5 and the emitter contacting window 6 are introduced. For producing the base electrode 7 and the emitter electrode 8 is in the two contacting windows according to FIG Contacting material brought in. For this purpose, for example, a coherent surface is applied Metal layer vapor-deposited, which up to the electrodes 7 and 8 afterwards with the help the photoresist technology is removed again.

Im Anschluß an die Herstellung der Basis- und Emitterelektrode wird gemäß der Figur 4 nach der Erfindung auf die erste Isolierschicht 2 sowie auf die Elektroden 7 und 8 eine zweite Isolierschicht 9 aufgebracht. Die Kontaktierung der Elektroden 7 und 8 erfolgt gemäß der Erfindung entsprechend der Figur 5 dadurch, daß die Zuleitungsdrähte 10 und 11 durch die zweite Isolieschicht 9 durchgebondet und auf diese Weise mit den Elektroden 7 und 8 verbunden werden. Das Durchbonden erfolgt beispielsweise mit Hilfe von Ultraschall.Following the production of the base and emitter electrodes according to the figure 4 according to the invention on the first insulating layer 2 and on the Electrodes 7 and 8, a second insulating layer 9 is applied. Contacting the Electrodes 7 and 8 are made according to the invention in accordance with FIG. that the lead wires 10 and 11 are bonded through the second insulating layer 9 and thus connected to electrodes 7 and 8. Bonding through takes place, for example, with the help of ultrasound.

Die zweite Isolierschicht 9 besteht nach der Erfindung beispielsweise aus Siliziumnitrid. Die Siliziumnitridschicht wird nach der Erfindung vorzugsweise durch eine Glimmentladung aus SiH4 und N2 erzeugt. Diese Behandlung erfolgt beispielsweise bei einer Temperatur von 3500C.According to the invention, the second insulating layer 9 consists for example made of silicon nitride. The silicon nitride layer is preferred according to the invention generated by a glow discharge from SiH4 and N2. This treatment takes place, for example at a temperature of 3500C.

Vor dem Abscheiden der Siliziumnitridschicht wird vorzugsweise noch eine Glimmreinigung durchgeführt, und zwar vorteilhafterweise in derselben Apparatur, in der die Abscheidung der Siliziumnitridschicht erfolgt. Die Glimmreinigung wird vorzugsweise in einer Sauerstoff- oder Inertgasatmosphäre durchgeführt.Before the silicon nitride layer is deposited, preferably a glow cleaning carried out, and although advantageously in the same apparatus in which the silicon nitride layer is deposited. the Glow cleaning is preferably carried out in an oxygen or inert gas atmosphere.

Die Figur 6 zeigt schließlich noch ein Ausführungsbeispiel der Erfindung, bei dem die Metallisierung der Halbleiteroberfithe nicht nur auf die Bereiche der Kontaktierungsfenster beschränkt bleibt, sondern bei dem die Metallisierung auch auf Teilen der ersten Isolierschicht verbleibt, und zwar in Gestalt der Leitbahnen 12 und 13. Die Zuleitungsdrähte sind in diesem Ausführungsbeispiel an den Leitbahnen angebondet, die ebenso wie die Elektroden von der zweiten Isolierschicht bedeckt sind.Finally, FIG. 6 shows an exemplary embodiment of the invention, in which the metallization of the semiconductor surface is not limited to the areas of the Contacting window remains limited, but also in which the metallization remains on parts of the first insulating layer, namely in the form of the interconnects 12 and 13. In this exemplary embodiment, the lead wires are on the interconnects bonded, which, like the electrodes, is covered by the second insulating layer are.

Der Halbleiterkörper der nach der Erfindung hergestellten Planaranordnungen besteht beispielsweise aus Silizium.The semiconductor body of the planar arrangements produced according to the invention consists for example of silicon.

Die erste Isolierschicht, die unmittelbar die Halbleiteroberfläche bedeckt, wird beispielsweise aus Siliziumdioxyd hergestellt.The first insulating layer that directly covers the semiconductor surface is made of silicon dioxide, for example.

Claims (9)

Patentansprüche Claims Verfahren zum Herstellen einer Planaranordnung, bei dem die eine Oberflächenseite eines Halbleiterkörpers mit einer Isolierschicht bedeckt, anschließend Halbleiterzonen durch Öffnungen in dieser Isolierschicht in den Halbleiterkörper eindiffundiert und durch Öffnungen in dieser Isolierschicht an den zu kontaktierenden Halbleiterzonen Elektroden, gegebenenfalls mit Leitbahnen, angebracht werden, dadurch gekennzeichnet, daß nach der Herstellung der Elektroden sowie gegebenenfalls der Leitbahnen eine weitere Isolierschicht auf der gleichen Oberflächenseite aufgebracht wird und durch diese weitere Isolierschicht hindurch an den durch diese Isolierschicht bedeckten Elektroden oder Leitbahnen Elektrodenzuleitungen angebracht werden. A method for producing a planar arrangement, in which the one Surface side of a semiconductor body covered with an insulating layer, then Semiconductor zones through openings in this insulating layer in the semiconductor body diffused and through openings in this insulating layer to the to be contacted Semiconductor zones electrodes, optionally with interconnects, are attached, thereby characterized in that after the production of the electrodes and optionally the Conductors apply another insulating layer on the same side of the surface and through this further insulating layer to the through this insulating layer covered electrodes or interconnects electrode leads are attached. 2) Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß die weitere Isdierschicht sowohl auf die erste Isolierschicht als auch auf die Elektroden bzw. auch auf vorhandene Leitbahnen aufgebracht wird.2) Method according to claim 1, characterized in that the further Isolation layer both on the first isolation layer and on the electrodes or is also applied to existing interconnects. 3) Verfahren nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß die weitere Isolierschicht aus Siliziumnitrid besteht.3) Method according to claim 1 or 2, characterized in that that the further insulating layer consists of silicon nitride. 4) Verfahren nach Anspruch 3, dadurch gekennzeichnet, daß die Siliziumnitridschicht aus SiH4 und N2 in einem Glimmfeld erzeugt wird.4) Method according to claim 3, characterized in that the silicon nitride layer is generated from SiH4 and N2 in a glow field. 5) Verfahren nach Anspruch 4, dadurch gekennzeichnet, daß das Abscheiden der Siliziumnitridschicht bei einer Temperatur von ca. 3500C erfolgt.5) Method according to claim 4, characterized in that the deposition the silicon nitride layer takes place at a temperature of approx. 3500C. 6) Verfahren nach einem der Ansprüche 3 bis 5, dadurch gekennzeichnet, daß vor dem Abscheiden der Siliziumnitridschicht eine Glimmreinigung erfolgt.6) Method according to one of claims 3 to 5, characterized in that that a glow cleaning takes place before the deposition of the silicon nitride layer. 7) Verfahren nach Anspruch 6, dadurch gekennzeichnet, daß die Glimmreinigung in einem Glimmfeld mit Sauerstoff oder einem Inertgas erfolgt.7) Method according to claim 6, characterized in that the glow cleaning takes place in a glow field with oxygen or an inert gas. 8) Verfahren nach Anspruch 6 oder 7, dadurch gekennzeichnet, daß die Glimmreinigung in der gleichen Apparatur wie das Abscheiden der Siliziumnitridschicht erfolgt.8) Method according to claim 6 or 7, characterized in that the Glow cleaning in the same apparatus as the deposition of the silicon nitride layer he follows. 9) Verfahren nach einem der Ansprüche 1 bis 8, dadurch gekennzeichnet, daß zur Kontaktierung die weitere Isolierschicht mittels Thermokompression oder.Ultraschall durchstoßen wird, oder daß in die Isolierschicht durch RUcksputtern Kontaktierungsöffnungen eingebracht werden.9) Method according to one of claims 1 to 8, characterized in that that for contacting the further insulating layer by means of thermocompression or ultrasound is pierced, or that contacting openings are made in the insulating layer by back-sputtering be introduced.
DE19702054459 1970-11-05 1970-11-05 Planar semiconductor component - with leads connected to electrodes through a supplementary insulation film esp Pending DE2054459A1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2324519A1 (en) * 2008-09-09 2011-05-25 Philips Intellectual Property & Standards GmbH Contacting a device with a conductor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2324519A1 (en) * 2008-09-09 2011-05-25 Philips Intellectual Property & Standards GmbH Contacting a device with a conductor

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