DE2050706C3 - Circuit for demodulating frequency-modulated carrier waves - Google Patents

Description

The invention relates to a circuit for demodulating frequency-modulated carrier waves, where the frequency-modulated carrier waves and the delayed frequency-modulated Carrier oscillations are fed to a phase comparator, which is followed by an averaging unit.

A receiver for receiving frequency-modulated signals, for example the receiver of a An alternating current telegraph system that works with frequency-modulated carrier waves essentially consists from the four assemblies: limiter, discriminator, rectifier and low-pass filter.

The predominantly applied demodulation principles use when keying between two Frequencies such as that used in an AC telegraphy system is the case, two resonant circuits in the discriminator, which work in push-pull on a full-wave rectifier. The oscillating circles and the low-pass filter contain coils which, as a result of the im Operating frequencies lying in the low-frequency range have large geometric dimensions, heavy weight and have high manufacturing costs. There are already circuits known that a creation of coilless Allow recipients.

From US-PS 28 35 802 is another circuit ίο for demodulating frequency-modulated carrier waves known In this circuit are with the help of linear phase networks compared to the frequency-modulated carrier waves delayed frequency-modulated carrier waves generated by the

both carrier waves are limited in their amplitude and then a phase comparator The phase comparator is followed by a low-pass filter, a demodulated one at its output Vibration is emitted. This known circuit

however, it also contains coils and capacitors and is therefore not suitable for building out integrated circuits. In addition, if the circuit is switched to other frequencies, the Carrier waves the linear phase networks and

the low-pass filter must be retuned each time.

The object of the invention is to provide a circuit arrangement for demodulating frequency-modulated To show carrier vibrations that allow the use of digital modules and compared to the

known circuits has improved properties

The object is achieved in that a shift register is used for the delay Depending on the number of its levels and the

Period duration of the controlling clock pulses a correspondingly delayed and with the clock pulses modulated oscillation emits such that the number of times in the unit of time at the output of the phase comparator given impulses a measure for the momentary

represents the frequency of the frequency-modulated carrier wave

The new circuit uses the principle of the polarity correlator. Underneath is a modified one Autocorrelator understood that only the zero crossings of the carrier oscillations, but not their amplitude evaluates Such a correlator is implemented as a digitally working system a limiter amplifier, shift register and gate arrangements are used. As the only frequency

A clock oscillator occurs here as a determining component of the demodulator. The accuracy of the demodulator depends exclusively on the frequency constancy of the oscillator. When the polarity correlator is digitized as a demodulator, the demodulation low-pass filter can also be implemented in a simple manner using coil-free technology using active RC filters for practical reasons. In principle, however, the demodulation low-pass filter can also be replaced by a digital circuit. This is done with the help of digital counting levels. For example, an arrangement of counters in an AC telegraphy receiver decides between the two signal states (character stream state and separating current state).

The digital demodulator results in the use of integrated digital components, which are inexpensive in the trade obtain a substantial reduction in volume and weight. The demodulator has a very high level of accuracy. With a large number

Mg -Empfangskanälen, as for example in a Tdegraßesystem frequency division of the case has the 24 channels, only one common oscillator is needed By selecting the number of stages of the shift register, the respective discriminators jjj DJE the respective channel associated Frequenzla- • e set

Details of the invention are explained with reference to figures in which the principle of the autocorrelator, the polarity correlator and advantageous exemplary embodiments are shown.

F i g. 1 shows the principle of the autocorrelator;

F i g. 2 shows the autocorrelation function;

Fig. 3 shows the discriminator function of a polarity correlator;

ρ ig. 4 shows a digital one in the block diagram Demodulator;

F i g. 5 shows a timing diagram for FIG. 4;

Fig.6 shows a digital demodulator with Full wave rectification;

F i g. 7 shows a timing diagram for FIG. 6; and

8 shows a particularly advantageous structure of a digital demodulator.

On the basis of FIG. 1 the principle of the autocorrelator is explained. The time function χ (t) is at input E. After the delay element V, which has a delay time τ, the function χ (t-τ) arises. Uie delayed and undelayed time functions are fed to a multiplier P. The output function of the multiplier χ (t) ■ x (t - ^) \\ egt tn an averaging M to. The autocorrelation function R (τ) - arises at the output A of the averaging unit, which has an averaging time T.

The following then results for the autocorrelation function:

T ₁ ,

R (τ) = —j sin (f.fc ι + fi) sin [><, (f - r) + ti] dt

Iq J

= - COS OJ ₀ T = R (τ, OJ ₀ ).

R (t) is an even function in τ, independent of the phase β and periodic with To. With this approach, ωό is seen as fixed and r as variable.

However, since the product ωοτ, i.e. the quantities ωο and τ symmetrically enters into the argument of the cosine function, τ = το can be seen as fixed and ωο = ω as variable:

·>. T ₀ f =

COS Γ., Οι

R (r)

X (t) - X (I-T) Ul

The mathematical definition of the autocorrelation function R (τ) also includes a limit crossing with T- * oo. However, the averaging time T, which a technically feasible system has, must remain finite if one wants to have the value of the correlation function available at a finite time. If the input function χ (t) is periodic with the duration To, then the autocorrelation function is also periodic with Ta, so that we get:

To

R ( _r ) = -L f X (0 · X (t - t) dt = R (T + T ₀ ). 'O J

The integral and thus the averaging are now only to be extended over one period.

It is shown below that an autocorrelator can be used as a frequency demodulator. The time function x (t) is assumed to be a harmonic function:

χ (t) = sin (ο *, ι f- ß),

2 Zl

T ₀

0 ^ (i <2 .τ.

This is an even function in ω that is periodic with ro. 2 shows the course of the function R (ω, to). If one takes the course of the autocorrelation function between two extremes (on, α »in Fig. 2), this corresponds exactly to the static characteristic of a discriminator for frequency-modulated carrier oscillations for the frequency range ωι Ξω <&) 2 with the center frequency ωο. There is thus the possibility of using an autocorrelator with a fixed delay parameter το to form a complete discriminator for a band-limited, frequency-modulated carrier oscillation, since the data signal in the form of DC voltage is created after the averaging, which is implemented, for example, by a low-pass filter

If the input signal x (t) runs through a symmetrical amplitude limiter, in the case of alternating current telegraphy, a b id limited, frequency-modulated carrier oscillation, then a subsequent autocorrelator essentially receives a time function that is rectangular.The information about the baseband signal is only contained in the intervals between the zero crossings of the square wave signal. Since the frequency-modulated carrier wave was limited, this is the complete information. An autocorrelator that is provided with an upstream limiter is called a polarity correlator. Since the amplitude of the limited carrier oscillation no longer plays a role, the delay element and the multiplier can be constructed much more simply than with the actual autocorrelator. Only the averaging device, ie the low-pass filter, retains its function and thus its structure.

In order to convert the binary digital processing

to arrive frequency-modulated carrier oscillation

this carrier oscillation is amplified by a limiter

ker acted upon, at his exit with everyone

Zero crossing of the carrier oscillation from the logi

seeing "1" changes to the logical "0" and vice versa

The polarity correlation function of a periodic i

Carrier oscillation of the fundamental frequency / runs ii

Dependence on this frequency piece by piece rectilinearly and periodically with the frequency - if to dii

fixed delay time of the correlator isl

Each of these straight lines is a static discriminator characteristic selectable. Since the GiEraden pieces only cover a finite frequency range, a band-limited frequency-modulated carrier oscillation clearly into a corresponding one: amplitude-modulated Vibration can be converted.

In Fig. 3 the n-th period of the discriminator function R (f, to) is shown from FIG. 3 there are the following relationships between the center frequency A or the possible bandwidth B of the modulated carrier oscillation on the one hand and the delay time το or period number «· η on the other hand:

2η - 1 1

/ ο ' fo

2 T ₀

lo

η 1,2,4.

No distinction was made between the rising and falling characteristic because this for the application is insignificant Depending on the relative

Bandwidth -7- of the frequency-modulated carrier wave-

JO

The result is the whole number

\ Jo JoJ

The delay time ro to be set is thus determined in accordance with the center frequency A. As an example, consider the relationships in a binary frequency-modulated alternating current telegraphy channel for 1200 Bd with the center frequency A = 1900 Hz and the modulation index 0.4 . The stroke frequency is 240 Hz; with the weak modulation, the bandwidth 5 »4240 Hz is obtained. Based on the above-mentioned relationships, this results in:

To

960
1900

= 0.505 <- ^ -

This results in:

After averaging at the low-pass filter, the discriminator function R (f, to) arises at the output. The discriminator function represents the baseband signal, which is proportional to the instantaneous frequency of the carrier oscillation. In the polarity correlator, the delay element and the multiplier are replaced by a digital shift register SR with a clock generator TG and by a digital coincidence element KG, for example an AND gate to:

TO = Jt- ft; * = l, 2,3,4 ....

The number of stages of the shift register is denoted by k and the clock period by to

In Figure 5, the waveforms for three are stationary offered frequencies shown. Line 1 shows the clock pulses emitted by the clock generator TlG with the clock period ft. It becomes a center frequency

a frequency above the center frequency

25 ^{Λ =} Ί5 · 7 _Ο "

and a frequency below the center frequency

^h - w \

30th

35

45

T ₀ = _T ■ -j = 395

"* Yes B = 1267Hz.

4 shows a block diagram of a digital Demodulator based on the principle of the polarity correlator. In a second diagram in FIG Signal curves shown at the outputs of the individual stages

The frequency-modulated TrSgswing s (t) flies at the input. The square-wave signal x (t) is produced at the output of the limiter B. The output of the limiter is present at the shift register SR , the output signal x * (t-vo) of which is present at one input of the coincidence element KG ir fr / means a function sampled with def clock period ft.

The output signal x (t) of the limiter is at the other input of the coincidence element. The coincidence element sends the 6s signal to the downstream low-pass filter TP

xfü- x * ft-ro).

accepted. With <ο = 45μ $ εΰ, the conditions of an alternating SITROM telegraph system for 1200Bd with a center frequency of 1850Hz and a stroke frequency of 370Hz (modalation index about 0.6) result. An S-bit shift register (k = 9) is also assumed. With /; = 2 we get:

3
4th

./0

= 9-r ₀

The signal course x * (t-το, f) at the output of the shift register SR comes about when a gate is present at the input or at the output of the shift register which is acted upon by the signal on one input and the Takl on another input . A shift register without a gate would output x (t - το, f) , that is, a function that has not been keyed. The keyed function enables the averaging unit to be replaced by a counting arrangement. E: but can also indicate a variant of the described circuit which operates with non-sampled funktioner assuming that the Schieberegistei the signal x (t-To, f) delivering the application before Zfihlern in place of the averaging low pass "for evaluating the signal then requires the interposition of a gate operated with the clock after the coincidence element.

In Fig.5, the function of the low-pass filter is not taken into account . However, the number of clock pulses prc period of the input signal is the two functions

x (t) * ff— to)

the resulting equal, screened out by the low pass voltage proportional

Di? Line 2 shows the output signal of limiting when applying A. Lines 5 and 8 respectively show; the limited output signal at the receiving frequencies Λ and k. The respective output signals den

Lines 3 and 4, 6 and 7 as well as 9 and 10 show the shift register and the coincidence gate. The number of pulses per period of the input signal is a measure of the frequency of the signal. The output signal in line 4 contains three pulses per period at the frequency ft. At frequency Λ there are two pulses per period in the output signal (line 7), while at frequency h in the output signal there are 4 pulses (line 10) per period. This allows conclusions to be drawn about the frequency of the carrier oscillation from the number of pulses. When the low-pass filter is switched on for averaging, different DC voltages are generated for the various input frequencies. An average DC voltage value is formed from the pulses so that the frequency of the carrier oscillation can be determined from the magnitude of the DC voltage.

The circuit according to FIG. 4 emits a pulse train only once per period of the carrier wave, which corresponds to a one-way rectification in the previously known discriminator. FIG. 6 shows a circuit for a digital discriminator which operates as a full-wave rectifier circuit. * (t) btat implies a negated function χ (t).

The circuit contains a limiter B to which the shift register ST? is connected downstream with a delay time of το = Ic · ίο The clock generator 7TG gives the clock pulses for shifting the input signal sequences to the shift register. At the output of the shift register, the signal curve x * (t — το) arises, from which the negated function x * (t— η) is formed via the gate Gt, which is applied to the coincidence KG via the gate G 2 The limited carrier oscillation χ ( t) is passed to the coincidence element directly on the one hand and via the gate G 3 negated on the other. The coincidence element KG (outlined in dashed lines) consists of the. Gates G4, GS, Gh, and provides an exclusive -or gate is at the output of the A Signalvf arises rlauf.

x (0- x ** (t-το) + x (t) - x * ⁿ ■ (t-To).

In F g. 7 shows a timing diagram for the circuit according to FIG. Line 1 shows the carrier oscillation after the limiter. In line 2, the clock pulse sequence of the clock generator TG is indicated. Line 3 shows the signal curve at the output of the shift register S / t. The ne {ured signal curve at the output of gate G 1 is shown in line 4. The delay time in the shift register is τα

Line 5 shows the sequence of active pulses again. Line 6 shows the output signal of gate G 2, which is formed from the signals in lines 4 and 5. Line 7 represents the negated input signal at the output of getter G3. Lines 8 and 9 show the signal profile at the outputs of gates GA and G5. The output signal of the gate G6 is shown in line 10. During a carrier period

- ^ given a pulse train to the output A both from the gate GA and from the gate GS. This results in twice the number of pulses or twice the size of the averaged DC voltage.

F i g. 8 shows a particularly advantageous digital demodulator with full-wave rectification. This circuit is particularly advantageous since only one limiter, one shift register, one clock generator and NAND gate are required. The coincidence element KG is again built up in the form of an exclusive-or gate. The signal curves in the timing diagram in FIG. 7 apply in the same way.

The output of the exclusive-or gate in FIG. 5 and 7 consists of a number of pulses of length to / 2. The number of pulses per period of the carrier wave χ ft) is a measure of the frequency of the carrier wave. In the circuits described, this number is determined by filtering out the proportional DC voltage with the aid of the low-pass filter. Further signal processing in the AC telegraph receiver is based on the magnitude of this DC voltage, which becomes a low-frequency baseband signal in dynamic operation.

With AC telegraphy it is now up to the recipient to decide which of only two possible transmission signals (separating current state or character current state ) caused the input signal x (t) .The intermediate values resulting from the change between the two transmission signals do not need to be determined . Only the point in time of the change can be determined. This binary decision can easily be carried out on the basis of the signal x (t, Q-x ** Cf-ro, f) with its number of pulses per period proportional to the input frequency. The pulse trains are sent to two ring counters which are matched to the two pulse numbers of interest and which are reset at the beginning of each period by the leading edge of the signal Jf (t) . Depending on the input frequency, a signal then appears at the output of one or the other ring counter. The decision between the two possible transmit signals has thus been made.

The demodulation low-pass filter can be replaced with such a counter arrangement. A realization this counter method must take into account that as a result of the digital delay Pulse numbers can fluctuate by ± 1 around the actual values. Furthermore, the determination of the The time of the signal change is also subject to an error of the order of magnitude of the Clock frequency period lies The first mentioned error

so source makes a more complex counter arrangement necessary, the second can be increased by increasing the

Clock frequency, which is a step multiplication of the Shift register affects, decrease in their effect. It is particularly advantageous that an alternating current

Legrafieempfänger with digitally working polarity correlator and a counter arrangement as a decision system can also be implemented by programming a data processing system. This option is particularly advantageous when data is transmitted to a digital record system via AC telegraphy systems.

In addition 5 sheets of drawings

609 647/160

Claims (4)

Patent claims: 1. A circuit for the demodulation of frequency-modulated carrier waves, in which the frequency-modulated carrier waves and the delayed frequency-modulated carrier waves are fed to a phase comparator, which is followed by an averaging device, characterized in that a shift register fS / y is used for the delay, depending on the number (k) its stages and the period duration / to) of the controlling clock pulses emits a correspondingly delayed and with the clock pulses modulated oscillation, such that the number of pulses emitted in the time unit at the output of the phase comparator (KG) is a measure of the instantaneous frequency of the frequency-modulated Represents carrier oscillation 2. A circuit according to claim 1, characterized in that a plurality of counters each set to a specific end value are used as averaging device (TP) , in such a way that when the set end value is reached, the respective counter emits a message signal assigned to the received instantaneous frequency 3. A circuit according to claim 2, characterized in that two counters with different End value are used in such a way that when one counter responds, the isolating current status and that when the other counter responds, the character stream condition is controlled. 4. Circuit according to one of claims 1 to 3, characterized in that an exclusive OR gate is used as the phase comparator (KG) , that the output of the shift register (SR) and the output of a limiter amplifier (B) at the inputs of the first AND gate (G 4) of the exclusive OR gate are switched on so that the output of the shift register (SR) via a first negation stage (Ci) and the output of the clock generator (TG) directly to the inputs of a further gate (G 2) are switched on and that the output of the further gate (G 2) is connected directly and the output of the limiter amplifier (B) via a second negation stage (G 3) on the second AND gate (GS) of the exclusive OR gate (KD) .