DE2021373B2 - DEVICE FOR REPRESENTING CHARACTERS - Google Patents

Description

Data retrieved from a memory is set to the analog control given to the deflection device that according to the signals from the deflection device to display a straight section: the portion of a character to be displayed of a character to be displayed, further analogue the current of the deflection device is selected according to pre-deflection control variables for the curvature of the respective will. If curved or curved sections are to be shown in the desired direction and with the parts of characters, the required thickness is added. Even with this additional resistances to the deflection unit taken from the memory and not belonging to the state of the art, a considerable effort is therefore involved in switching the deflection currents according to the storage capacity of the individual corresponding to the curvature desired in each case and io characters contained memory as well as the shape of the arc-shaped part to be represented, clearly showing the circuit complexity in the processing points. As a result of the multitude of partial signals and their characters belonging to the known device of this multitude of a single device to be represented for the various characters to be represented and their characters and which differ in terms of size, connection to the deflection device, direction and strength of the curvature, which also means this device in its Structure of arc-shaped parts is a complicated setting, due to the large number of scnaltung to be used for the components and assemblies that can be connected to the deflection coils, they are relatively prone to failure and resistances are required, which make the entire device relatively long in terms of its operating speed and complex in terms of its structure.
Makes it work relatively slowly. The object of the invention is to provide a new device

In one of the US Pat. No. 3,394,367 for the representation of characters to be created with the

known other device is made up of straight lines and arcs for each part

of a character to be displayed from a Ma character, especially with regard to the arc pieces

gnetkernspeicher a data word consisting of 8 bits using a purely digital processing of the

read out. This data word contains information about 25 data that enter the individual characters

the coordinate point at which the high accuracy and high speed to be displayed

Part begins, the coordinate point at which the points are.

The section to be displayed ends, as well as information about In a device of the type mentioned at the beginning

the shape of a section. Curved sections is this object according to the invention

are solved from in the horizontal or vertical direction 30 that the characters corresponding,

beginning pieces formed by quarter ellipses, the reversible counter stored signals on one

whereby the data word specifies the type of XY-

used quarter ellipses and start and end start coordinates of the respective character

contains coordinates of the elliptical piece used. and up-down signals for the counting mode

In the known device, the counters and one of two possible, one in each case, are therefore in all 35

Usually only parts of the grid signals that are specified as basic elements

quarter ellipses to be seen. state according to which at least part of the

From the journal "The Review of Scientific character setting it can be recorded that with Instruments" 1959, Issue 8, pp. 749 and 750, one of the access circuit to the memory signals with another device is known in which the X and 4 ° one the Unit of a stage indicating time interval 7 deflection coils of a cathode ray tube are each given, each character being acted upon by a plurality of a digital-to-analog converter. Stages built up and each stage in several steps The digital-to-analog converter is divided by each for the counter, and that besides the one reversible counter depending on its counter reading counting direction and the starting coordinates determine a certain signal that determines the deflection current. 45 the connections of the counters an the raster signals The counters receive 16 pulses each to represent each processing and corresponding output signals character, which the counter-releasing selection circuit to the memory is closed forwards or backwards in response to its polarity, of which the counters at each of the keep counting. In addition, the digital-to-analog converters, which occur during the time interval of a stage, receive steps for each letter from a coordinate step independently of one another in the counting step memory, the respective coordinate values of the character size can be controlled.

indicating signals. Even with this known advantage, the device according to the invention differs

direction, however, only square signs are to be displayed, opposite the known and also not towards the

wherein curved parts by appropriately inclined prior art devices in

Straight lines are approximated. 55 advantageous in that the respective

In the non-state-of-the-art characters no longer point by point German Auslegeschrift 1 816 989 is finally one with its respective absolute coordinate values in Device for displaying characters are stored in the memory and are written out from it, which also have to be read in arches for the representation, but rather individually Parts of characters only represent the individual coordinates 60 for the characters to be displayed in each case points between these specified coordinates - for the first initial value an absolute coordinate points of the value representing the character is stored, with which the two each have one Electron beam intensity to be used and, finally, deflection direction, individually assigned counter evenly The direction and strength of one of the electron cases can be set to an initial value. To ray between two stored coordinate points- 65 definition of this initial value in the two th to be executed curvature of the counter to be displayed is the letter alone through in the Characters are stored in a memory. Counters accordingly from the memory for the respective With this device, addi-

5 6

functions or subtractions shown, is acted upon by the first pulse of the ring counter, so that the counter readings in a manner indicating the next section of each counting stage of the shift register one after the other of the character to be displayed signal pulses with one level of the character! to be changed. To represent arc-shaped corresponding time interval can be emitted.
Parts of characters are these counters in the same way. Through these developments of the invention, an additional selection circuit controls a particularly simple division of the individual signals, which corresponds to the direction and to the counter and quick access to the respective strength of the curvature in This selection memory and an overview circuit preprogrammed and in the counters to Licher and with respect to the stored characters adding or subtracting data outputs, io easily programmable structure of the entire Vorwobei this selection circuit depending on the direction possible.

Memory characters to be retrieved from The following is the description of the memory embodiment in one of only two possible operating modes with reference to the drawing. Show in it
ways is switched. The counting direction signals »5 of the synthesis of a character, which determine the operation of the FIGS i g. 2 a counter to be represented in accordance with the invention. Each character to be represented Character with a piece of arc,
is also in the device according to the invention F i g. 3 an illustration of various used! during several successive and the "types of arches according to the invention,
individual parts of the character to be represented Fig. 4 the representation of the numbers by combining the time intervals, which are referred to here as stages according to nation of straight and curved pieces, recorded. Are just pieces one of the invention,

recorded characters to be displayed, so F i g. 5 shows the programming step corresponding to the signals as given by the memory for the A'-1 'coordinates of the arc used

each one of the counters for the further counting stopped, pieces representing point grid in the representation

while the other counter corresponds to that of the numbers in Fig. 4,

counting direction signal F i g given to it by the memory. 6 a block diagram of an embodiment

according to clock pulses in forward or example for the synthesis of characters according to dei Counting backwards. With the Dar- 30 invention,

position of arched pieces of a writing- F i g. 7 a circuit diagram of an embodiment:

on the other hand, the two counters are one in FIG. 6 used and designated 600

speaking of the memory delivered by the selection circuit,

Signals during individual F i g. 8 is a circuit diagram of a circuit shown in FIG. 6 with 602

Time interval of further subdividing steps with selector circuit designated 35,

correspondingly shorter time intervals by F i g in each case. 9 a circuit diagram of a digital-to-analog con

one or two counting steps further, with the verters and a reversible counter shown in FIG. (

Counting direction corresponding to the one to be represented are denoted by 605 and 607, and

Character is determined by the memory. F i g. 10 the assignment of various in which

With this subdivision, one used to represent a 4 ° embodiment according to the invention!

Part of the character used level in signals.

the representation approximates several individual steps. Before the description, some should be used in it ideally curved sections are explained according to purely terms. The term »characters digital data available. This up closes all characters, including the numeric counters to the exit of the two directions of deflection indi- 45 and number symbols. The term "sign signal" Purely digital counters, which are used individually, mean a control signal when recording or Data processing is a trouble-free and very representation for the temporal distraction of the electro-fast Mode of operation of the front jet according to the invention or of the ink jet from a writing direction with the simplest logical structure possible, head.

the conversion of the digital signals first 50 Fig. 1A shows an example of a character

immediately in front of the actual deflection device which is only represented by straight lines. the

in two digital-to-analog converters in only two places Fig. IB and 1C show how the horizontal and

the device according to the invention takes place. Vertical deflection potential is quantized to the in

According to a further development of the invention, a character shown in FIG. 1A is to be displayed. The ring counter 55 applied by pulse circuits horizontal deflection potential Vx is provided in three discrete levels, which quantizes the pulses supplied to it in levels, while the vertical deflection successive, the number of one stage potential Vy, is quantized in five discrete levels. These forming steps, corresponding in their phase position deflection potentials, are reduced to the horizontal and differing pulses, which are fed to the vertical deflection electrodes of a cathode ray tube selection circuit, which in turn are fed into 60 or an ink jet writing head in order to record a dependence of the characters fed to it from the memory or to represent.
Raster signal and the pulses of the ring counter to the F i g. 2 shows an example of a character, counter which supplies different step size signals to which in connection with the present counting. Invention was presented. It must be noted

According to a further embodiment of the invention 65 that this character compared to the other

if the access circuit is one of the maximum number of stages, the process and the arrangement,

The number of counting levels corresponding to the characters in order to represent such a character should now

having shift register, which are each explained in more detail.

In Fig. 3 different types of sheet pieces are shown which are used to represent the characters. There are eight arc pieces or quarter circles which converge at a starting point Po. This point is determined by the initial potentials of the horizontal and vertical deflection. These are the arches R ₁ and R ₂ , which start from the point Po and end at the point Pa ; R ₃ and R ₁ start at point Po and end at point Pb; R ₅ and R _a start from point Po and end in point Pc; and R ₇ and R _K start from point Po and end in point Pd. It is obvious that a character which is represented by combining these arc pieces with straight pieces looks more natural than one which is represented only by straight pieces.

F i g. 4 shows the representation of the numbers by a combination of arcs and straight lines. The starting point from which the representation of the character proceeded is marked with the symbol ο. It goes without saying that the combination of the arc gap and straight lines for the representation of a character are determined by a character synthesis matrix. The arc pieces R ₁ to /? _s . those used to represent the digits in FIG. 4 are used correspond to those in FIG. 3 are shown.

It is to be shown that each rectilinear piece is composed of a multiplicity of points whose position is a function of the Zeil. For this purpose, the at the Λ 'and! "- baffles applied potentials controlled by a digital character generator. The command for the up and down are provided by a digital counter. Each of the arch pieces is also made from a variety of Composed of points.

F i g. 5 shows a grid of points in order to represent the arc segments shown in the X / coordinate system. As can be seen from Fig. 5, each arcuate piece consists of eight points which can represent the arcuate piece clearly and economically. It should be noted, however, that the number of dots to represent an arc is not limited to eight. From Fig. 5 it can be seen that a circle can be drawn or struck in the following way: First the arc section R _{1 is} drawn from the starting point Po , then the arc section R _{3 is drawn} continuously from the end point P ₁ , whereupon the arc sections R _b and R ₁ in Connect in a similar way.

Referring to FIG. 5 we will now show how the points are determined in order to draw an arc. It is assumed that the reference or starting point Po is already fixed by the X- and / -Ablcnkpotentials in order to draw the arc piece R _1. First, the A "deflection potential remains unchanged while the y-deflection potential is increased by two steps, so that the point Po is replaced by the point P _1. As a second step, the A 'deflection potential is increased by one step while the y -Abler.kpotential is increased by two steps, so that the point P _{1 is} replaced by the point P _2. As a third step, the AT deflection potential is increased one step, while the y-deflection potential is increased two steps, so that the point P _{2 is} replaced by the point P _3. Similarly, the points P _{3 are} replaced by P ₄ , P ₁₁ by P ₅ , P _b by P _n and finally P _n by P _7. The arc section R ₁ is thus drawn. Similarly, as shown in Table 1, all arc pieces from R ₁ to /? _{8 are} drawn.

Table I.

Bow pieces I. Π III stages V Vl VH 0 1 U 1 U IV 2 U 2 U 2 U R ₁ X 2 t / 2 U 2 U 2 t / 1 U 1 U 0 Y 2 U 2 U 2 U 2 U 1 U 1 U 0 R _n X 0 i U 1 U 2 t / 2 U 2 U 2 U Y 2t / 2 U 2 U "t f τ
L. KJ 1 U 1 U 0 R ₃ X 0 ID 1 D 2 U 2D 2D 2D Y 0 1 U 1 U 2U 2 t / 2U 2 U R <X 2D 2D 2D 2 t / ID ID 0 Y 0 ID ID 2D 2D 2D 2D Rb X 2D 2D 2D 2D ID ID 0 Y 2D 2D 2D 2D ID ID 0 R ₆ X 0 ID ID 2D 2D 2D 2D Y 2D 2D 2D 2D ID ID 0 R ₇ X 0 1 U It / 2D 2t / 2t / 21 / Y 0 ID ID 2t / 2D 2D 2D Rb X 2t / 2t / 2 t / 2D It / It / 0 Y 2 t /

In the table:

U = the potential is increased (2 U means that the potential is increased by two levels),

D = the potential is lowered (2 D means that the potential is lowered by two levels),

0 = the potential remains unchanged,

X = the JT deflection potential and
Y = the y-deflection potential.

Since the arc pieces, as shown in Fig. 3, all in are run through in the same direction, table I can be unwritten in the following table Π! will.

309 507/422

Table II

10

Bow pieces I. U III stages V VI VII 0 1 1 IV 2 2 2 R ₁ XU 2 2 2 2 1 1 0 YU 2 2 2 2 1 1 0 R ₂ XU 0 1 1 2 2 2 2 YU 2 2 2 2 1 1 0 R ₃ XU ö 1 1 2 2 2 2 YD 0 1 1 2 2 2 2 R _t XU 2 2 2 2 1 1 0 YD 0 1 1 2 2 2 2 R ₅ XD 2 2 2 2 1 1 0 YD 2 2 2 2 1 1 0 R _t XD 0 1 1 2 2 2 2 YD 2 2 2 2 1 -I
1 0 R. XD 0 1 1 T 2 2 2 YU 0 1 1 2 2 2 2 R ₈ XD 2 2 2 2 1 1 0 YU 2

Therein mean:

i / = the X or Y deflection potential is increased continuously or in steps and

D = the X or y deflection potential is decreased continuously or in steps. From Table II it can be seen that besides the fact that the potentials increased or decreased!

the arc pieces A ₁ , R _t , R ₅ and R ₈ are the same with respect to the point grid or the potential changes (0, 1 and 2) with respect to successive steps. Therefore, Table II can also be rewritten to Table III below.

Table UT

step

TII

IV

VI

VII

diversion
diversion

diversion
diversion

First point grid

O
2 1
2 I. CN (N \ 2
I. 2
O 2
O 2
1 Second grid of points N) N) 2 \ O
2 2
1

From Table III it can be seen that in the first grid of points, the 7-deflection is first larger and gradually becomes smaller, while the ^ -deflection is first smaller and gradually becomes larger. In the second grid of points, the X deflection is first larger and gradually becomes smaller, while the F deflection is first smaller and gradually becomes larger. The arc pieces in the first grid of points are assigned to a "grid A", while those in the second grid of points are assigned to a "grid B". Table III can thus be rewritten into the following Table IV.

Tabel IV XU YU Grid A XU YU Grid B XU YD R ₃ Grid B XU YD -R ₄ Grid A XD YD Rs Grid A XD YD Rß Grid B XD YU Ri Grid B XD YU R ₈ Grid A

From the previous illustration it can be seen that all eight arc pieces can be drawn by specifying the grid (grid A or grid B) and the working mode (increasing or decreasing the A 'potential).

The following describes the arrangement for carrying out the method. In order to change or shift the X and F deflection potential in steps or discrete widths, digital counters are required.

Each counter is a binary counter with a few bits. Such a counter is able to count up and down. The counting does not only take place in one step, but also in two steps, depending on a command signal. When using such counters, the control is very simplified. In the block diagram shown in FIG. 6, these counters, which are very similar in terms of their construction, are denoted by 605 and 606. If the connections U and I are assigned input signals, the counter is incremented by one; if the connections U and II are assigned input signals, the counter is incremented by two; if the connections D and I

ö> 12

are assigned with signals, the counter will remain unchanged by one. At the second impulse (5-2

reset, and when the terminals D and II the signal passes through the gates ORA, AND-I, ORS

are occupied with signals, the counter is increased by two so that the K-counter counts by two steps unc

deferred. The connections PS of each counter at the same time the signal the gates OR-3, AND-6 unc

predefined signals are supplied. The counter 605 runs through 5 OR-8 , so that the A 'counter increases by one

and 606 are digital-to-analog converters DA (607,608) increments. At the third impulse 5-3 there is;

connected to the signal from the counters 605 and 606 fed to the gate OR-I , so that the F-Zählei

incoming digital output signal counts the corresponding two steps further while the signal

Reshape potentials. As a result, the gate OR-3 passes through at the same time, so that the

Horizontal and vertical baffles 609 and 610 10 A 'counter counts one step further. The fourth

individually given deflection potentials controlled. Pulse S-4 passes the signal through the gates again

F i g. 6 shows the block diagram of the entire OR-I, AND-X, ORS, so that the X counter is arranged by two. A pulse generator 601 generates, as counting in steps, while the signal is shown at the same time Fig. 10 (a), pulses with different- the gate OR-I passes through so that the A 'counter over borrowed phases Φ 1 and Φ2. The clock pulses generated by the pulse generator 601 controlled by the pulse 15 AND-4 and OR-6 continue to count in a ring. In the case of the fifth pulse SS , the counter 602 is controlled in such a way that it receives the output pulses and signals the gate OR-2 and OR-4. The signal is as shown in Fig. TOb to 1Od is emitted. The gates OR-2, AND-4 and OR-6 are supplied, so that the pulses S1 shown in FIG. 10b are one of the A 'counters counted further by two steps. The same shift register 604 is supplied, which outputs the output pulses shown in FIG. 20 to the gates OR-4, AND-I and 10e to 10g. The OR-I supplied so that the K counter by a pulse 51 to 57 are a selection circuit 603 increments. With the sixth pulse 5-6 carried out, so that the connections I or II of the counter, the signal runs the gates OR-2 and OR-4, so that 605 and 606 an instruction for further counting one or the A 'counter counts by two steps obtained during two steps. The command depends on 25 the ^ counter increments. When selecting the grid A or grid B, which is derived from the seventh pulse 5-7, the signal is derived from the gates to the programmed memory 600. OR-2, AND-4 and OR-6 are supplied, so that only the A 'counter containing the diodes or transistors (see FIG. 7) counts by two steps.
Memory 600 sets the reversible counters 605 and 606 From the foregoing it will be understood that this is when the timing pulse T _{1 was} derived from the shift register 604 30 shift to the arc of the first raster in and when the input signal, as shown in Table III draw, is carried out if at F i g. 10h is shown, one of the storage or re-connection A is connected to a "1". The elbow dts output ports 0-n was fed. Therefore, the second raster in Table III is shown when the reversible counters 605 and 606, as described above, the signal "1" to the terminal B in the in FIG. 8 ben operated so that the output signals of the counter 35 shown circuit is supplied. As shown by digital-to-analog converters 607 and 608. 8 can be seen, with the impulse 5-1 only the will be set. The associated deflection potentials A'-counter counted further by two steps; at 5-2 and the horizontal and vertical baffles 5-3 the A 'counter is incremented by two steps, 609 and 610 are fed. while the K counter counts one step further

Fig. 7 shows a detailed circuit diagram of memory 40; at 5-4, both the X and the F counter 600 are counted. The outer or peripheral counters are counted up to the memory by two steps; at 5-5 and 5-6 circuits 603, 605 and 606 are connected. The ΑΓ counter is incremented by one step, memory 600 is for displaying the number 5, as in FIG. 2, while the K counter is incremented by two steps. 2 programmed. /, and / ₂ are inverters, will; at 5-7 only the K counter is counted further by two steps Oi to O6 are OR gates, DO to Z) 8 diodes 45. This way the shifting and R _v to A ₈ becomes resistances. They are wired as drawn to draw the arc piece of the second grid. The in F i g. 8 shown selection circuit in Table III performed. From the previous AND gate contains AND-I to UNDS and OR description together with FIG. 8 it is verGatter OR-I to OR- &. The selection circuit controls of course that all are shown in table TV. \ I Arc counters 605 and 606 can be drawn by offsetting their 50 pieces. To one of the content. The ring counter 602 generates seven step arcs R ₁ through R _s to draw the contents of successive timing signals. If a floor of Table IV corresponds to the one shown in FIG. 8 is selected the switching element of the raster A, the shift circuit is supplied as a control signal,
steps of the X- and F-deflection potentials by the in F i g. 9 shows a circuit diagram of the reversible counter Table III set first grid shown. The 55 605 and the digital-to-analog converter 607. With the help of the first reversible counters 605 and 606, the selection circuit can each have a grid in table ΠΙ made easy to understand such number of counting levels as steps to display (Fig. 8) . The initial position of the characters in the X and F direction required signal »1« is present at connection A. The first pulse (5-1) runs through the are. In the counter 605 FF-I to FF-n JKSignal are the OR gate OR-I, the AND gate 60 flip-flops, AU-I to A Un are AND gates, which EWZM and the OR gate OR- S and is fed to the individual connection Π of the counter 606 as a function of the forward commands, so that these are opened; AD-I to AD-n are AND gates, counting two steps further. In this case, a command which individually depending on the reverse signal from the memory 600 to the terminal U will be opened; Oi-I, Oi-2 and Oi-3 are led, with the counter counting up, while 65 input OR gates, and Ai is an input signal arriving at terminal D the counter AND gate.

Adjusted backwards If there is no signal at the The reversible counter works like

If the reversible counter 605 is connected to I and Π, it follows: If the U terminal receives an up command

13 '14

is supplied, while the signal for display in the present version is set to "14",

the terminal I is fed, is the AND gate in which a line in the time interval T ₁ of seven

Ai is opened so that the input signal "1" exists in the individual stages because the reference point (or

Input terminals J and K of the flip-flop FF-I the coordinate) X = I and 7 = 4. The signal is fed. The flip-flop FF-I works in ab- 5 is the predetermined connection 4 of the reversible

dependence on the Tatkimpuls Φ _χ and generates the counter 606 supplied so that this is set to "28"

Ausfedngsimpulse depending on the clock will. The signal is also sent to the INH terminal

pulses Φ, and then runs backwards into the state the OR gate O ₃ and the inverter L supplied,

0 = 1 and 0 = 0. If the forward command is applied so that the reversible counter 606 does not count, it also remains while the signal for display on the anio when the clock pulse is applied to it as to the reversible counter

Conclusion II is present, the AND gate AU-I is open, counter 605 is present.

so that the signal "1" to the input connections / When the signal applied to the connection I ₁ falls below and K of the flip-flop FF-2. Depending on whether the signal at the terminal Z _{2 is} broken, the clock pulses will lead to the flip-flop FF-2, the signal is reset from the connection state 0 = 1 and 0 = 0. The 15 point F ₁ between the diode D ₁ and the cons output signals of the flip-flops FF-I and FF-2 are branched off from R ₁ at the second crossing point and fed to the digital-to-analog converter 607 , so that the reverse connection D of the reversible counter 605 is supplied with the input corresponding to the output signal, so that it operates as a downward counter, the signal is applied to the connection Λ '. If the command Therefore was _{changed from forward to backward during the 7 "2} period seven were changed from forward to backward, while 20 units were subtracted, whereby the counter finally applied the signal to terminal I, the AND- will be" 7 ". The signal of the Connection point gate Ai is open, while the flip-flop FF-I in F, the /, V / 7 gate of the reversible counter is also reset to the state 0 = 0 and © = 1. 606 is supplied so that its content remains unchanged While the reverse signal at the gate ΛD-I in the output pulses of the shift register are applied to state 0 = 0, it remains closed, so that the terminals t ₃ , Z ₄ , Z ₅ , Z ₆ etc. in individual steps the flip- Flop FF-2 does not reach an input signal, that is, applied so that both of the reversible counters 605 and 606 the flip-flop FF-2 remains unchanged work.

only one but two steps forwards and backwards. The output signals of the counters 605 and 606 are

can count downwards. The reversible counter 606 is from 30 through the digital-to-analog converter in horizontal and vertical

same construction and function as counter 605. Vertical deflection potentials implemented. These will be on

The output signals of the reversible counter 605, the horizontal and vertical deflection plates 609 and are given to the stages of the digital-to-analog converter 607 610 , whereby a representation of the writing is supplied, which is made possible in a known manner in the manner of a chens. The mode of operation of the array derailleur is built up. A detailed description of the seventh stage of the description has therefore been dispensed with. That will be described from when the signal arrives at the AnSignal at the connection point X of the digital-to-analog circuit Z _{7 of} the shift register.
Converter 607 is placed on the horizontal deflector plate. When a signal is applied to terminal Z ₇ , 609 is given. The output signal of the reversible this from the connection point F ₆ between the counter 606 is branched off and fed to the digital-to-analog converter 608 40 diode Z) ₆ and the resistor /? ". The output signal of the digital-to-analog converter 608 via the OR gate O _{5 to} the forward connection U converter 608 is fed from the connection Y of the reversible counter 605. The signal is applied to vertical baffle 610 . also to the reverse connection D of the reversible

In the following, the operation of the counter 606 described is to be carried out via the OR gate O ₂ . The circuitry referring to the case where the 45 signal matched to the raster 5 arc is shown in Figs. 2 or 4, the number "5" shown is drawn to the connection B of the selection circuit 603 of the memory or is to be shown. The 600 fed. Like F i g. 8 shows, the counter lines (1) to (5) and (8) of the rectilinear sections 605 works as a forward counter when the grid B is selected and will not be explained further here. In the counter 606 as a down counter. As a result, lines (6) and (7) are arcuate pieces R ₃ and R _b 50 that are shown in FIG. 5 shown bow section R ₃ drawn, used. The circuits in that illustrated have been expressed in greater detail that of FIG. 9 illustrated embodiment are based on the principle of the negative reversible counter 605 in the fifth stage (5) tive logic for the present case. This is set to "7" and counts depending on the connection 5 of the in FIG. The first clock pulse shown in FIG. 7 with the phases Φ _χ and Φ ₂ μm is supplied with the input signal (for example that in FIG. 55 2 onwards. This counter 605 counts in each case depending on the signal shown 10h). When the terminal I is energized, the counter 605 counts from the shift register 604 to the starting point I ₁ depending on the fifth and sixth directed. The signal is derived from the clock pulse by one step at a time. The seventh connection point Po between the diode Do and the 60 clock pulse cannot counteract the reversible counter Ro at the crossover point of the line with the line going out at the INH connection because there is no input signal connection point 5 because the AND gate Ai is inoperative device from connection point Z ₁ . The signal is sent to the is set. After passing through the sixth stage, ie terminal INH of the reversible counter 605 over one at a time when the pulse T _{1 is passed to} the terminal Z ₇ OR gate O ₁ and the inverter I ₁ . Since 65 has disappeared, the reversible counter 605 is stopped by the counter 605. At the same time "17" = "7" + "10" are set.

the signal is from the point Po to the terminal 2 On the other hand, the reversible counter works

of the reversible counter 605 , so that this 606, which was set to "14" in the previous step S (5)

was set, not as a function of the first clock pulse because no input signal appears at the connection INH and the AND gate Ai is not active. Since the terminal I is excited at the second and third clock pulse, the counter 606 counts depending on the fourth, fifth, sixth and seventh clock pulse by two steps, since the terminal II is excited, that is, that a signal is applied to it. After the sixth stage has passed, the counter becomes 606

set to "24" = "14" + "10". These signals are fed to the digital to analog converters 607 and 608 so that the horizontal and vertical deflection potentials are generated and fed to the deflector plates 609 and 610. As a result, the bend R ₃ , as in FIG. 3, drawn for storage or as an output signal.

From what has been said above, it can be seen how the bow section R _{5 is} drawn.

For this purpose 3 sheets of drawings

Claims (3)

The invention relates to a device for claims: Representation of characters with a memory containing the individual characters, an access 1. Device for the representation of writing circuit for the serial retrieval of the characters with a corresponding signals from the memory holding the individual characters, an access circuit for a serial retrieval of more effective in the X and Y directions the characters ent- deflection device provided display device for speaking signals from the memory, one with the characters, the two deflection directions indi one in the X and ^ -direction effective deflection viduell assigned reversible counters, the off device provided display device for the io gears above each Counter individually assigned characters, the two deflection directions indi- digital-to-analog converter with the deflection device viduell assigned reversible counters, which are connected, and with pulse circuits zui outputs over each counter individually assigned exposure of the access circuit and the counter, nete digital-analog g converter with the deflection. B. from the German Auslegeschrifl device are connected, and with impulse 15 1 255 965 known device uses the two circuits to act on the access deflection directions of the deflection device individually circuit and the counter, thereby associated counter to identify the location of each shows that the characters distorting the characters in terms of line and speaking, stored signals correctly display the reversible line position on the display device counter (605, 606) on a corresponding display, with the information about the initial counter reading Λ-7 initial coordinates Location of the character to be displayed naten the respective character and forward is taken from a memory. The further counting downward signals for the counting of the counters of the two counters is used in the known \ orrichtung as well as one of two possible, each one used to indicate successive correct dot raster indicating raster signals 25 characters in each case consecutively to one another, after which at least one part of the closing locations can be recorded on the display device to be displayed. The two counters each have lower register positions with the access circuit (604) at the memory, which cannot be counted by themselves, (600) Signals with a unit of a stage that is not automatically switchable, these indicating time intervals being given, with each 30 lower register positions for beam adjustment of the characters made up of several stages and display device according to a fine grid, each stage in several steps for the counters to be used. The countable parts of the two counting (605, 606) is subdivided, and that besides the counting direction and the starting coordinates in the known device therefore have no influence on the representation of the shape of an individually matching connection (U, D, INH, PS) of the 35 len characters, but are only used for counters (605, 606) to determine the raster signals (A, B) of the respective location of the processed and corresponding output signals character to be displayed on the display device. (Xl, XU, Yi, YIl) output selection circuit From the German Auslegeschrift 1 092 237 is a (603) is connected to the memory (600) of another device for displaying characters which the counters (605, 606) for each of the known during 40, in which the individual characters through of the time interval of a stage, addition of steps taken from a memory unit voltages formed independently of each other in the counting step size and transferred to the corresponding are controllable. the deflection devices of the display device 2. Device according to claim 1, thereby laid. The individual characters are thereby indicates that one of the pulse circuits 45 is in one of plural rows and plural columns (601) acted upon ring counter (602) provided formed grid in each case point by point of one, which is represented by the supplied pulses (Φ _χ , Φ ₂ ) in electron successive controlled by the deflection devices, in their number the one stage beam. As a result of this representation of the forming steps corresponding, in their phase characters, only angular transitions of the individual position differing impulses (51 to 57) 50 parts of a character to be represented are to be depicted, subdued, which the selection circuit (603) draws - whereby the legibility of the in their original leads are, which in turn, depending on the writing having curved parts from the memory (600) supplied raster signal (A, character suffers. Every single point of the device known with this B) and the pulses of the ring counter to the counter is ( 605, 606) supplies the different step sizes 55 with regard to its respective characters and signals (Xl, XM, Yl, YIl) for counting. Column value is stored in a memory and is 3. Apparatus according to claim 1 or 2, characterized in that the access circuit (604) is called up by one of the maximum number of stages of the characters ring circuit calling up the individual memory locations for each character to be displayed. corresponding number of counters having 60 A device for displaying writing shift registers is that of the first character, with which also curved parts of the writing pulse (51) of the ring counter (602) is applied, character according to the original shape of this so that characters can be represented by each counting stage of the shift register is, for. B. successive signal pulses (Tl to Tn) with the one from the US Pat. No. 3,335,416 known. Time interval can be emitted for a representation of the respective form of a character corresponding to a level of the character. uses the known device one with the Windings of the deflectors connected resistance combination, which corresponds to the from