DE202020107459U1 - Driver chip, LED light and LED display screen - Google Patents

Abstract

Driver chip (2), a driver module (21) being provided in the driver chip (2), the driver chip (2) being connected to a signal connection (100a, 100b) and a power connection (100c, 100d); wherein the power connection (100c, 100d) provides power for the driver chip (2); wherein the signal terminal (100a, 100b) is used for inputting and outputting a data signal;
characterized in that the signal connection comprises a first signal connection (100a) and a second signal connection (100b);
wherein the driver chip (2) additionally comprises a data direction assessment and switching module (20) which is connected to the driver module (21); wherein the data direction assessment and switching module (20) is connected to the first signal connection (100a) and the second signal connection (100b) and is configured to determine an input direction of the data signal at the first signal connection (110a) and at the second signal connection (100b) ; automatically switching the signal terminals (100a, 100b) for inputting and outputting the data signal; importing the data signal via the signal connection (100a, 100b) to be inputted for the data signal and transmitting it to the driver module (21); to receive the data signal returned by the driver module (21) and to output the data signal via the signal connection (100a, 100b) to be outputted.

Description

Technical field

The present application pertains to the field of LEDs and, more particularly, relates to LED lights with an integrated driver IC.

State of the art

An LED display screen is known which forms a display screen by arranging LED lights in an array, and a more advanced method currently on the market is to make LED display screens using LED lights with a built-in driver IC. This LED lamp 100 'includes how 1 shows a driver IC 2 ', the driver IC 2' being provided with a plurality of signal connections and power connections; the power terminal including a positive terminal and a negative terminal connected to an external power source to form a power circuit to provide power to the driver IC 2 'and the light crystal plate; wherein the signal connection comprises a signal input and a signal output; the control signal reaches the signal input from the control module of the LED display screen or a superordinate LED light 100 'and the control signal is passed on from the signal output to the next LED light 100'. Inside there are control connections (not marked in the figure), which are each connected to three light crystal plate 1 '(blue light crystal plate, green light crystal plate and red light crystal plate), the three light crystal plate 1' share a common anode (or a common cathode).

Now, when the above-described LED lights 100 'are arranged in an array to form an LED display screen 1000', the signal terminal has a signal input and a signal output; whereby the control signal must always come from the signal input and from the signal output; where, as in 2 shown, the lamp beads of all LED lights 100 'are arranged in the same way, using the example of the control signal that is routed in the horizontal direction (or is routed in columns in the vertical line), the signal lines of the LED lights 100' of the same row one after the other, and the LED lights 100 'between adjacent rows are connected from head to stern by the signal lines. In particular, the individual LED lights 100 'of each line are connected in series from left to right, up to the last LED light of each line, the signal output of the last LED light 100' being connected in series to the signal input of the next line via a signal line and the line is resumed. A disadvantage of this approach is that the signal lines which are connected from the tail to the head between adjacent rows of the LED lights 100 'have to travel a long distance, which increases the complexity of the wiring. In particular, it is envisaged that in the field of transparent LED display screens 1000 ', the wiring design requirements are very simple, with winding wire from the head adding complexity to the wiring design and making other functions, such as the arrangement of conductive lines, difficult.

In order to make the wiring easier, the applicant has installed the LED lights 100 'of the adjacent rows by 180 ° and vice versa, and a series connection through the heads or through the hedge between the adjacent rows is made possible. For example, an odd line is mounted in the forward direction and an even line is mounted in the reverse direction; wherein a signal input of the odd line is on the left and a signal input is on the right, the control signal being transmitted from left to right; the even lines being reversed, the signal input being on the right and the signal output being on the left, the control signal being transmitted from right to left; However, this procedure has the disadvantage that the directions of arrangement of the three light crystal plates within the LED light 100 'in adjacent rows are exactly opposite, and this can lead to a color difference between the left and right viewing angles of the LED lights 100' in adjacent rows the illustration of the LED display screen 1000 '.

Disclosure of the invention

In order to overcome the problems of the prior art LED display panels that involve complicated wiring or color differences between adjacent rows of LED lights, the present invention provides a driver chip, an LED light and an LED display panel.

A first aspect of the present invention provides a driver chip, wherein a driver module is provided in the driver chip, the driver chip being connected to a signal terminal and a power terminal; wherein the power connector provides power to the driver chip; wherein the signal terminal is used for inputting and outputting a data signal;
wherein the driver chip further comprises a data direction judgment and switching module connected to the driver module;
wherein the signal port comprises a first signal port and a second signal port;
wherein the data direction judgment and switching module is connected to the first signal terminal and the second signal terminal to determine an input direction of a data signal at the first signal terminal and the second signal terminal, the signal terminal for inputting the data signal and the signal terminal for outputting the data signal automatically are switched, wherein the data signal is imported from the signal terminal for input and transmitted to the driver module, wherein the data signal returned by the driver module is received, and the data signal is output from the signal terminal for data output.

According to the invention, a driver chip is provided whose connected signal connections no longer differentiate between the data directions, but are able to input and output data signals. A determination of a direction of data signals on the first signal connection and the second signal connection is carried out by the data direction judgment and switching module, connections for inputting and connections for outputting the data signal being identified, the data signal being input from the connection for data input and to the driver module is output, wherein the data signal returned by the driver module is received, and the data signal is output from the connection for data output. When the LED light is used in a device such as an LED display screen, it is not necessary to design the arrangement or the wiring of the respective LED lights, with the LED lights passing through between adjacent rows (or between adjacent columns) the heads are connected in series or through the hedge without changing the orientation of the LED lights between the rows (or between the columns), avoiding the need for the original wiring to require the winding layout of a head-to-tail connection which significantly reduces the complexity of the wiring. LED lights between adjacent rows or columns also do not produce any color differences.

In a preferred development it is provided that the driver module has a data input and a data output;
wherein the data direction assessment and switching module comprises a data input circuit, a data output circuit and a watchdog;
wherein the data input circuit comprises two input branches which are connected to the data input, wherein the two input branches are each connected to the first signal connection and the second signal connection;
wherein the data output circuit comprises two output branches which are connected to the data output, the two output branches being connected to the first signal connection and the second signal connection, respectively;
wherein the watchdog is used to determine an input direction of the data signal in the first signal connection and the second signal connection, and to control the selection of an input branch in the data input circuit and the selection of an output branch in the data output circuit, so that the data signal is always input from one of the signal connections and output from the other signal terminal.

In a preferred development it is provided that the data input circuit comprises a data direction selector; wherein the data direction selector is each connected to the first signal connection, the second signal connection, the watchdog and the data input of the driver module; wherein the data direction selector is connected to the first signal connection and the second signal connection to form two input branches and to switch the connection to the signal connections for the input of the data signal in response to the control signals sent by the Waatchdog to select one of the input branches, the data signal is output from the data direction selector to the data input of the driver module;
wherein the data output circuit is connected to the data output of the driver module and comprises two output branches, in each of which a switching device is provided, each of which is connected to the first signal connection and the second signal connection, the two switching devices always working in an inverted state;
wherein the watchdog is connected directly or indirectly to the data input, the data output and the data direction selector and the switching device on the data output circuit in order to detect signals at the data input and the data output, and to the signal connection for the input of the data signal and the signal connection for the output to identify; and wherein a control signal is output to the data direction selector and to the two switching devices on the data output circuit, an inverter being arranged on one of the lines between the two switching devices and the watchdog.

In a preferred development it is provided that the data direction selector comprises a first signal port, a second signal port, a data output and a selection port;
wherein the first signal terminal is connected to the first signal port via a first diode, wherein the second signal terminal is connected to the second signal port via a second diode; where the Data output is connected to a data input of the driver module;
wherein a data output of the driver module is connected to the first signal connection via the first switching device, and is connected to the second signal connection via the second switching device;
wherein the watchdog comprises an input signal detection port, an output signal detection port and a control port;
wherein the input signal detection port is connected to the first signal port of the data direction selector; wherein the output signal acquisition port is connected to the data output of the driver module; wherein the control port is each connected to the selection port of the data direction selector, to control connections of the first switching device and the second switching device, an inverter being arranged at the control port and the control connection of the second switching device; or
wherein the input signal detection port is connected to the second signal port of the data direction selector; wherein the output signal acquisition port is connected to the data output of the driver module; wherein the control port is connected to the selection port of the data direction selector, to control connections of the first switching device and the second switching device, an inverter being arranged at the control port and the control connection of the first switching device.

In a preferred development it is provided that the watchdog comprises a signal monitoring module and a counter;
wherein the signal monitoring module is connected to the input signal detection port and the output signal detection port and is provided with a monitoring output; wherein the signal monitoring module makes a logical determination based on the signals detected by the input signal detection port and the output signal detection port and outputs a monitoring signal from the monitoring output; wherein the monitoring signal with the low level 0 is output to the counter in order to reset the counter when a certain logic is satisfied; otherwise, the monitor signal of the high level 1 is outputted to the counter, whereby the counter counts;
wherein the counter serves to count within a preset time, the output control signal is judged as the high level 1 when the count value reaches or exceeds a predetermined value, and otherwise the output control signal is judged as the low level 0.

In a preferred development it is provided that the logical assessment rules of the signal monitoring module are as follows: if the signals detected by the input signal detection port and the output signal detection port are not the same and the signal detected by the input signal detection port has a low level 0 and the signal detected by the output signal detection port has a has high level 1, the monitor output outputs a monitor signal with a low level 0; in the remaining cases the monitoring output outputs a monitoring signal with a high level 1.

In a preferred development it is provided that the frequency of the signal detected by the signal monitoring module is much greater than the frequency of the data signal;
wherein the data signal is input and output from the driver module using a first-in-first-out rule; wherein the preset time is greater than a time at which the data signal is input and output from the driver module.

In a preferred development it is provided that the driver module comprises a logic circuit module and an analog analog circuit module;
wherein the logic circuit module is used to receive the data signal input from the data input, extract a control signal from the data signal and transmit it to the analog circuit module, and output the data signal from the data output;
wherein the analog circuit module generates a plurality of drive signals corresponding to the number of light crystal plates based on the data signal and drives the corresponding light crystal plates.

In a preferred development it is provided that the data input circuit comprises a first AND gate, a second AND gate and an OR gate; wherein the first signal connection is connected to an input of the first AND gate via a fourth diode, whereby a first input branch is formed; wherein the second signal connection is connected to an input of the second AND gate via a fifth diode, whereby a second input branch is formed; wherein the outputs of the first AND gate and the second AND gate are connected to the inputs of the OR gate, an output of the OR gate being connected to the data input;
wherein the data output circuit comprises a first output branch and a second output branch, the first output branch being connected via the third switching device between the first signal connection and the data output; wherein the second output branch is connected via the fourth switching device between the second signal connection and the data output;
the watchdog comprising a control input and a control output, the control input being connected to an output of a third AND gate, an input of the third AND gate being connected to the data output and the other input being connected to the first signal connection via a second NOT Gate is connected; wherein the control output is connected to the other input of the second AND gate and the control connection of the third switching device and is connected to the other input of the first AND gate and the control connection of the fourth switching device via a first NOT gate.

A second aspect of the invention provides an LED luminaire with a driver chip, a luminaire crystal plate, a signal connection and a power connection, a driver module being provided in the driver chip; wherein the power connection provides the power for the circuit in the LED light; wherein the signal terminal is used for inputting and outputting a data signal; wherein the light crystal plate is connected to the driver chip and is driven by the driver module;
wherein the signal port comprises a first signal port and a second signal port;
wherein the LED light further comprises a data direction assessment and switching module in connection with the driver module, wherein the data direction assessment and switching module is arranged in the driver chip or outside the driver chip;
wherein the data direction judgment and switching module is connected to the first signal terminal and the second signal terminal to determine an input direction of a data signal at the first signal terminal and the second signal terminal, starting the signal terminal for inputting the data signal and the signal terminal for the To switch output of the data signal, wherein the data signal is imported from the signal terminal for input and transmitted to the driver module, wherein the data signal returned by the driver module is received, and the data signal is output from the signal terminal for data output.

The invention provides an LED light in which the two signal connections no longer differentiate between the data directions, but rather the two signal connections can input and output data signals. A determination of a direction of data signals on the first signal connection and the second signal connection is carried out by the data direction judgment and switching module, connections for inputting and connections for outputting the data signal being identified, the data signal being input from the connection for data input and to the driver module is output, wherein the data signal returned by the driver module is received, and the data signal is output from the connection for data output. When the LED light is used in a device such as an LED display screen, it is not necessary to design the arrangement or the wiring of the respective LED lights, with the LED lights passing through between adjacent rows (or between adjacent columns) the heads are connected in series or through the hedge without changing the orientation of the LED lights between the rows (or between the columns), avoiding the need for the original wiring to require the winding layout of a head-to-tail connection which significantly reduces the complexity of the wiring. LED lights between adjacent rows or columns also do not produce any color differences.

In a preferred development it is provided that the data direction assessment and switching module is provided in the driver chip.

In a preferred development it is provided that the driver module has a data input and a data output;
wherein the data direction assessment and switching module comprises a data input circuit, a data output circuit and a watchdog;
wherein the data input circuit comprises two input branches which are connected to the data input, wherein the two input branches are each connected to the first signal connection and the second signal connection;
wherein the data output circuit comprises two output branches which are connected to the data output, the two output branches being connected to the first signal connection and the second signal connection, respectively;
wherein the watchdog is used to determine an input direction of the data signal in the first signal connection and the second signal connection, and to control the selection of an input branch in the data input circuit and the selection of an output branch in the data output circuit, so that the data signal is always input from one of the signal connections and output from the other signal terminal.

In a preferred development it is provided that the data input circuit comprises a data direction selector; wherein the data direction selector is each connected to the first signal connection, the second signal connection, the watchdog and the data input of the driver module; wherein the data direction selector is connected to the first signal connection and the second signal connection in order to form two input branches and the connection to the signal connections for the input of the data signal as a function of toggle the control signals sent by the Waatchdog to select one of the input branches, the data signal being output from the data direction selector to the data input of the driver module;
wherein the data output circuit is connected to the data output of the driver module and comprises two output branches, in each of which a switching device is provided, each of which is connected to the first signal connection and the second signal connection, the two switching devices always working in an inverted state;
wherein the watchdog is connected directly or indirectly to the data input, the data output and the data direction selector and the switching device on the data output circuit in order to detect signals at the data input and the data output, and to the signal connection for the input of the data signal and the signal connection for the output to identify; and wherein a control signal is output to the data direction selector and to the two switching devices on the data output circuit, an inverter being arranged on one of the lines between the two switching devices and the watchdog.

In a preferred development it is provided that the watchdog comprises a signal monitoring module and a counter;
wherein the signal monitoring module is connected to the input signal detection port and the output signal detection port and is provided with a monitoring output; wherein the signal monitoring module makes a logical determination based on the signals detected by the input signal detection port and the output signal detection port and outputs a monitoring signal from the monitoring output; wherein the monitoring signal with the low level 0 is output to the counter in order to reset the counter when a certain logic is satisfied; otherwise, the monitor signal of the high level 1 is outputted to the counter, whereby the counter counts;
wherein the counter serves to count within a preset time, the output control signal is judged as the high level 1 when the count value reaches or exceeds a predetermined value, and otherwise the output control signal is judged as the low level 0.

In a preferred development it is provided that the logical assessment rules of the signal monitoring module are as follows: if the signals detected by the input signal detection port and the output signal detection port are not the same and the signal detected by the input signal detection port has a low level 0 and the signal detected by the output signal detection port has a has high level 1, the monitor output outputs a monitor signal with a low level 0; in the remaining cases the monitoring output outputs a monitoring signal with a high level 1.

In a preferred development it is provided that the frequency of the signal detected by the signal monitoring module is much greater than the frequency of the data signal;
wherein the data signal is input and output from the driver module using a first-in-first-out rule; wherein the preset time is greater than a time at which the data signal is input and output from the driver module.

In a preferred development it is provided that the driver module comprises a logic circuit module and an analog analog circuit module;
wherein the logic circuit module is used to receive the data signal input from the data input, extract a control signal from the data signal and transmit it to the analog circuit module, and output the data signal from the data output;
wherein the analog circuit module generates a plurality of drive signals corresponding to the number of light crystal plates based on the data signal and drives the corresponding light crystal plates.

In a preferred development it is provided that the data input circuit comprises a first AND gate, a second AND gate and an OR gate; wherein the first signal connection is connected to an input of the first AND gate via a fourth diode, whereby a first input branch is formed; wherein the second signal connection is connected to an input of the second AND gate via a fifth diode, whereby a second input branch is formed; wherein the outputs of the first AND gate and the second AND gate are connected to the inputs of the OR gate, an output of the OR gate being connected to the data input;
wherein the data output circuit comprises a first output branch and a second output branch, the first output branch being connected via the third switching device between the first signal connection and the data output; wherein the second output branch is connected via the fourth switching device between the second signal connection and the data output;
wherein the watchdog comprises a control input and a control output, the control input being connected to an output of a third AND gate, an input of the third AND gate being connected to the data output and the other input is connected to the first signal terminal via a second NOT gate; wherein the control output is connected to the other input of the second AND gate and the control connection of the third switching device and is connected to the other input of the first AND gate and the control connection of the fourth switching device via a first NOT gate.

A third aspect of the present invention provides an LED display screen and the above-described LED lamp.

In the LED display screen provided by the present invention, it is no longer necessary to specifically carry out the arrangement or the wiring of the individual LED lamps, since the inner array of the LED display screen is arranged in the LED lamp improved according to the invention, the LED lights are connected in series between adjacent rows (or between adjacent columns) through the heads or through the hedge without changing the orientation of the LED lights between the rows (or between the columns), avoiding that at the original wiring requires the winding layout to be connected from the head to the stern, which greatly reduces the complexity of the wiring. LED lights between adjacent rows or columns also do not produce any color differences.

In a preferred development it is provided that the LED lights form LED arrays, the LED arrays being arranged in the same direction in an array.

In a preferred development it is provided that a data control module is also included;
wherein the data control module is provided with a number of first data ports and second data ports; wherein some of the LED lights of the LED array are connected in series between the first data ports and the second data ports.

In a preferred development it is provided that the arrays of the LED lights, which are connected in series between the first data ports and the second data ports, are connected in several rows or in several columns in series, the LED lights between adjacent rows or connected between adjacent crevices by the heads or by the hedge.

In a preferred development it is provided that the data control module comprises two physical network connections, an FPGA and a memory;
wherein the FPGA comprises a data acquisition and transmission module, a first output module, a second output module and a disconnection monitoring module;
wherein the data acquisition and transmission module is connected to the two physical network connections and the memory for acquiring the data packet and sending the data packet, and for acquiring a data signal from the data packet and storing it in the memory;
wherein the first output module is designed to call up the data signal stored in the memory and to send this via a first data port to the respective series-connected LED light;
wherein the second output module is designed to inverse the data signal stored in the memory as a backup signal, the backup signal being sent via the second data port to a corresponding LED light connected in series;
wherein a backup switching device is provided between the second output module and the second data port, the backup switching device being used to switch on and off for the backup signal sent to the outside by the second output module;
wherein the disconnection monitoring module is connected to a control terminal of the backup switching device and is connected to the second data port via the third diode in order to acquire data from the second data port and to output the backup control signal to the control terminal of the backup switching device.

A first output module, a second output module and a disconnection detector module are provided in the FPGA of the data control module, the FPGA being able to input the data signal via the first output module to a light group of corresponding series-connected LED lights in the forward direction. The light of the series-connected light group fails, causing an interruption, the disconnection monitoring module can monitor the state of the second data port to determine that the data signal has not been received; at this point in time the disconnection monitoring module can control the backup switching device to be switched on in order to send a reverse backup signal to the outside through the second output module. It is ensured that the LED light behind the failed LED light continues to work correctly.

Figure list

• 1 Fig. 3 is a schematic view of a circuit frame of an LED lamp provided in the prior art;
• 2 Fig. 3 is a schematic view of a circuit frame of an LED display panel provided in the prior art;
• 3 Fig. 3 is a schematic view of a circuit frame of another LED display panel provided in the prior art;
• 4th Fig. 3 is a schematic view of the package structure of the LED lamp provided in the specific embodiment of the present invention;
• 5 Fig. 3 is a schematic view of a circuit frame of an LED lamp provided in the specific embodiment of the invention;
• 6a Figure 3 is a schematic view of a circuit frame of a further refined LED light provided in a specific embodiment of the invention;
• 6b Figure 4 is a schematic view of a circuit frame of another more refined LED light provided in a specific embodiment of the invention;
• 7th Figure 3 is a schematic view of the waveforms in the absence of signals at both signal terminals;
• 8th Fig. 13 is a schematic view of the signal waveform when a signal is input to two signal terminals;
• 9 Fig. 3 is a schematic view of a detection cycle of two signal detection terminals in the watchdog;
• 10 Fig. 3 is a schematic view of an internal circuit frame of the watchdog;
• 11 Figure 13 is a truth table of a signal monitoring module in the watchdog;
• 12th Fig. 3 is a schematic view of a counter for counting in the watchdog;
• 13th Fig. 3 is a schematic view of the counter in the watchdog when the count number exceeds a predetermined value;
• 14th Fig. 3 is a schematic view of a circuit frame of an LED display screen provided in a specific embodiment of the invention;
• 15th Figure 4 is a schematic view of the control signal output by the watchdog when the LED display screen provided in a specific embodiment of the invention is initialized with less than 200 microseconds on;
• 16 Figure 13 is a schematic view of the control signal in individual LED lights issued by the watchdog after an LED display screen provided in a specific embodiment of the invention has been turned on for more than a predetermined time (200 microseconds);
• 17th Figure 4 is a schematic view of the control signal in individual LED lights issued by the watchdog after an LED display screen provided in a specific embodiment of the invention inputs the data from the left side of the first row;
• 18th Figure 3 is a schematic illustration of a controller of an LED display screen provided in a specific embodiment of the invention;
• 19th Figure 3 is a detailed schematic view of one in 18th provided data control module.

Concrete embodiments

In order to make the technical problems, technical solutions and advantageous effects which are solved by the present invention clearer, the present invention is explained in more detail below in connection with the drawings and exemplary embodiments. It is to be understood that the specific embodiments described herein are for the purpose of illustrating the invention and are not intended to limit the scope of the invention.

In the description of the present invention it is clear that the terms “longitudinal”, “radial”, “length”, “width”, “thickness”, “top”, “bottom”, “front”, “rear”, “left ”,“ Right ”,“ vertical ”,“ horizontal ”,“ top ”,“ bottom ”,“ inside ”,“ outside ”and the like indicate an orientation or positional relationship based on the orientation or positional relationship shown in the drawings are given only to facilitate the description of the present invention and to simplify the description, and do not indicate or imply that the device or element in question necessarily have a particular orientation, are designed and operated with a particular orientation, and therefore not as a limitation of the present invention. In the description of the present invention, "several" means unless otherwise specified, two or more than two.

It should be noted that in the description of the present invention, the terms "assembly", "connection" and coupling "are to be understood in a broad sense, unless expressly stated otherwise or defined otherwise, and that it is, for example, a fixed Can be a connection, a detachable connection or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of two elements. For those of ordinary skill in the art, the specific meaning of the above terms in the present invention can be understood on a case-by-case basis.

Embodiment 1

This example explains in detail an improvement to the LED light 100 and the driver chip 2 which are disclosed in the present utility model. The driver chip 2 can be protected as a separate protective body, which is specifically used for specific explanations in the LED light 100 is integrated, and this does not mean, however, that only the LED light 100 is protected and the driver chip 2 is not protected. The description in this example is also sufficient to support the solution to the driver chip.

The mechanical structure of the LED light 100 disclosed in the present example includes a driver chip 2 (Driving IC), a light crystal plate 1 , a signal connection and a power connection, as in 4th shown; encapsulation by a holder is usually also required when a lamp bead is produced, but in this example it is not necessary for the encapsulation to be carried out in practice, where COB (English name: Chip On Board, Chinese name: Chip On Board packaging) or COG (English name: Chip On Glass; Chinese name: Surface Chip Packaging of Glass) can also be used directly to put LED lights in the LED display screen 1000 to use, thus the inventive concept of the present application can be realized as long as the core components of the present application with the driver chip 2 who have favourited Light Crystal Plate Wafer 1 , and the improved and innovative data direction judgment and switching module 20th are provided in the present application. The LED light 100 of the present application need not be encapsulated in the form of a lamp bead. The basic structure of the LED light 100 is well known, so here are no detailed descriptions of the basic structure in the LED light 100 only explained how the new data direction assessment and switching module 20th in the driver chip 2 (or outside of the driver chip 2 in the LED light 100 ) is added in this application.

The power connection provides the power supply for the internal circuits in the LED light 100 ready, ie for the operational chip 2 and the light crystal plate 1 ; wherein the signal terminal is used for inputting and outputting a data signal; wherein in this example the signal connection is a first signal connection 100a and a second signal terminal 100b includes; wherein the power connector has a first power connector 100c and a second power connection 100d includes; where in this example the first signal connection to simplify the description 100a on the left and the second signal connector 100b are positioned on the right side; wherein the data signal from the first signal terminal 100a input and from the second signal terminal 100b can be output, with the first signal connection now 100a acts as a signal connection for the input of the data signal, the second signal connection 100b acts as a signal connector for outputting the data signal. Of course, the data signal can come from the second signal terminal 100b entered and to the first signal connection 100a output, with the second signal connection now 100b acts as a signal terminal for inputting the data signal, the first signal terminal 100a acts as a signal connector for outputting the data signal. The first power connection 100c in this example, one negative electrode (or ground) is VSS, and the second power connection 100d is a positive electrode (VDD).

As in 5 shown is the driver chip 2 inside with a driver module 21 (Driving Module, DM for short) provided; being the luminaire crystal plate 1 with the driver chip 2 connected and through the driver module 21 is driven; where in the present example the LED light 100 furthermore a data direction assessment and switching module 20th in connection with the driver module 21 wherein the data direction judgment and switching module is in the driver chip 2 is arranged; alternatively, however, it is also conceivable that the data direction assessment and switching module 20th outside of the driver chip 2 is arranged. Of course, it is preferred to use the data direction assessment and switching module 20th with which the driver module 21 connected into the driver chip 2 integrate to the size of the led light 100 further decrease. When the data direction judgment and switching module 20th outside of the driver chip 2 is arranged, its function is realized by an analog circuit, it is advantageous that no changes are made to the driver chip 2 must be made, but that new requirements for the LED light 100 be made, whereby it is necessary to have an analog circuit outside the driver chip 2 to be arranged to realize its function, thereby complicating the structure and the size of the LED lamp 100 can increase.

The data direction assessment and switching module 20th (Data Direction Judgment & Switch Module, DDJSM for short) is with the first signal connection 100a and the second signal terminal 100b connected to data input directions of the first signal connection 100a and the second signal terminal 100b to determine, wherein the signal connection for inputting the data signal and the signal connection for outputting the data signal are automatically switched, the data signal being imported from the signal connection for input and to the driver module 21 is transmitted, with that from the driver module 21 returned data signal is received, and the data signal is output from the signal terminal for data output.

The concrete form used by the data direction judgment and switching module 20th is realized is not particularly limited. It is sufficient if the determination of the direction of the data input, the identification that a data signal is input from which signal connection, the input of the data signal at the identified signal connection for data input, and the output of the data signal after passing through the driver module 21 at the connection for data output in the data direction assessment and switching module 20th are made possible.

As a preferred embodiment, a preferred implementation of the data direction assessment and switching module is provided 20th and the driver module 21 for LED lights 100 , as in 6a shown, with the driver module 21 a data input 212 (Data Input) and a data output 213 (Data Output) which internally includes a logic circuit module 210 and an analog circuit module 211 (Analog Circuit Module) include; wherein the logic circuit module 210 is used to get that from data input 212 receive input data signal, extract a control signal from the data signal and to the analog circuit module 211 to transmit and output the data signal from the data output; where the analog circuit module 211 based on the data signal, a plurality of drive currents corresponding to the number of luminaire crystal plates 1 generated and the corresponding luminaire crystal plates 1 controls, the three light crystal plates 1 are connected by a common cathode.

In this example there are 3 light crystal panels 1 included, namely a blue light crystal plate (B), a green light crystal plate (G) and a red light crystal plate (R).

In this example it is provided that the data direction assessment and switching module 20th a data input circuit, a data output circuit and a watchdog 200 (Watching Dog, WD for short) includes;
wherein the data input circuit comprises two input branches which are connected to the data input 212 are connected, the two input branches each having the first signal connection 100a and the second signal terminal 100b are connected;
wherein the data output circuit comprises two output branches which are connected to the data output, the two output branches to the first signal connection 100a and the second signal terminal 100b each connected;
where the watchdog 200 serves to set an input direction of the data signal in the first signal connection 100a and the second signal terminal 100b to determine, and to control the selection of an input branch in the data input circuit and the selection of an output branch in the data output circuit, so that the data signal is always input from one of the signal connections and output from the other signal connection.

The logic of the switching device mentioned above is that if 0 is entered in the control port or the activation port, the signal cannot be passed, with a signal only being passed if, for example, 1 is entered in the control port or the activation port (also some Switching devices may be provided to pass the signal when entering 0, not to allow the signal to pass when entering 1). For example, the switching device can be a tri-state gate (three state gate). Tri-state means that its output can be the normal high level (logic 1) or low level (logic 0) of a general binary logic circuit and can maintain a specific high impedance (Hi-Z) state. In the high impedance state, the output resistance is large, which corresponds to an open circuit without any logic control function. Each tri-state gate has a control activation terminal (referred to simply as the control terminal in the present example) to control the switching on and off of the gate circuit. The device that can take these three states is called a tri-state gate (or tri-state device). If the control terminal input is valid, the tri-state gate will show a normal output of “0” or “1”; if the control pin input is invalid, the tri-state gate will provide a high resistance output.

It is specifically provided that the data input circuit has a data direction selector 205 comprises, wherein the data direction selector 205 each with the first signal connection 100a , the second signal connection 100b , the watchdog 200 and the data input 212 of the driver module 21 is connected to form two input branches that are connected to the data input 212 of the driver module 21 are connected to switch data signal input terminals in accordance with control signals received from the watchdog 200 are sent, the data signal from the selector to a data input 212 of the driver module 21 is issued. In detail, the input branch, which is the first signal connection 100a with the data direction selector 205 connects, referred to as the first input branch for differentiation; where the input branch that connects the second signal connection 100b with the data direction selector 205 connects, is referred to as the second output branch;
the data output circuit with the data output 213 of the driver module 21 is connected and comprises two output branches, in each of which a switching device is provided, each with the first signal connection 100a and the second signal terminal 100b are connected, the output branch connected to the first signal connection 100a is connected, is referred to as the first output branch for distinction; the input branch connected to the second signal connection 100b is connected, is referred to as the second output branch; the two switching devices always operating in an inverted state; wherein the two switching devices in the present example are each used as a first switching device 207 and a second switching device 209 are designated. Here is the one with the first signal connection 100a connected switching device the first switching device 207 and the one with the second signal connection 100b connected switching device is the second switching device 209 . Since the two switching devices always work in an inverted state, one of the two output branches is always output alternately.

The watchdog 200 is with the data input 212 , the data output 213 and the data direction selector 205 and the switching device at the data output circuit is connected to signals at the data input 212 and the data output 213 to detect and identify the port for inputting the data signal and the port for outputting; and wherein a control signal to the data direction selector 205 and output to the two switching devices at the data output circuit; being an inverter 204 on one of the lines between the two switching devices and the watchdog 200 is arranged.

The arrangement of the input branch and output branch described above is such that data signals are input from an input branch to which one of the connections is connected and are output from an output branch to which the other of the connections is connected. That is, if the data signal is from one with the first signal terminal 100a connected first input branch into the data input 212 of the driver module 21 is fed in, the output data signal is in the data output 213 of the driver module 21 from one to the second signal port 100b connected second output branch output. On the other hand, if the data signal is from the one with the second signal terminal 100b connected second input branch into the data input 212 of the driver module 21 supplied, the output data signal is in the data output 213 of its driver module 21 from one to the first signal port 100a connected first output branch.

In a preferred development it is provided that the data direction selector 205 a first signal port, a second signal port, a data output 213 and comprises a select port;
where the first signal port 100a via a first diode 206 is connected to the first signal port, i.e. the first diode is in the first input branch 206 arranged, the second signal terminal 100b via a second diode 208 is connected to the second signal connection, that is, the second diode is in the second input branch 208 arranged; where the data output 213 with the data input 212 of the driver module 21 connected is;
where the data output of the driver module 21 with the first signal connection 100a by the first switching device 207 and with the second signal connection 100b by the second switching device 209 connected is; that is, the first switching device is at the first output branch 207 intended; wherein the second switching device 209 is arranged on the second output branch;
where the watchdog 200 an input signal acquisition port 203 , an output signal acquisition port 202 and a control port 201 includes;
where the input signal acquisition port 203 with the first signal port of the data direction selector 205 connected is; where the output signal acquisition port 202 with the data output of the driver module 21 connected is; where the control port 201 each with the selection port of the data direction selector 205 , with control connections of the first switching device 207 and the second switching device 209 are connected, at the control port 201 and the control connection of the second switching device 209 an inverter 204 is arranged.

The above inverter 204 is on the second switching device 209 arranged as the Input signal acquisition port 203 is connected to the first input branch, wherein if the input signal acquisition port 203 is connected to the second input branch, an arrangement of the inverter 204 on the first switching device 207 is conceivable. That is, the input signal detection port 203 is with the second signal port of the data direction selector 205 connected; where the output signal acquisition port 202 with the data output of the driver module 21 connected is; where the control port 201 each with the selection port of the data direction selector 205 , with control connections of the first switching device 207 and the second switching device 209 are connected, at the control port 201 and the control connection of the first switching device 207 an inverter 204 is arranged.

The purpose of this design is to make the input and output of the data signal correspond to the following results: when input from the first input branch, the data signal is output from the second output branch; or if the data signal is input from the second input branch, the data signal is output from the first output branch.

To the functional principle of the watchdog 200 To explain in this application, the data signal in this application and the principle of data acquisition on the watchdog are first explained.

As in 7th As shown, the figure is a schematic view of the waveform at the first signal terminal 100a and the second signal terminal 100b represents when no signal is input; being on the first and second signal terminal 100a and 100b Pull-up resistors (not shown) are provided so that at the first and second signal connection 100a and 100b when there is no signal input, high level 1 signals are output.

As in 8th As shown, the figure shows the waveform at the first signal terminal 100a and the second signal terminal 100b when a data signal is input or output. In the field of LED displays, it is common to use data signals with a frequency of 1.6M Hertz (Hz), ie a signal period of T = 625ns (English name: nanosecond). In this waveform diagram, a period always starts at a high level and then ends at a low level, and if the duty cycle within a signal period is, for example, 70% (approximately 438 ns), this means that the signal identified in a signal period is high 1, ie the data of the data bit is 1. If the duty cycle within a signal period is 30% (approx. 187 ns), this means that the signal marked in a signal period has a low level 0, ie the data of the data bit is 0. The data signal is in the data input 212 of the driver module 21 entered in a first-in-first-out queue (English abbreviation: FIFO; English full name: First Input First Output) and moved from the data output 213 postponed issued.

The watchdog 200 however, uses a clock in signal acquisition to acquire a signal, as shown in 8th which is set so that the acquisition frequency is much higher than the frequency of the data signal described above, the acquisition frequency 100MHz being well above the frequency of the data signal, the clock period of the signal acquisition at this point in time being T0 = 10ns, where T = 62, 5T0. That is, the watchdog 200 detected 62.5 times during a signal period of the data signal, with the watchdog 200 captured data will always go to the high level 1 if there is no signal transmission within the first signal connection 100a or the second signal connection 100b is present. When a data signal begins to flow, the watchdog must do so 200 detected detection signal contain a high level part 1 and a low level part 0 in one signal period. Since the input signal capture port 203 and the output signal acquisition port 202 respectively detect inputted data signals and outputted data signals are the input signal detection port 203 and the output signal acquisition port 202 not necessarily the same, as the first-in-first-out queue is used for data transmission. In this way, it is shown that data has already been input once the low level is 0 from the input signal detection port 203 was recorded.

An embodiment of the watchdog is shown in detail 200 as in 10 shown, with the watchdog 200 a signal monitoring module 2001 (Signal Detection Module) and a counter 2002 (Counter) includes;
wherein the signal monitoring module 2001 with the input signal acquisition port 203 and the output signal acquisition port 202 connected and with a monitoring output 2003 is provided; wherein the signal monitoring module makes a logical determination based on the information provided by the input signal detection port 203 and the output signal acquisition port 202 carries out detected signals and a monitoring signal from the monitoring output 2003 issues; the monitoring signal having the low level 0 to the counter 2002 is output to the counter 2002 reset when a certain logic is met; otherwise the monitor signal with the high level 1 to the counter 2002 is output, causing the counter 2002 counts;
being the counter 2002 is to count within a preset time, the output control signal is judged as the high level 1 when the count value reaches or exceeds a predetermined value, and the output control signal is judged as the low level 0 otherwise.

When the counter 2002 during operation of the watchdog 200 is continuously incremented, e.g. if a preset time is 200 µs (microseconds), the counter 2002 incremented to a preset value "a", where if the counter 2002 cumulatively reaches a count of a, the accumulation continues to remain at the count of a, while the control signal of the watchdog 200 is output at the high level 1, and if, however, the value of the counter 2002 is less than a, the control signal of the watchdog becomes 200 (WD) is output at the low level 0.

As in the table of 11 are the logical judgment rules for the signal monitoring module 2001 as follows: the logical assessment rules of the signal monitoring module 2001 are as follows: if the through the input signal detection port 203 and the output signal acquisition port 202 detected signals are not the same through the input signal detection port 203 detected signal has a low level 0 and that through the output signal detection port 202 detected signal has a high level 1, the monitoring output 2003 outputs a monitor signal of low level 0; in the other cases the monitoring output gives 2003 outputs a high level 1 monitor signal.

That is, when the input signal detection port 203 has a value of 0 and the output signal detection port 202 outputs a value of 1, the monitoring output gives 2003 the low level 0 off; where if the input signal acquisition port 203 has a value of 1 and the output signal detection port 202 outputs a value of 1, the monitoring output 2003 outputs the low level 1; where if the input signal acquisition port 203 has a value of 0 and the output signal detection port 202 outputs a value of 0, the monitoring output 2003 outputs the low level 1; where if the input signal acquisition port 203 has a value of 1 and the output signal detection port 202 outputs a value of 0, the monitoring output 2003 outputs the low level 1.

As in 12th shown, the counter counts 2002 always within a preset time, the preset time being greater than a time at which the data signal from the driver module 21 is input and output, ie a number of bits of the data signal, the data signal comprising 48 bits, ie the time from input to output in the driver module 21 is 30 microseconds (µs) in this example, with the preset time being set to 200 microseconds in this example, which is far in excess of the length of the data signal. As apparent from the figure, when the input signal detection port 203 has a value of 0 and the output signal detection port 202 outputs a value of 1, the monitoring output 2003 the low level 0 to the counter 2002 outputs so the counter 2002 is reset and counts again, using the control port 201 outputs a low level 0, at which time a selection port of the data direction selector 205 receives the control signal 0, and the first input branch is switched on and the second input branch is switched off, so that the data signal from the first signal connection 100a is entered; wherein the first switching device 207 is switched off and the first output branch is switched off because the control port 201 a low level to the control terminal of the first switching device 207 issues; where, since the low level coming from the control port 201 was output by inverting the inverter 204 to a high level for output to the second switching device 209 is changed so that the second switching device 209 is switched on, the second output branch is switched on; wherein the data signal from the second signal terminal 100b is issued. That is, the data signal is from a first signal connection 100a entered on the left and from a second signal port 100b issued on the right.

As in 13th is the monitor output port 2003 only continues to be 1 if a condition does not exist within the preset time of 200 microseconds for the input of the input signal detection port 203 than 0 and the output of the output signal detection port 202 is recognized as 1, so the counter 2002 counts continuously, when the preset value a set for this is reached or exceeded, the control port 201 outputs a high level 1. That is, a selection port of the data direction selector 205 receives the control signal 1 and switches the second input branch on, the first input branch being switched off, which causes the data signal from the second signal connection 100b is entered; wherein the first switching device 207 is switched on and the first output branch is switched on because the control port 201 a high level to the control terminal of the first switching device 207 issues; where, since the high level coming from the control port 201 was output by inverting the inverter 204 to a low level for output to the second switching device 209 is changed so that the second switching device 209 is switched off, the second output branch is switched off; wherein the data signal from the first signal terminal 100a is issued. At the same time, the data signal output by the data output is passed through the first switching device 207 , then through the first diode 206 and then through the input signal detection port 203 detected at this time through the input signal detection port 203 and the output signal acquisition port 202 detected signals are always the same, with the output of the control port 201 is held at the high level 1. The data signal is from the second signal terminal 100b entered on the right, and from the first signal port 100a issued on the left.

As another embodiment, another implementation of the data direction judgment and switching module 20th and the driver module 21 for LED lights 100 specified, the data direction assessment and switching module 20th , as in 6b shown, a data input circuit, a data output circuit and a watchdog 200 (Watching Dog, WD for short) also includes;
wherein the data input circuit comprises two input branches which are connected to the data input 212 are connected, the two input branches each having the first signal connection 100a and the second signal terminal 100b are connected;
wherein the data output circuit comprises two output branches which are connected to the data output, the two output branches to the first signal connection 100a and the second signal terminal 100b each connected;
where the watchdog 200 serves to set an input direction of the data signal in the first signal connection 100a and the second signal terminal 100b to determine, and to control the selection of an input branch in the data input circuit and the selection of an output branch in the data output circuit, so that the data signal is always input from one of the signal connections and output from the other signal connection.

The data input circuit comprises a first AND gate 403 , a second AND gate 405 and an OR gate 404 ; where the first signal port 100a via a fourth diode 401 with an input of the first AND gate 403 is connected so that a first input branch is formed; the second signal port 100b via a fifth diode 409 with an input of the second AND gate 405 is connected, whereby a second input branch is formed; where outputs of the first AND gate 403 and the second AND gate 405 with the inputs of the OR gate 404 are connected, the output of the OR gate 404 with the data input 212 connected is.

The data output circuit comprises a first output branch and a second output branch, the first output branch via the third switching device 402 between the first signal port 100a and the data output 213 is switched; the second output branch via the fourth switching device 410 between the second signal connection 100b and the data output 213 is switched.

The watchdog 200 includes a control input 333 and a control output 222 , where the control input 333 with an output of the third AND gate 408 is connected, one input of the third AND gate 408 with the data output 213 is connected and the other input via a second NOT gate 407 with the first signal connection 100a connected is; where the control output 222 with the other input of the second AND gate 405 and the control connection of the third switching device 402 is connected to the other input of the first AND gate 403 and the control connection of the fourth switching device 410 via a first NOT gate 406 connected is.

The data direction assessment and switching module 20th also has the effect that the input and output of the data signal meet the following results: When input from the first input branch, the data signal is output from the second output branch; or if the data signal is input from the second input branch, the data signal is output from the first output branch.

The working process is described as follows: the system is set so that an internal counter of the watchdog 200 is reset to zero when the control input 333 of the watchdog 200 receives an input signal of 1, the output of the control signal 222 is recognized as 0 before the counter does not reach the set value a (200 microseconds reach the set value a if no counting), whereby if the control input 333 receives the input signal as 0, the internal counter of the watchdog 200 continues to count until a value a is reached (ie after 200 microseconds), and the control output 222 outputs the value 1.

After switching on, a counter begins in the watchdog 200 to count before there is still no data signal, whereby, before the counter does not reach the set value a within 200 microseconds, the control output 222 of the watchdog 200 outputs the value 0 after the first NOT gate 406 is set to the value 1. At this time, if there is a data signal from the first signal terminal 100a input, 0-level signals and 1-level signals are safely included, reducing the signal level after passing through the first AND gate 403 always remains identical to the signal level from the first signal connection 100b is entered (since the level from the first NOT gate 406 equals 1), after which the data signal becomes the OR gate 404 run through. The OR gate 404 simultaneously receives a signal from the second AND gate 405 , and the signal of the second AND gate 405 from the fifth diode 409 the high level is 1, the signal from the control output 222 equals 0, that by the second AND gate 405 to the OR gate 404 output signal is determined to be 0, where the signal that is passed through the OR gate 404 will go unchanged into the data input 212 is input, and then from the data output 213 is output, at which time the control signal of the third switch 402 has a level 0 (from the control output 222 ), whereby the control signal is not from the third switching device 402 is output, but only from the fourth switching device 410 is output (the control signal of the fourth switching device 410 is 1 after it is the reverse level of the first NOT gate 406 has gone through).

Will the signal from the first signal port 100a entered permanently, the level contains after passing through the fourth diode 401 always the level signal 0, with the level signal 0 via a second NOT gate 407 becomes the level signal 1, and the third AND gate 408 furthermore the data signal from the data output 213 The data signal, whether signal 1 or signal 0, contains the high level signals of at least 30%, each signal being captured 62.5 times per 625ns under the 100MHz clock condition, and there is sufficient time within 200 microseconds to receive the input signals at the same time to be detected as 1, and the third AND gate 408 gives a level signal 1 to the control input 333 off so that the internal clock of the watchdog 200 resets continuously in 200 microseconds, and the control output 222 constantly outputs the control signal 0, which ensures that data from the first signal terminal 100a input and from the second signal terminal 100b are issued.

If no signal from the first signal port 100a is input, the output of the fourth diode 401 is recognized as 1 after passing the second NOT gate 407 goes to 0 and that after forwarding to the third AND gate 408 to the control input 333 input level signal is 0, the watchdog counter counts 200 continuously up to the value a, the control signal for controlling the output 222 is output as 1, after passing the first NOT gate 406 to the first AND gate 403 and to the fourth switching device 410 output signal is recognized as 0, so the first AND gate 403 always a 0 signal to the OR gate 404 outputs, if a signal at this point in time from the second signal terminal 100b is entered, this via the fifth diode 409 into the second AND gate 405 is entered. Because the signal coming through the control output 222 the second AND gate 405 is fed is 1, the signal from the fifth diode remains 409 after passing the second AND gate 405 equal, with the signal through the OR gate 404 remains the same and to the data input 212 entered and from the data output 213 is issued. As the control signal of the fourth switching device 410 is recognized as 0, it is recognized by the fourth switching device 410 not output, but by the third switching device 402 to the first signal connection 100b output, the signal through the third switching device 402 at the same time also from the fourth diode 401 to the second NOT gate 407 returns and to the third AND gate 408 is output, this being done by the third AND gate 408 received signal is always a state that is opposite to 0 and 1, with the control input 333 receives a signal that is always 0. The control output 222 therefore always keeps the signal at the output as 1, and it is kept that the signal from the second signal connection 100b entered and from the first signal port 100a is issued.

The present example sees an LED light 100 before, in which the two signal connections no longer differentiate between the data directions, but the two signal connections can input and output data signals. Determining a direction of data signals on the first signal terminal 100a and the second signal terminal 100b is made by the data direction assessment and switching module 20th performed, wherein the connection for inputting the data signal and the connection for outputting the data signal are automatically switched over, the data signal being input from the signal connection for data input and to the driver module 21 output from the driver module 21 returned data signal is received, and the data signal is output from the signal terminal for data output. When the LED light in a device such as an LED display screen 1000 is used, it is not necessary to arrange or wire the respective LED lights 100 specially designed, with the LED lights 100 are connected in series between adjacent rows (or between adjacent columns) through the heads or through the hedge, without the alignment of the LED lights 100 between rows (or between columns), avoiding the need for the original wiring to have the winding layout through a head-to-tail connection, adding significant wiring complexity decreased. LED lights 100 there are also no color differences between adjacent rows or columns.

Embodiment 2

In this example, the LED display screen disclosed in the present invention is used 1000 specifically explained. In this example the LED display screen is 1000 using the in 6a shown LED light produced as an example.

As in 14th shown, this example is an LED display screen 1000 provided which comprises an LED array, wherein the LED array comprises the LED lights described in exemplary embodiment 1 100 which are arranged in the same direction in the array.

As in 18th shown the LED display screen 1000 further a data control module 300 (Data Control Module, DCM for short); wherein the data control module 300 a plurality of first and second data ports 300a and 300b provides; being parts of the LED lights 100 the LED array in groups between the first and the second data port 300a and 300b are connected in series. The data signal runs from the first data port 300a into the LED light 100 and to the second data port 300b .

The groups of arrays from the LED lights 100 that is between the first data ports 300a and the second data ports 300b are connected in series, are connected in series in several rows or in several columns, with the LED lights 100 are connected between adjacent rows or between adjacent columns by the heads or by the hedge.

This example uses the LED display screen displayed in an array 1000 all LED lights 100 in a display screen can all be connected in series to form a lighting group, or can be divided into multiple lighting groups formed by connecting the LEDs in series. If they are connected in series, they can be connected in series in rows (or columns), with the example of the series connection in rows preferred that a series connection through the heads or through the hedge between the adjacent rows is preferably enabled in the series connection.

Specifically, the so-called series connection through the heads or through the hedge means: When the LED lights are connected in series 100 in each row there is an LED light at the rear of the row 100 with a rear LED light in the adjacent row 100 connected, or where the front LED light in a row 100 with a front LED light in the adjacent row 100 connected so that the series-connected LED lights 100 in each row form a serpentine shape with a series circuit through the heads and through the hedge. For example, as in 14th shown a specific group of lights within the LED display screen 1000 four rows of LED lights 100 ; being the LED lights 100 are arranged within the lighting group in the same direction, so that the signal port on the left is the first signal connection 100a is; where the signal port on the right is the second signal connection 100b is; it can be seen that in every row with the exception of the head and tail in the adjacent LED lights 100 the first signal connection within the line 100a the following LED light 100 with the second signal connection 100b of the previous LED light 100 connected is. The head and tail of each row use the series connection through the heads or through the hedge, that is, a first signal connection 100a a first LED light 100 (or referred to as the top LED light or the head LED light) in the first row with a first data port 300a of the data control module 300 connected, the LED light 100 at the rear of the first line with the LED light 100 at the stern of the second row is connected, with the LED light 100 at the top of the second line with the LED light 100 connected at the head of the third row, being the LED light 100 at the stern of the third row with the LED light 100 at the stern of the fourth row is connected, with the LED light 100 is connected to the second data interface at the head of the first line.

• Wie in 15 gezeigt, hat, wenn das System eingeschaltet ist, weder der erste Signalanschluss 100a noch der zweite Signalanschluss 100b einen Datensignaleingang, wobei am ersten und zweiten Signalanschluss 100a und 100b aufgrund eines Pull-Up-Widerstands nach dem Einschalten eine hochgezogene Spannung anliegt, wobei es vorgegeben ist, kontinuierlich einen hohen Pegel auszugeben, wobei ein Zähler 2002 des Watchdogs 200 mit dem Betrieb startet, wobei, wenn 200 Mikrosekunden noch nicht erreicht sind, das von dem Steuerport 201 des Watchdogs 200 ausgegebene Steuersignal als 0 erkannt wird.

The working process is described as follows:

• As in 15th shown, when the system is on, neither has the first signal port 100a still the second signal connection 100b a data signal input, wherein the first and second signal connection 100a and 100b due to a pull-up resistor, a pulled-up voltage is applied after switching on, it being specified to continuously output a high level, with a counter 2002 of the watchdog 200 starts operating, if 200 microseconds are not yet reached, that of the control port 201 of the watchdog 200 output control signal is recognized as 0.

As in 16 shown, gives the control port 201 of the watchdog 200 of each LED light turns off the control signal as 1 when the LED display screen is on for more than 200 microseconds and no data signal is input. The data signal is allowed from the second signal port 100b to enter the second input branch, the data signal via the data direction selector 205 into a data input 212 a driver module 21 and then from the data output of the driver module 21 is output, and via the first output branch from the first signal connection 100a is issued. However, no data signal is input at this time.

As in 17th As shown, the system starts sending data signals from the left, and in the state where the signal is input from the left, the input signal is in the input signal detection port 203 must contain a low level 0 signal within 200 microseconds, with the data signal at the output signal acquisition port 202 may well contain a high level signal 1, with a counter 2002 of the watchdog 200 for 200 microseconds continuously remains in the reset state, with a control signal coming from the control port 201 of the watchdog 200 to the data direction selector 205 is output is continuously at a low level 0, the conduction of the signal always from the first signal terminal 100a on the left to the second signal connection 100b on the right is guaranteed. The data direction selector 205 receives a signal 0, the first switching device 207 is turned off and the second switching device 209 is switched on, so that the first input branch and the second output branch form a path, the one from the first signal connection 100a input data signal via the data direction selector 205 into a data input 212 a driver module 21 is input, and then from the data output of the driver module 21 via the second switching device 209 to the second signal connection 100b is output to the next LED light.

For the rightmost LED light 100 In the second line, the signal comes from the rightmost LED light 100 in the first row, the data signal from the second signal terminal 100b to the first signal port 100a so that there are no signals from the first signal port within 200 microseconds 100a may be entered, whereby the watchdog 200 counts continuously in 200 microseconds and with the counter 2002 of the watchdog 200 reached the set value after 200 microseconds, with that from the control port 201 output control signal 201 is output as 1, at which point the data direction selector 205 receives the high level 1 and switches on the second input branch; at the same time the first switching device 207 is switched on, the second switching device 209 is switched off and the first output branch is switched on; so that the data signal from the second signal terminal 100b via the second input branch through the data direction selector 205 to the data input 212 a driver module 21 transmitted and then from the data output 213 is output, and via the first output branch to the first signal connection 100a is directed. At this point in time, the output signal becomes the data output 213 both in the output signal acquisition port 202 entered as well as via the first switching device 207 and the first diode 206 back to the input signal capture port 203 transmitted, the detection signals of the input signal detection port 203 and the output signal detection port 202 always keep the same input signals 0 or 1, at which point the watchdog 200 takes no action at this point, the control port 201 the high level output 1 keeps up. So can always, as long as the signal from the second signal connection 100b is continuous, the signal is continuous to the first signal port 100a be transmitted.

With the LED light 100 the signal from the left is entered on the third line, with the data signal from the leftmost LED light 100 from the leftmost LED light 100 the second line comes. The data signal from the LED light 100 in the third line is in each case from the first signal connection 100a input and from the second signal terminal 100b issued. The input signal at the input signal capture port 203 necessarily comprises a low level signal 0 in 200 microseconds with the data signal at the output signal acquisition port 202 may well contain a high level signal 1, with a counter 2002 of the watchdog 200 remains in the reset state for 200 microseconds with a control signal coming from the control port 201 of the watchdog 200 to the data direction selector 205 is output continuously at a low level 0, the conduction of the signal from the first signal terminal 100a on the left to the second signal connection 100b on the right is guaranteed. The data direction selector 205 receives a signal 0, the first switching device 207 is turned off and the second switching device 209 is switched on, so that the first input branch and the second output branch form a path, the one from the first signal connection 100a input data signal via the data direction selector 205 into a data input 212 a driver module 21 is input, and then from the data output of the driver module 21 via the second switching device 209 to the second signal connection 100b is output to the next LED light.

The direction of signal data transmission and the control logic of the LED light 100 the fourth line are the same as in the second line and are not described again.

In the LED display screen provided by the present example 1000 it is no longer necessary to arrange or wire the individual LED lights 100 specifically to be carried out as the inner array of the LED display screen in the LED lamp improved according to the present invention 100 is arranged with the LED lights connected in series between adjacent rows (or between adjacent columns) through the heads or through the hedge without the alignment of the LED lights 100 between rows (or between columns), avoiding the need for the original wiring to require the winding layout through a head-to-tail connection, greatly reducing wiring complexity. LED lights 100 there are also no color differences between adjacent rows or columns.

Embodiment 3

In the course of development, the applicant has found that with the existing LED display screens 1000 the signal data are always transmitted unidirectionally, whereby the data signal must always originate from the signal input and the signal output; at which point, if any one of the LED lights is defective and the signal is interrupted, the data signal cannot be transmitted further downward, with the defective LED lights 100 and their subsequent normal LED lights 100 cannot work properly.

As in 18th shown even in the LED display screen 1000 of the later embodiment 2, which is improved in this application, the unidirectional transmission is used, but if there is an error of the LED lamp 100 there, this will mean that the data signal can no longer be transmitted. If, for example, an LED light in the middle of the second line is defective and the transmitted data signal on this LED light is interrupted, all other LED lights will be switched off 100 that are connected in series on the left side of this LED light will be interrupted, causing the display to malfunction.

As an improvement, Applicant has the data control module 300 improved, the data control module 300 , as in 19th shown, two physical network connections (PHY1, PHY2), one FPGA 301 and has a memory; where in the present example the memory SDRAM (English name: Synchronous Dynamic Random Access Memory) 302 is.

The FPGA 301 includes a data acquisition and transmission module 3013 (Data Collection & Transmit Module), a first output module 3011 (First Output Module), a second output module 3012 (Second Output Module) and a disconnection monitoring module 3015 (Break-off Monitoring Module);
wherein the data acquisition and transmission module 3013 connected to the two physical network ports and the memory for capturing the data packet and sending the data packet, and for capturing a data signal from the data packet and storing it in the memory; wherein in particular the two physical network connections have a first physical network connection 303 (PHY 1) and a second physical network port 304 (PHY 2) include; the data acquisition and transmission module 3013 receives a data packet from the first physical network port 303 and sends the data packet through the second physical network port 304 . The data signals that the data control module 300 cause to control the corresponding LED array.

The first output module 3011 is configured to retrieve the data signal stored in memory (in 18th and 19th labeled with Datal, Data2 ...) and the data signal via the first data port 300a to the lighting group consisting of the corresponding series-connected LED lights 100 sends; Each of the LED lights 100 receives its corresponding driver signal from it and drives the luminaire crystal plate 1 in every LED luminaire 100 to shine.

The second output module 3012 is configured to use the reverse signal of the data signal stored in memory as a backup signal (denoted by Datal ', Data2' ... in 18th and 19th ) with the backup signal via the second data port 300b to the lighting group consisting of the corresponding series-connected LED lights 100 is sent; that is, the backup signal is from the last LED light 100 vice versa to the first LED light 100 transfer.

A backup switching device 3014 between the second output module 3012 and the second data port 300b is provided, the backup switching device 3014 for switching on and off for the second output module 3012 outwardly sent backup signal is used;
wherein the disconnection monitoring module 3015 each with a control connection of the backup switching device 3014 is connected and to the second data port 300b via the third diode 3016 connected to data of the second Data ports 300b to detect and the backup control signal to the control terminal of the backup switching device 3014 to spend.

• Im Beispiel des Datenrichtungsbeurteilungs- und Schaltmoduls 20 in 6a wird im Normalbetrieb das erste Ausgabemodul 3011 das in dem Speicher gespeicherte Datensignal abrufen und dieses über den ersten Datenport 300a beginnend von dem in der ersten Zeile linken LED-Leuchte 100 an die zwischen dem ersten Datenport 300a und dem zweiten Datenport 300b in Serie geschaltete LED-Leuchte 100 sendet, wobei alle LED-Leuchten 100, die an der linken Seite der ausgefallenen LED-Leuchte vorliegen, von Datensignalen unterbrochen werden, wenn die ausgefallene LED-Leuchte 100 in der zweiten Zeile auftritt, wobei die vom Eingangssignalerfassungsport 203 und vom Ausgangssignalerfassungsport 202 des Watchdogs 200 der LED-Leuchte 100 hinter der ausgefallenen LED-Leuchte 100 erfassten Signale jeweils als 1 erkannt sind. Nachdem dieser Zustand 200 Mikrosekunden andauert, überwacht das Verbindungstrennungsüberwachungsmodul 3015 des Datensteuerungsmoduls 300, dass das von der dritten Diode 3016 am zweiten Datenport 300b eingegebene Datensignal länger als 200 Mikrosekunden unterbrochen ist, wobei zu diesem Zeitpunkt das Verbindungstrennungsüberwachungsmodul 3015 ein Steuersignal abgeben soll, so dass die Backup-Schaltvorrichtung 3014 eingeschaltet ist, so dass ein Backup-Signal Datal' vom Datensteuerungsmodul 300 gesendet wird, daher empfängt die am weitesten links liegende LED-Leuchte in der letzten Zeile das Backup-Signal Datal', wobei die Datenfolge des Backup-Signals Datal' und die Datenfolge des Datensignals Datal im umgekehrten Verhältnis zueinander stehen, damit ist es möglich, ausgehend von der am weitesten links liegenden LED-Leuchte in der letzten Zeile, ein Signal auf die LED-Leuchte auf der linken Seite der beschädigten LED-Leuchte in der zweiten Zeile zu übertragen, und sicherzustellen, dass das Bild mit dem Original übereinstimmt. Dadurch kann das gesamte LED-Array bis auf eine defekte LED-Leuchte funktionsfähig sein.

The working process is described as follows:

• In the example of the data direction assessment and switching module 20th in 6a becomes the first output module in normal operation 3011 retrieve the data signal stored in the memory and this via the first data port 300a starting with the LED light on the left in the first line 100 to the one between the first data port 300a and the second data port 300b LED light connected in series 100 sends, with all LED lights 100 that are present on the left side of the failed LED light are interrupted by data signals when the failed LED light 100 occurs on the second line, the one from the input signal detection port 203 and from the output signal acquisition port 202 of the watchdog 200 the LED light 100 behind the failed LED light 100 detected signals are each recognized as 1. After this state 200 Microseconds lasts, the disconnection monitor module monitors 3015 of the data control module 300 that that from the third diode 3016 at the second data port 300b input data signal is interrupted for more than 200 microseconds, at which point the disconnection monitoring module 3015 should emit a control signal, so that the backup switching device 3014 is switched on so that a backup signal Datal 'from the data control module 300 is sent, therefore the leftmost LED light in the last line receives the backup signal Datal ', whereby the data sequence of the backup signal Datal' and the data sequence of the data signal Datal are in inverse relationship to each other, so it is possible starting from the leftmost LED light in the last line, transmit a signal to the LED light on the left side of the damaged LED light in the second line and ensure that the image matches the original. As a result, the entire LED array can be functional except for a defective LED light.

One or more additional LED lighting groups can also be controlled in the same way and different images of the LED lighting groups can be combined to form an overall image.

In the FPGA 301 of the data control module 300 are a first output module 3011 , a second output module 3012 and a disconnection detector module is provided, the data signal via the first output module 3011 to a lighting group consisting of corresponding LED lights connected in series 100 can be entered in the forward direction, with if an LED light 100 of the series-connected lighting group fails, which causes an interruption, the disconnection monitoring module 3015 the state of the second data port 300b monitor to determine that the data signal was not received; at this point it is the backup switching device 3014 so that it is switched on so that it can be controlled via the second output module 3012 sends the inverted backup signal to the outside. It ensures that the LED light fixture 100 behind the failed LED light 100 continues to work correctly.

The above statements are only preferred exemplary embodiments of the present invention and are not intended to restrict the present invention.

List of reference symbols

1000:

LED display screen

100:

LED light

100a:

First signal connection

100b:

Second signal connection

100c:

First power connection

100d:

Second power connection

1:

Light crystal plate

2:

Driver chip

21:

Driver module

20:

Data direction assessment and switching module

210:

Logic circuit module

211:

Analog circuit module

200:

Watchdog

201:

Control port

202:

Output signal acquisition port

203:

Input signal acquisition port

204:

Inverter

205:

Data direction selector

206:

First diode

207:

First switching device

208:

Second diode

209:

Second switching device

212:

Data input

213:

Data output

2001:

Signal monitoring module

2002:

counter

2003:

Monitoring output

300:

Data control module

300a:

First data port

300b:

Second data port

301:

FPGA

302:

SDRAM

303:

First physical network connection

304:

Second physical network connection

3011:

First output module

3012:

Second output module

3013:

Data acquisition and transmission module

3014:

Backup switching device

3015:

Disconnection monitoring module

3016:

Third diode

401:

Fourth diode

402:

Third switching device

403:

First AND gate

404:

OR gate

405:

Second AND gate

406:

First NOT gate

407:

Second NOT gate

408:

Third AND gate

409:

Fifth diode

410:

Fourth switching device

222:

Control output

333:

Control input

Claims (24)

Driver chip (2), a driver module (21) being provided in the driver chip (2), the driver chip (2) being connected to a signal connection (100a, 100b) and a power connection (100c, 100d); wherein the power connection (100c, 100d) provides power for the driver chip (2); wherein the signal terminal (100a, 100b) is used for inputting and outputting a data signal; characterized in that the signal connection comprises a first signal connection (100a) and a second signal connection (100b); wherein the driver chip (2) additionally comprises a data direction assessment and switching module (20) which is connected to the driver module (21); wherein the data direction assessment and switching module (20) is connected to the first signal connection (100a) and the second signal connection (100b) and is configured to determine an input direction of the data signal at the first signal connection (110a) and at the second signal connection (100b) ; automatically switching the signal terminals (100a, 100b) for inputting and outputting the data signal; importing the data signal via the signal connection (100a, 100b) to be inputted for the data signal and transmitting it to the driver module (21); to receive the data signal returned by the driver module (21) and to output the data signal via the signal connection (100a, 100b) to be outputted. Driver chip (2) Claim 1 , characterized in that the driver module (21) has a data input (212) and a data output (213); wherein the data direction assessment and switching module (20) comprises a data input circuit, a data output circuit and a watchdog (200); wherein the data input circuit comprises two input branches which are connected to the data input (212), the two input branches being respectively connected to the first signal connection (100a) and the second signal connection (100b); wherein the data output circuit comprises two output branches which are connected to the data output (213), the two output branches being connected to the first signal connection (100a) and the second signal connection (213), respectively; wherein the watchdog (200) is set up to determine an input direction of the data signal in the first signal connection (100a) and the second signal connection (100b), and to control the selection of an input branch in the data input circuit and the selection of an output branch in the data output circuit, so that the data signal is always input from one of the signal terminals (100a, 100b) and output from the other signal terminal (100a, 100b). Driver chip (2) Claim 2 , characterized in that the data input circuit comprises a data direction selector (205); wherein the data direction selector (205) is respectively connected to the first signal connection, the second signal connection (100b), the watchdog (200) and the data input (212) of the driver module (21); wherein the data direction selector (205) is connected to the first signal connection (100a) and the second signal connection (100b) to form two input branches, the connection to the signal connections (100a, 100b) for the input of the data signal depending on the of the To switch the watchdog (200) sent control signals, and to select one of the input branches, the data signal being output from the data direction selector (205) to the data input (212) of the driver module (21); wherein the data output circuit is connected to the data output of the driver module (21) and comprises two output branches, in each of which a switching device is provided, each of which is connected to the first signal connection (100a) and the second signal connection (100b), the two switching devices always operate in an inverted state; wherein the watchdog (200) is connected directly or indirectly to the data input (212), the data output (213), the data direction selector (205) and the switching device of the data output circuit in order to detect signals at the data input (212) and the data output, and to identify the signal terminal (100a, 100b) for inputting the data signal and the signal terminal (100a, 100b) for output; and wherein a control signal is output to the data direction selector (205) and to the two switching devices of the data output circuit, an inverter being arranged on one of the lines between the two switching devices and the watchdog (200). Driver chip (2) Claim 3 , characterized in that the data direction selector (205) comprises a first signal port, a second signal port, a data output (213) and a selection port; wherein the first signal terminal (100a) is connected to the first signal port via a first diode (206), the second signal terminal (100b) being connected to the second signal port via a second diode (208); wherein the data output (213) is connected to a data input (212) of the driver module (21); wherein a data output (213) of the driver module (21) is connected to the first signal connection (100a) via the first switching device (207) and is connected to the second signal connection (100b) via the second switching device (209); wherein the watchdog (200) comprises an input signal detection port (203), an output signal detection port (202) and a control port (201); wherein the input signal detection port (203) is connected to the first signal port of the data direction selector (205); wherein the output signal acquisition port (202) is connected to the data output (213) of the driver module (21); wherein the control port is connected to the selection port of the data direction selector (205), to control connections of the first switching device and the second switching device, an inverter being arranged at the control port and the control connection of the second switching device; or wherein the input signal detection port (203) is connected to the second signal port of the data direction selector (205); wherein the output signal acquisition port (202) is connected to the data output (213) of the driver module (21); wherein the control port (201) is connected to the selection port of the data direction selector (205), to control connections of the first switching device (207) and the second switching device (209), wherein the control port (201) and the control connection of the first switching device (207) an inverter (204) is arranged. Driver chip (2) Claim 4 , characterized in that the watchdog (200) comprises a signal monitoring module (2001) and a counter (2002); wherein the signal monitoring module (2001) is connected to the input signal detection port (203) and the output signal detection port (202) and is provided with a monitoring output (2003); wherein the signal monitoring module (2001) makes a logical determination based on the signals detected by the input signal detection port (203) and the output signal detection port (202) and outputs a monitoring signal from the monitoring output (2003); wherein the monitoring signal with the low level is output in the form of a zero to the counter (2002) in order to reset the counter (2002) when a certain logic is satisfied; otherwise, the high level monitor signal is outputted in the form of a one to the counter (2002), whereby the counter (2002) counts; wherein the counter (2002) is arranged to count within a preset time, the output control signal being judged to be the high level when the count value reaches or exceed a predetermined value, and otherwise the output control signal is judged to be the low level. Driver chip (2) Claim 5 , characterized in that the logical judgment rules of the signal monitoring module (2001) are as follows: when the signals detected by the input signal detection port (203) and the output signal detection port (202) are not the same and the signal detected by the input signal detection port (203) is the low level and the signal detected by the output signal detection port (202) has the high level, the monitor output (2003) outputs a monitor signal of the low level; in the remaining cases the monitoring output (2003) outputs a monitoring signal with a high level. Driver chip (2) Claim 6 characterized in that the frequency of the signal detected by the signal monitoring module (2001) is much greater than the frequency of the data signal; the data signal using a first-in First-out rule is input and output from the driver module (21); wherein the preset time is greater than a time at which the data signal is input and output from the driver module (21). Driver chip (2) Claim 1 , characterized in that the driver module (21) comprises a logic circuit module (210) and an analog analog circuit module (211); wherein the logic circuit module (210) is used to receive the data signal input from the data input (212), extract a control signal from the data signal and transmit it to the analog circuit module (211) and output the data signal from the data output (213); wherein the analog circuit module (211) generates a plurality of driver signals corresponding to the number of light crystal plates (1) based on the data signal and controls the corresponding light crystal plates (1). Driver chip (2) Claim 2 characterized in that the data input circuit comprises a first AND gate (403), a second AND gate (405) and an OR gate (404); wherein the first signal connection (100a) is connected to an input of the first AND gate (403) via a fourth diode (401), whereby a first input branch is formed; wherein the second signal connection (100b) is connected to an input of the second AND gate (405) via a fifth diode (409), whereby a second input branch is formed; wherein the outputs of the first AND gate (403) and the second AND gate (405) are connected to the inputs of the OR gate (404), an output of the OR gate (404) being connected to the data input (212) is; wherein the data output circuit comprises a first output branch and a second output branch, the first output branch being connected via a third switching device (402) between the first signal connection (100a) and the data output (213); wherein the second output branch is connected via a fourth switching device (410) between the second signal connection (100b) and the data output (213); wherein the watchdog (200) comprises a control input (333) and a control output (222), the control input (333) being connected to an output of a third AND gate (408), an input of the third AND gate (408) is connected to the data output (213) and the other input is connected to the first signal connection (100a) via a second NOT gate (407); wherein the control output (222) is connected to the other input of the second AND gate (405) and the control connection of the third switching device and to the other input of the first AND gate (403) and the control connection of the fourth switching device (410) via a first NOT gate (406) is connected. LED light (100) with a driver chip (2), a light crystal plate (1), a signal connection and a power connection, a driver module (21) being provided in the driver chip (2); wherein the power connection (100c, 100d) provides the power for the circuit in the LED light (100); wherein the signal terminal (100a, 100b) is used for inputting and outputting a data signal; wherein the lamp crystal plate (1) is connected to the driver chip (2) and is driven by the driver module (21); characterized in that the signal connection comprises a first signal connection (100a) and a second signal connection (100b); wherein the LED light (100) further comprises a data direction assessment and switching module (20) in connection with the driver module (21), wherein the data direction assessment and switching module is arranged in the driver chip (2) or outside the driver chip (2); wherein the data direction assessment and switching module (20) is connected to the first signal connection (100a) and the second signal connection (100b) in order to determine an input direction of a data signal at the first signal connection (100a) and the second signal connection (100b), wherein the The signal connection (100a, 100b) for the input of the data signal and the signal connection (100a, 100b) for the output of the data signal are automatically switched over, the data signal being imported from the signal connection (100a, 100b) for the input and to the driver module (21) is transmitted, the data signal returned by the driver module (21) being received, and the data signal being output from the signal connection (100a, 100b) for data output. LED light (100) Claim 10 , characterized in that the data direction assessment and switching module (20) is provided in the driver chip (2). LED light (100) Claim 11 , characterized in that the driver module (21) has a data input (212) and a data output (213); wherein the data direction assessment and switching module (20) comprises a data input circuit, a data output circuit and a watchdog (200); wherein the data input circuit comprises two input branches which are connected to the data input (212), the two input branches being respectively connected to the first signal connection (100a) and the second signal connection (100b); wherein the data output circuit comprises two output branches which are connected to the data output (213) are connected, wherein the two output branches are each connected to the first signal connection (100a) and the second signal connection (100b); wherein the watchdog (200) is set up to determine an input direction of the data signal in the first signal connection (100a) and the second signal connection (100b), and to control the selection of an input branch in the data input circuit and the selection of an output branch in the data output circuit, so that the data signal is always input from one of the signal terminals (100a, 100b) and output from the other signal terminal (100a, 100b). LED light (100) Claim 12 , characterized in that the data input circuit comprises a data direction selector (205); wherein the data direction selector (205) is respectively connected to the first signal connection, the second signal connection (100b), the watchdog (200) and the data input (212) of the driver module (21); wherein the data direction selector (205) is connected to the first signal connection (100a) and the second signal connection (100b) to form two input branches and the connection to the signal connections (100a, 100b) for the input of the data signal depending on the of the To switch control signals sent to the watchdog (200) in order to select one of the input branches, the data signal being output from the data direction selector (205) to the data input (212) of the driver module (21); wherein the data output circuit is connected to the data output (213) of the driver module (21) and comprises two output branches, in each of which a switching device is provided, each of which is connected to the first signal connection (100a) and the second signal connection (100b), the both switching devices always work in an inverted state; wherein the watchdog (200) is connected directly or indirectly to the data input, the data output (213) and the data direction selector (205) and the switching device of the data output circuit in order to detect signals at the data input (212) and the data output (213), and to identify the signal terminal (100a, 100b) for inputting the data signal and the signal terminal (100a, 100b) for output; and wherein a control signal is output to the data direction selector (205) and to the two switching devices of the data output circuit, an inverter (204) being arranged on one of the lines between the two switching devices and the watchdog (200). LED light (100) Claim 13 , characterized in that the data direction selector (205) comprises a first signal port, a second signal port, a data output (213) and a selection port; wherein the first signal terminal (100a) is connected to the first signal port via a first diode (206), the second signal terminal (100b) being connected to the second signal port via a second diode (208); wherein the data output (213) is connected to a data input (212) of the driver module (21); wherein a data output (213) of the driver module (21) is connected to the first signal connection (100a) via the first switching device, and is connected to the second signal connection (100b) via the second switching device (209); wherein the watchdog (200) comprises an input signal detection port (203), an output signal detection port (202) and a control port (201); wherein the input signal detection port (203) is connected to the first signal port of the data direction selector (205); wherein the output signal acquisition port (202) is connected to the data output (213) of the driver module (21); wherein the control port (201) is connected to the selection port of the data direction selector (205), to control connections of the first switching device (207) and the second switching device (209), wherein the control port (201) and the control connection of the second switching device (209) an inverter (204) is arranged; or wherein the input signal detection port (203) is connected to the second signal port of the data direction selector (205); wherein the output signal acquisition port (202) is connected to the data output (213) of the driver module (21); wherein the control port (201) is connected to the selection port of the data direction selector (205), to control connections of the first switching device (207) and the second switching device (209), wherein the control port (201) and the control connection of the first switching device (207) an inverter (204) is arranged. LED light (100) Claim 14 , characterized in that the watchdog (200) comprises a signal monitoring module (2001) and a counter (2002); wherein the signal monitoring module (2001) is connected to the input signal detection port (203) and the output signal detection port (202) and is provided with a monitoring output (2003); wherein the signal monitoring module (2001) makes a logical determination based on the signals detected by the input signal detection port (203) and the output signal detection port (202) and outputs a monitoring signal through the monitoring output (2003); wherein the monitoring signal with the low level is outputted to the counter (2002) to reset the counter (2002) when a certain logic is satisfied; otherwise the monitoring signal is outputted to the counter (2002) at the high level, whereby the counter (2002) counts; wherein the counter (2002) is arranged to count within a preset time, the output control signal being judged to be the high level when the count value reaches or exceed a predetermined value, and otherwise the output control signal is judged to be the low level. LED light (100) Claim 15 , characterized in that the logical judgment rules of the signal monitoring module (2001) are as follows: when the signals detected by the input signal detection port (203) and the output signal detection port (202) are not the same and the signal detected by the input signal detection port (203) is the low level and the signal detected by the output signal detection port (202) has a high level, the monitor output (2003) outputs a monitor signal of the low level; in the remaining cases the monitoring output (2003) outputs a monitoring signal with a high level. LED light (100) Claim 16 characterized in that the frequency of the signal detected by the signal monitoring module (2001) is much greater than the frequency of the data signal; wherein the data signal is input and output from the driver module (21) using a first-in-first-out rule; wherein the preset time is greater than a time at which the data signal is input and output from the driver module (21). LED light (100) Claim 10 , characterized in that the driver module (21) comprises a logic circuit module (210) and an analog analog circuit module (211); wherein the logic circuit module (210) is set up to receive the data signal input from the data input (212), to extract a control signal from the data signal and to transmit it to the analog circuit module (211) and to output the data signal from the data output (213); wherein the analog circuit module (211) generates a plurality of driver signals corresponding to the number of light crystal plates (1) based on the data signal and controls the corresponding light crystal plates (1). LED light (100) Claim 12 characterized in that the data input circuit comprises a first AND gate (403), a second AND gate (405) and an OR gate (404); wherein the first signal connection (100a) is connected to an input of the first AND gate (403) via a fourth diode (401), whereby a first input branch is formed; wherein the second signal connection (100b) is connected to an input of the second AND gate (405) via a fifth diode (409), whereby a second input branch is formed; wherein the outputs of the first AND gate (403) and the second AND gate (405) are connected to the inputs of the OR gate (404), an output of the OR gate (404) being connected to the data input (212) is; wherein the data output circuit comprises a first output branch and a second output branch, the first output branch being connected via the third switching device (402) between the first signal connection (100a) and the data output (213); wherein the second output branch is connected via the fourth switching device (410) between the second signal connection (100b) and the data output (213); wherein the watchdog (200) comprises a control input (333) and a control output (222), the control input (333) being connected to an output of a third AND gate (408), an input of the third AND gate (408) is connected to the data output (213) and the other input is connected to the first signal connection (100a) via a second NOT gate (407); wherein the control output (222) is connected to the other input of the second AND gate (405) and the control connection of the third switching device (402) and to the other input of the first AND gate (403) and the control connection of the fourth switching device (410 ) is connected via a first NOT gate (406). An LED display screen (1000) comprising the LED light (100) according to any one of Claims 10 to 19th . LED display screen (1000) after Claim 20 , characterized in that the LED lights (100) form LED arrays, the LED arrays being arranged in the same direction in an array. LED display screen (1000) after Claim 21 , additionally comprising a data control module (300); wherein the data control module (300) is provided with a plurality of first data ports (300a) and second data ports (300b); wherein some of the LED lights of the LED array are connected in series between the first data ports (300a) and the second data ports (300b). LED display screen (1000) after Claim 22 , characterized in that the arrays of the LED lights (100) which are connected in series between the first data ports (300a) and the second data ports (300b) are connected in series in several rows or in several columns, the LED -Lights (100) between adjacent rows or connected between adjacent crevices by their heads or by their hedge. LED display screen (1000) after Claim 23 , characterized in that the data control module (300) comprises two physical network connections (303, 304), an FPGA (301) and a memory; wherein the FPGA (301) comprises a data acquisition and transmission module (3013), a first output module (3011), a second output module (3012) and a disconnection monitoring module (3015); wherein the data acquisition and transmission module (3013) is connected to the two physical network ports (303, 304) and the memory for acquiring and transmitting a data packet and for acquiring a data signal from the data packet and storing it in the memory; wherein the first output module (3011) is set up to call up the data signal stored in the memory and to send this via a first data port (300a) to the respective series-connected LED lamp (100); the second output module (3012) being set up to inversely call up the data signal stored in the memory as a backup signal, the backup signal being sent via a second data port (300b) to a corresponding series-connected LED light (100) ; wherein a backup switching device (3014) is provided between the second output module (3012) and the second data port (300b), wherein the backup switching device (3014) for switching on and off for the backup sent by the second output module (3012) to the outside. Signal is used; wherein the disconnection monitoring module (3015) is connected to a control connection of the backup switching device (3014) and is connected to a second data port (300b) via the third diode (3016) in order to detect data from the second data port (300b) and the backup Output control signal to the control connection of the backup switching device (3014).

Images