DE19937169A1 - Control procedure for current converter to generate sinusoidal voltage for symmetrical three phase voltage system, involves reading out switching angle independently of three phases - Google Patents

Abstract

The control procedure involves using a modulator (1) with a continuous time base provided for the control. At least one parameter value is filed in a table to which at least one predetermined switching angle for the main frequency of the three phase system is assigned. The switching angle is read out independently of the three phases of the three phase system. From at least one switching angle read out, a relative switching time (5) is determined. This is independent of the three phases of the three phase voltage system, between two directly adjacent switching processes. Independent claims are included for a device for processing the method.

Description

Technical field

The invention relates to the field of power electronics. It starts from one Control method for a converter for generating a sinusoidal voltage for a symmetrical three-phase voltage system and a device for performing the Method according to the preamble of the independent claims.

State of the art

For the supply of, for example, electrical traction machines, especially for Bahnan drives, the traction machines are powered by a power converter. This converter usually obtains its energy from a DC voltage on the DC side  DC link and feeds a three-phase electrical machine on its three-phase side, which can be designed as a synchronous machine or as an asynchronous machine. Other An Applications of converters for a three-phase voltage system can be found, for example in reactive power compensators, stabilizers, aircraft electrical systems and electric railways.

To control the usually in the converter for a symmetrical three-phase chip semiconductor system switch used a switching signal of a Mo dulator generated, which is fed to a driver stage, the ignition pulses for the one individual semiconductor power switch generated, which then corresponds to an intermediate circuit voltage switch according to the ignition pulses. A pulse pattern and a switching signal determined from it for a three-phase converter is described in "Control procedure for self-commutated converters, Jenni / Wüest, Teubner Verlag 1995, pp. 168 ff. "The specified pulse pattern is based on selective elimination of unwanted harmonics in the switching radio tion of the phases R, S, T by suitable selection of a switching number q, which is the number of Switching cycles per basic frequency is defined. Depending on the choice of this switching number q can be odd harmonics (S., 7., 11.,....) regarding a fundamental oscillation in the switching radio suppression, with the 3rd harmonic and multiples thereof in the switching function anyway because of the symmetrical three-phase voltage system. Will at for example, the switching number q = 7 selected, so the 5th and 7th harmonics can be suppressed and the lowest remaining harmonic is the 11th harmonic with respect to Fundamental vibration.

The pulse pattern is pre-calculated for different parameters, in particular for different degrees of modulation. This precalculated pulse pattern is determined by switching angle α _n , n = 1, 2, 3.. , and associated switching states s (α _n ), n = 1, 2, 3.. , certainly. The switching angle α _n and the associated switching states s (α _n ) are stored in a table as a function of certain parameters, for example as a function of a specific degree of modulation. In converter operation, the pulse pattern stored in the table is then output by the modulator in accordance with a specific parameter in such a way that switching times are calculated from the switching angles α _n with respect to a time base, which times the output time or the switching time of the associated switching states s (α _n ) be agree. This creates a switching function in the modulator. This switching function represents a switching signal with respect to the time base, which is supplied to the driver stage for the semiconductor power switch, which generates the said ignition pulses for the semiconductor power switch.

In the case of a converter for a three-phase voltage system, in the case of a symmetrical three-phase voltage system, the pulse patterns stored in the table are determined by the switching angle α _n and the associated switching states s (α _n ), for all three phases R, S, T, but the assignment of the switching angles is the same α _n and the associated switching states s (α _n ) be different with respect to the phases R, S, T. For each phase R, S, T, a complete pulse pattern with the respective switching angles α _n and the associated switching states s (α _n ) must be stored in the table. This requires a correspondingly large table and the corresponding storage space in the hardware used for the stored sizes. In addition, the switching angle α _n must be read out separately for each phase R, S, T by a computing unit and each switching function for each phase R, S, T must be determined separately by calculating the switching times. This requires a considerable amount of computing power in the hardware, consumes an unnecessarily large amount of computing time and requires a considerable amount of storage space, which overall is very cost-intensive.

Presentation of the invention

It is therefore the object of the invention to provide a control method for a converter Generation of a sinusoidal voltage for a symmetrical three-phase voltage system stem to specify which is a complex readout and calculation of switching times for loading tuning of a respective switching signal individually for each phase of the symmetrical three-phase voltage system avoids, and specify a device with which the method is carried out. This object is achieved through the features of the independent claims solved. Further advantageous embodiments of the invention are set out in the subclaims given.

In the method according to the invention, a table is stored in a table memory designed switching angle regardless of the three phases of a three-phase voltage system read and from at least one read switching angle one of the three phases of the Three-phase voltage system independent relative switching time between two immediately successive switching operations determined. This is advantageous for a complex Each phase of reading out the switching angle is avoided. In addition, the switching angles assigned to a specific parameter value are already phase-independent beforehand are stored in the table, so that it is extremely advantageous to place the Switching angle in the table for each of the three phases can be omitted.

Furthermore, by adding the determined relative switching time and a stored, immediately preceding absolute switching time with respect to a continuous time base calculates a current absolute switching time with respect to the time base. By calculating the current absolute switching times are individual calculations of switching times for each phase avoided because only one current switching time is calculated. This can be advantageous Computing time can be saved. The current absolute switching time becomes by comparison with the time base if there is a substantial match, a current logical switching state worth educated. The formation of this switching state value saves additional computing time because this does not have to be calculated explicitly or read from a table, but only based on a very simple comparison of the current absolute switching time with the time base is formed. In addition, by assigning the current logical switching state  values for one of the three phases generates a current logical phase switching state value. According to the invention, this phase assignment takes place with respect to a phase-assigned part a generated fixed sequence of the relative switching times. The phase switching state value becomes output as a phase-related switching signal. The phase assignment of the logi the switching state value for generating the current logical phase switching state values and its output as a time switching signal has the advantage that the usual very great computational effort to generate switching signals for each phase individually falls.

The device for carrying out the method has a modulator that has a first Computing unit, which is advantageous for determining a desired relative switching time reads the switching angle from a table memory independent of the phase and a ge desired fixed sequence of the relative switching times generated. Furthermore, the first re Chen unit according to the invention connected to a second computing unit, the second Computing unit determines the current absolute switching time. The second arithmetic unit is further with a time comparator unit to form a current logical switching state value connected, which in turn is connected to an assignment unit that the Erzeu a current logical phase switching state value and the output of the phases switching state value serves as a temporal switching signal. With the help of the first and second Computing unit, the time comparator unit and the assignment unit becomes a special one simply designed and therefore inexpensive device for carrying out the control Method for a converter for generating a sinusoidal voltage for a sym metric three-phase voltage system achieved.  

Brief description of the drawings

The invention is explained below using an exemplary embodiment in connection with the drawing explained in more detail.

Show it

Fig. 1 shows an embodiment of an apparatus for performing a Ansteuerver method for a converter for generating a sinusoidal voltage for a symmetrical three-phase voltage system and

Fig. 2 switching waveforms of the phases R, S, T of a symmetrical three-phase voltage system for a switching number q = 7 per fundamental.

The reference symbols used in the drawing and their meaning are in the reference List of characters summarized. Basically, the same parts are in the figures provided with the same reference numerals.

Ways of Carrying Out the Invention

In Fig. 1 an inventive embodiment of a device for imple tion of the drive method for a power converter for generating a sinusoidal voltage for a symmetrical three-phase voltage system shown. A modulator 1 is provided therein, which has a common table memory 2 (TM) in which at least one parameter value, for example a degree of modulation, is stored in a table (not shown). At least one precalculated switching angle 3 (α _n ) for the fundamental frequency (f _g ) of the three-phase voltage system (R, S, T) is assigned to this parameter value in the table, n being a consecutive integer. According to the Schaltwin angle 3 (α _n ) is read independently of the three phases (R, S, T) of the three-phase voltage system. For this purpose, the modulator 1 has a first computing unit 4 (CU1) which is connected to the table memory 2 (TM) and reads the switching angle 3 (α _n ) from the table independently of the phase. This advantageously avoids complex reading of the switching angle 3 (α _n ) individually for each phase. In addition, the switching angle 3 (α _n ) assigned to a certain parameter value can be stored in the table independently of the phase beforehand, so that the switching angle 3 (α _n ) is stored individually in the table for each of the three phases (R, S, T) can be dispensed with. From at least one read switching angle 3 (α _n ) in the first arithmetic unit 4 (CU1) one of the three phases (R, S, T) independent switching time 5 (t _rel ) between two immediately successive switching operations is determined. The determined switching time 5 (t _rel ) is thus referred to as the length of time from one switching action to the next. In FIG. 2, curves are time-dependent switching signals 12, 13, 14 (U _r (t), u _S (t), u _T (t)) of the phases R, S, T of a symmetrical three-phase voltage system for a shift number q = 7 is shown, where the switching number q is defined as the number of switching cycles per fundamental frequency of the fundamental frequency (f _g ). A switching cycle always has an "on" and an "off" switching action, so that a switching cycle comprises 2 switching actions. The generation of these switching signals 12 , 13 , 14 (u _R (t), u _S (t), u _T (t)), which are used to control a converter, not shown, are described below.

In Fig. 2 is an example of a determination of the relative switching time S (t _rel) for the phase R of a symmetrical three-phase voltage system for a switch number q illustrated = 7 per fundamental oscillation. For this purpose, two read switching angles (α ₁ , α ₂ ) are selected which, since they are related to the fundamental frequency (f _g ) of the three-phase voltage system, are seen as two time values. The relative time shift (t _rel) is shown in FIG. 2 by a subtraction of the two switching angles (α _1, α ₁₎ representing the time between 2 switching actions determined. Phase R was chosen in FIG. 2 for the sake of clarity. The relative switching time 5 (t _rel ) can also be determined very easily from another phase in the same way. A phase-independent determination of the relative switching time (t _rel ) between two switching actions that are directly successive is thus possible. Further relative switching times 5 (t _rel ) are determined from the read switching angles 3 (α _n ) in the same manner described above.

The relative switching time 5 (t _rel ) is based on its determination from at least one read switching angle 3 (α _n ), which is based on the fundamental frequency (f _g ), also on the fundamental frequency (f _g ). In the event that the determined switching time 5 (t _rel ) is to be related to any frequency (f), the relative switching time 5 (t _rel ) is adjusted by a multiplicative factor 19 (r) according to the following equation: r = f _g / f, where f _{g is} the fundamental frequency and f is the arbitrary frequency. According to Fig. 1 is seen to a Faktorisierer 20 (F) provided that provides a factor of 19 (r) and connected for adjusting the relative time 5 (t _rel) to the desired frequency (f) with the first arithmetic unit 4 (CU1) is. The arbitrary frequency (f) can be specified in the factorizer 20 (F). This makes it very easy to adapt the relative switching times 5 (t _rel ) to any frequency (f), so that only switching angles 3 (α _n ) from which the relative switching times 5 (t _rel ) are determined, with regard to the fundamental frequency (f _g ) of the three-phase voltage system must be stored in the table of table memory 2 (TM).

In the first arithmetic unit 4 (CU1), a fixed sequence 16 of the relative switching times 5 (t _rel ) is also generated. In Fig. 2 is a solid generated sequence 16 is illustrated by way of example, which is as follows. , .t _rel1 , t _rel1 , t _rel2 , t _rel3 , t _rel4 , t _rel3 , t _rel1 , t _rel1 , t _rel2 , t _rel3 , t _rel4 , t _rel3 , t _rel2,. , It consists of the specified four relative switching times (t _rel1 , t _rel2 , t _rel3 , t _rel4 ) for the number of operations q = 7, which are arranged repetitively in the manner shown and thus form the sequence 16 . It is understood that any fixed sequence 16 can be generated from these relative switching times 5 (t _rel ), the number of relative switching times 5 (t _rel ), here four in number for a switching number q = 7, with the switching number q varies. Part of the generated sequence is assigned to one of the phases (R, S, T), with a change in the assignment of the phases (R, S, T) being carried out with at least one fixed relative switching time 5 (t _rel ). According to FIG. 2, such a phase change always takes place at the specified relative switching time t _rel2 , so that the following assignment of the parts of the sequence 16 to the phases (R, S, T) occurs:

According to FIG. 1, the sequence of the first arithmetic unit 4 (CU1) 16 of the relative switching times 5 (t _rel) an allocation unit 11 (AU) is supplied, for which purpose unit, the first rake 4 (CU1) having a first input of the association unit 11 ( AU) is connected. The determined relative switching time 5 (t _rel ) is fed to a second computing unit 18 (CU2) according to FIG. 1, which is connected to the first computing unit 4 (CU1). Furthermore, the second arithmetic unit 18 (CU2) is connected to a continuous time base 17 (TB). In the second arithmetic unit 18 (CU2), by adding the relative switching time S (t _rel ) and a stored, immediately preceding switching time 6 (t _vabs ) relative to the time base 17 (TB), a current absolute switching time 8 (t _aabs ) is obtained the time base 17 (TB) is calculated. This current absolute switching time 8 (t _aabs ) is present at the output of the second computing unit 18 (CU2). In FIG. 2, the calculation of the current absolute switching time is by way of example 8 (t _{a abs)} by adding the relative time 5 (t _rel1) and the immediately preceding absolute switching time 6 (t _vabs) shown with the presentation of the calculation in Fig. 2 of For clarity is shown in phase R. As shown in FIG. 1, a time storage unit 7 (M) is connected at its input to the output of the second arithmetic unit 18 (CU2), so that the current absolute switching time 8 (t _{a abs)} of the time storage unit 7 (M) is supplied. The time storage unit 7 (M) serves to _store the current absolute switching time 8 (t _aabs ) for an immediately following switching operation as the immediately preceding absolute switching time 6 (t _vabs ). This immediately preceding absolute switching time 6 (t _vabs ) is then read out from the time storage unit 7 (M) for the immediately following switching operation and fed to the second computing unit 18 (CU2), so that the current absolute switching time 8 (t _aabs ) is _{recalculated.} can be done. 1 For this purpose, according to FIG. The output of the time storage unit 7 (M) integral with an input of the second Rechenein 18 (CU2) is connected.

By calculating the current absolute switching time 8 (t _aabs ), individual calculations of switching times for each phase (R, S, T) are deliberately avoided, since only one current switching time is calculated. This advantageously saves computing time.

The calculated current absolute switching time 8 (t _aabs ) is fed to a time comparing unit 9 according to FIG. 1. For this purpose, the second arithmetic unit 18 (CU2) has its output connected to a first input of the time comparator unit 9 . In addition, a second input of the time comparator unit 9 is connected to the time base 17 (TB). The current absolute switching time 8 (t _aabs ) is compared in the time _{comparator unit} 9 with the time base 17 (TB), wherein if the time base 17 (TB) substantially matches the current absolute switching time 8 (t _aabs ), a current logical switching state _value 10 (see _a ) is formed. The formation of the current logical switching state value 10 (s _a ) saves further computing time, since the current logical switching state value 10 (s _a ) does not have to be calculated explicitly or read from a table, but only on the basis of a very simple comparison of the current absolute switching time 8 (t _aabs ) is formed with the continuous time base 17 (TB).

The logical switching state value 10 (s _a) formed by the time comparison unit 9 is supplied to the aforementioned allocation unit 11 (AU), for which purpose the time comparison unit 9 to a second input of the assignment unit 11 (AU) is connected. As already mentioned, the first computing unit 4 (CU1) is connected to the first input of the allocation unit 11 (AU) for supplying the sequence 16 of the relative switching times 5 (t _rel ). In the allocation unit 11 (AU) of the current switch logic state value 10 (s _a) is one of the three phases (R, S, T) of the Dreiphasenspannungssy stems a current logical phase shifting state value (s _{ph, a)} generated by mapping. This assignment of the current switching state value 10 (s _a) takes place according to the invention with respect to the phase assigned to part of the sequence 16 of the relative switching times S (t _rel). In Fig. 2, a current logical phase switching state value (s _{ph, a} ) is shown as an example for phase R. The value of the current logical phase switching state value (s _{ph, a} ) is logically "0" in the case shown. It is formed by negating the value of an immediately preceding phase switching state value (s _{ph, v} ) assigned to the same phase (R, S, T). According to FIG. 2 is a valence of the current logical phase shifting state value (s _{ph, a)} immediately preceding, associated with the R phase phase shifting state value (s _{ph, v)} logic "1" and thus it is the valence of the current logical phase shifting state value (S _{ph, a} ) for phase R, as already mentioned, determined to be logic "0". In the same way, the significance of the respective current logical phase switching state value (s _{ph, a} ) for the phases S and T is determined. According to FIG. 1, the current logical phase switching state value (s _{ph, a} ) is phase-assigned by the assignment unit 11 (AU . ) As a switching signal 12 , 13 , 14 (u _R (t), u _S (t), u _T (t)) ) output and transmitted to a driver stage 15 (GDU) for semiconductor power switches. For this purpose, the assignment unit 11 (AU) for each switching signal 12 , 13 , 14 (u _R (t), u _S (t), u _T (t)) of the phases R, S, T comprises an output, the output is connected to driver stage 15 (GDU) for semiconductor power switches. The ge switching signal 12 , 13 , 14 (u _R (t), u _S (t), u _T (t)) of the phases R, S, T thus serves the converter, not shown, via the driver stage 15 (GDU) head for. As already mentioned, such a course of the temporal switching signal 12 , 13 , 14 (u _R (t), u _S (t), u _T (t)) of the phases R, S, T is shown in FIG. 2.

According to the invention, the modulator 1 is implemented in a digital signal processor (not shown), so that it is advantageously possible to dispense with discrete and therefore expensive components and to adapt the device to converters of various applications, in particular to the driver stage 15 (GDU), and is thus carried out simply can be.

It goes without saying that circuits other than those specified in the exemplary embodiment, Si signals and frequencies can be used.  

Reference list

1

modulator

2nd

Table storage

3rd

Switching angle

4th

first arithmetic unit

5

relative switching time

6

preceding absolute switching time

7

Time storage unit

8th

current absolute switching time

9

Time comparator unit

10th

Logical current switching status value

11

Allocation unit

12th

,

13

,

14

Switching signals of the phases R, S, T

15

Driver stage for semiconductor circuit breakers

16

Sequence of the relative switching times

17th

Time base

18th

second arithmetic unit

19th

multiplicative factor

20th

Factorizer

Claims (19)

1. Control method for a converter for generating a sinusoidal voltage for a symmetrical three-phase voltage system (R, S, T), wherein a modulator ( 1 ) with a continuous time base ( 17 ) (TB) is provided for control, in which in a table at least a parameter value is stored, to which at least one precalculated switching angle ( 3 ) (α _n ) for the fundamental frequency (f _g ) of the three-phase voltage system (R, S, T) is assigned, where n is a consecutive integer, characterized in that the switching angle (3) (α _n) of the three phases power system is read out independently of the three phases (R, S, T) and that angle of at least one read-out circuit (3) (α _n) a, of the three phases (R, S T) of the three-phase voltage system, an independent relative switching time ( 5 ) (t _rel ) is determined between two immediately subsequent switching operations. 2. The method according to claim 1, characterized in that the relative switching time ( 5 ) (t _rel ) is adapted by a multiplicative factor ( 19 ) (r) according to r = f _g / f to any frequency (f), f _{g is} the fundamental frequency and f is any frequency. 3. The method according to any one of claims 1 or 2, characterized in that a fixed sequence ( 16 ) of the relative switching times ( 5 ) (t _rel ) is generated. 4. The method according to claim 3, characterized in that a part of the sequence ( 16 ) is assigned to one of the phases (R, S, T) and that a change in the assignment of the phases (R, R, S, T) in at least one specified relative switching time ( 5 ) (t _rel ) of the sequence ( 16 ) is carried out. 5. The method according to any one of claims 1-4, characterized in that by adding the relative switching time ( 5 ) (t _rel ) and a stored, immediately preceding, with respect to the time base ( 17 ) (TB) absolute switching time ( 6 ) ( t _vabs ) a current absolute switching time ( 8 ) (t _aabs ) with respect to the time base ( 17 ) (TB) is calculated. 6. The method according to claim 5, characterized in that the current absolute switching time ( 8 ) (t _aabs ) for an immediately following switching _{action is} stored as an immediately preceding absolute switching time ( 6 ) (t _vabs ). 7. The method according to claim 5, characterized in that the current absolute switching time ( 8 ) (t _aabs ,) is compared with the time base ( 17 ) (TB). 8. The method according to claim 7, characterized in that if the time base ( 17 ) (TB) substantially matches the current absolute switching time ( 8 ) (t _aabs ), a current logical switching state _value ( 10 ) (s _a ) is formed. 9. The method according to claim 8, characterized in that a fixed sequence ( 16 ) of the relative switching times ( 5 ) (t _rel ) is generated, part of the sequence ( 16 ) being assigned to one of the phases (R, S, T) and a change of the assignment of the phases (R, S, T) is carried out with at least one fixed relative switching time ( 5 ) (t _rel ) of the sequence ( 16 ) and that by assignment of the current logical switching state value ( 10 ) (s _a ) for one of the three phases (R, S, T) with respect to the phase-assigned part of the sequence ( 16 ) of the relative switching times ( 5 ) (t _rel ), a current logical phase switching state value (s _{ph, a} ) is generated. 10. The method according to claim 9, characterized in that the valency of the current logical phase switching state value (s _{ph, a} ) by negating the valency of an immediately preceding, the same phase (R, S, T) assigned phase switching state value (s _{ph, v} ) becomes. 11. The method according to any one of claims 9 or 10, characterized in that the current logical phase switching state value (s _{ph, a} ) as a temporal switching signal ( 12 , 13 , 14 ) (u _R (t), u _S (t), u _T (t)) is assigned in phase and the switching signal ( 12 , 13 , 14 ) (u _R (t), u _S (t), u _T (t)) to a driver stage ( 15 ) (GDU) for semiconductor power switches is transmitted. 12. Device for carrying out a method for controlling a converter for a symmetrical three-phase voltage system (R, S, T), with a modulator ( 1 ) which has a continuous time base ( 17 ) (TB) and a table memory ( 2 ) (TM) , characterized in that the modulator ( 1 ) has a first computing unit ( 4 ) (CU1) which has a switching angle ( 3 ) (α _n ) for calculating a relative switching time ( 5 ) (t _rel ) from the table memory ( 2 ) (TM) reads phase-independently and serves to generate a fixed sequence ( 16 ) of the relative switching times ( 5 ) (t _rel ). 13. The apparatus according to claim 12, characterized in that a factorizer ( 20 ) (F) for adapting the relative switching time ( 5 ) (t _rel ) to any frequency (f) with the most arithmetic unit ( 4 ) (CU1) connected is. 14. The apparatus according to claim 12, characterized in that a second computing unit ( 18 ) (CU2), which serves to determine a current absolute switching time ( 8 ) (t _aabs ) with respect to the time base ( 17 ) (TB), with the first computing unit ( 4 ) (CU1) and connected to the time base ( 17 ) (TB). 15. The apparatus according to claim 13, characterized in that a time storage unit ( 7 ) (M), which is used to store the current absolute switching time ( 8 ) (t _aabs ), with an input and with an output of the second computing unit ( 18 ) ( CU2) is connected. 16. The apparatus according to claim 15, characterized in that a time comparator unit ( 9 ) for comparing the current absolute switching time ( 8 ) (t _aabs ) with the time base ( 17 ) (TB) to form a current logical switching state value ( 10 ) (s _a ) is connected at a first input to the output of the second arithmetic unit ( 18 ) (CU2) and with a second input to the time base ( 17 ) (TB). 17. The apparatus according to claim 17, characterized in that an assignment unit ( 11 ) (AU) for generating a current logical phase switching state value (s _{ph, a} ) and for outputting the phase switching state value (s _{ph, a} ) as a temporal switching signal ( 12 , 13 , 14 ) (u _R (t), u _S (t), u _T (t)) is provided, which has a first input with the first computing unit ( 4 ) (CU1) and a second input with the time comparator unit ( 9 ) is connected. 18. The apparatus according to claim 17, characterized in that the assignment unit ( 11 ) (AU) has an output for the time switching signal ( 12 , 13 , 14 ) (u _R (t), u _S (t), u _T (t) ) comprises, the output being connected to a driver stage ( 15 ) (GDU) for semiconductor power switches. 19. Device according to one of claims 12-18, characterized in that the modulator ( 1 ) is implemented in a digital signal processor.