DE19843537A1 - Semiconductor component with four-layer structure for overvoltage protection has first conductivity base zone and second conductivity region on underside - Google Patents

Abstract

In addition to the n-type base zone (1) and a p-type region (3) there is a second p-region (2) on the top side with one n-region (4) in the top. At the top side is deposited a second p-region (11), forming a lateral bipolar transistor with the first top region and the base zone substrate. Lateral spacing between second p-regions (2,11) is such that breakdown of the transistor takes place at voltages lower than the breakdown or zero flip voltage of the vertical four-layer structure.

Description

The invention describes a four-layer semiconductor component that serves as surge protection can be used and provides variants for its formation according to the characteristics of The preamble of claim 1.

Semiconductor components for protection against overvoltages according to the prior art predominantly designed as four-layer structures. These have a defined set Breakdown voltage at which the four-layer structure ignites and thus from the blocking to the conductive State changes, as can be seen from P. D. Taylor; "Thyristor Design and Realization"; John Wiley & Sons Ltd., UK 1987, with F.E. Gentry, R.I. Scace, J.K. Flowers; "Bidirectional triode P-N-P-N switches ", Proc. IEEE, Vol. 53, pp. 355-369, 1965 or at S. M. Sze;" Physics of semiconductor devices ", John Wiley & Sons, UK 1981.  

Components of this type are often produced on the basis of conventional thyristor processes, like that among others in the following prior publications DE 30 00 804 A1, DE 30 17 584 A1 or DE 31 09 892 A1 is described. A publication DE 30 09 is also interesting 192 A1, in which a photocell for overload monitoring in the power semiconductor component has been introduced. In contrast to the usual thyristor, however, the control electrode not implemented or connected in the semiconductor components according to the invention.

According to the prior art, the breakdown voltage for these structures is set via the wafer doping or the wafer thickness. This makes it necessary to enter one for each voltage class use different basic material. When setting the breakover voltage via the choice there are also limits to the slice thickness, because for manufacturing reasons the Wafer thickness cannot be reduced arbitrarily.

The explanations of the inventive concept are based on FIGS. 1 to 7:

Fig. 1 shows the state of the art in the form of a structure which is capable of blocking bidirectional and unidirectional conductive.

FIG. 2 shows, analogously to FIG. 1, a structure according to the prior art which is bidirectionally lockable and conductive.

Fig. 3 outlines the basic principle of the inventive solution.

Fig. 4 shows the inventive solution with an edge closure corresponding to the prior art.

FIG. 5 shows a specific embodiment variant of FIG. 3, which is bidirectionally lockable and unidirectionally conductive.

FIG. 6 shows a further embodiment variant of FIG. 3, which is bidirectionally lockable and unidirectionally conductive and has a significantly improved reverse lockability.

Fig. 7 shows a further development of Fig. 6, which is conductive and lockable in both directions.

Fig. 1 shows the state of the art in the form of a structure which is capable of blocking bidirectional and unidirectional conductive. It consists of an n-doped substrate material, which forms the base zone ( 1 ). A p-doped region from the top ( 2 ) and a p-doped region from the bottom ( 3 ) are introduced into the base zone ( 1 ). The upper p-doped region ( 2 ) in turn contains n-doped regions ( 4 ).

The p-region on the top ( 2 ) forms the base, the n-regions ( 4 ) enclosed therein form the emitter of the internal npn transistor (zones 1 , 2 , 4 ). There is a metallization layer ( 5 ) on the top, which provides an electrical connection of the n-emitter regions ( 4 ) with the p-base regions ( 2 ), which represents the cathode ( 6 ) of the semiconductor component.

The so-called cathode short circuits (emitter shorts) are very often used in thyristor technology because they significantly reduce the amplification effect of the internal npn transistor and thus the dependency of the zero breakover voltage on the speed of the voltage change across the component is considerably weakened. A further metallization layer ( 7 ) is applied to the underside and forms the anode connection ( 8 ) of the semiconductor component. Furthermore, the structure chosen as an example in FIG. 1 contains an edge termination ( 9 ), which here is embodied schematically as a slope and prevents a breakthrough in the area of the chip edge.

Ignition of the structure in FIG. 1 can only be achieved if a voltage drop greater than the forward voltage of the base-emitter diode of the internal npn transistor forms as a result of a current flowing below the n-emitter regions ( 4 ) ( 1 , 2 , 4 ). This electricity can be generated by avalanche generation or by punch-through. In the case of avalanche regeneration, the transition from the n base zone ( 1 ) to the p region ( 2 ) is designed by the choice of the dopings in such a way that its avalanche breakdown begins at the desired breakover voltage.

For a punch-through, the width and the doping of the n-base zone ( 1 ) are chosen so that the space charge zone of the transition from the n-base zone ( 1 ) to the p-region ( 2 ) at the desired breakdown voltage just the p- Area on the underside ( 3 ) reached.

In both cases, the current through the component rises considerably when the breakover voltage is only slightly exceeded and leads to the already described opening of the internal npn transistor ( 1 , 2 , 4 ) with subsequent ignition of the four-layer structure ( 4 , 2 , 1 , 3 ). The structure in Fig. 1 is bi-directionally lockable. However, the ignition process can only take place when the anode has a positive voltage.

Fig. 2 shows an expanded variant according to the prior art, which is bidirectionally conductive in the same way. This is achieved by inserting n-emitter regions ( 10 ) into the p-region on the bottom ( 3 ) and connecting both regions with a metallization layer ( 5 ) analogous to the top. The rest of the structure with analog lettering corresponds to the structure according to Fig. 1. With a positive voltage at the anode, the ignition takes place in an identical manner, both with regard to the clamping behavior and with regard to the internal electronic processes, as has already been described for FIG. 1.

However, if there is a negative voltage at the anode, the clamping behavior is also the same, but the ignition process is caused by the lower substructures. With an "avalanche dimensioning", the transition from the n-base zone ( 1 ) to the p-region ( 3 ) breaks through, which is due to the onset of current flow along the emitter regions ( 10 ) in the lower p-region ( 3 ) to open the rear NPN transistor ( 10 , 3 , 1 ) and consequent subsequent firing of the four-layer structure ( 10 , 3 , 1 , 2 ) leads.

In the case of a "punch-through dimensioning", the space charge zone of the transition from the n-base zone ( 1 ) to the p-region ( 3 ) at the desired breakover voltage just reaches the p-region on the top ( 2 ), which in turn leads to Open the rear NPN transistor ( 10 , 3 , 1 ) and thus leads to the ignition of the four-layer structure ( 10 , 3 , 1 , 2 ).

A major disadvantage of the structures according to the prior art as shown in Fig. 1 and Fig. 2, is that for semiconductor devices with different breakover voltages another substrate material must be used as a starting material for preparation thereof respectively.

The object of this invention is to provide semiconductor devices for surge protection to design that regardless of the breakdown voltage of the structure in a large Voltage range only a substrate material as a starting material for their manufacture is needed.

This object is achieved by the measures of the characterizing part of claim 1, advantageous embodiment variants are characterized in the subordinate claims.

Fig. 3 shows the basic principle of the inventive solution of inter alia with the n-conductive substrate material, and a sketched avalanche dimensioning. The basic vertical structure of the four-layer structure corresponds to the prior art according to FIG. 1, it consists of a base zone ( 1 ), a p-area on the top ( 2 ) and a p-area on the bottom ( 3 ). The upper p-region ( 2 ) again contains n-regions ( 4 ).

The p-region on the top ( 2 ) forms the base, the n-regions ( 4 ) enclosed therein form the emitter of the internal npn transistor ( 1 , 2 , 4 ). There is a metallization layer ( 5 ) on the top, which creates an electrical connection between the n-emitter regions ( 4 ) and the p-base regions ( 2 ), which represents the cathode ( 6 ). There is a further metallization layer ( 7 ) on the underside, which forms the anode connection ( 8 ) of the component.

The inventive idea now consists, in addition to the known structures, of forming a lateral bipolar transistor by inserting a second p-region on the upper side ( 11 ), the punch-through breakdown of which occurs at voltages lower than the breakdown voltage or zero breakdown voltage of the vertical four-layer structure.

This is achieved by choosing the distance between the collector and emitter region of the transistor (A in FIG. 3) to be smaller than the extent of the space charge zone of the vertical four-layer structure, which would form at its maximum blocking capacity (B in FIG. 3) becomes. Furthermore, the anode potential ( 12 ) is applied to the second p-region ( 11 ). When the punch-through breakdown begins, the current through the lateral bipolar transistor ( 11 , 1 , 2 ) increases strongly and flows off to the cathode via the top p-region.

Analogously to Fig. 1, the internal npn transistor ( 4 , 2 , 1 ) turns on when the lateral voltage drop below its emitter ( 4 ) is greater than the forward voltage of the base-emitter diode ( 2 , 4 ), which leads to ignition the four-layer structure ( 4 , 2 , 1 , 3 ) leads. The breakdown voltage of the overall structure can thus be freely selected from very small voltages to breakdown voltage or zero breakdown voltage of the vertical four-layer structure by the choice of the distance A (in FIG. 3).

In general, the breakdown or zero breakdown voltage of the vertical four-layer structure of inventive semiconductor components can be increased with the means of the prior art by increasing the blocking capacity of the transition from the n-base zone ( 1 ) to the p-region ( 2 ) by means of suitable edge closures . Almost all known edge closures can be used for this, such as field plate and field ring edge structures, trench structures and VLD structures (variation of lateral doping).

Fig. 4 shows the inventive solution with an edge termination corresponding to the prior art. A field ring structure ( 17 ) for increasing the breakdown voltage between the p-regions ( 2 ) and ( 11 ) is inserted as an example.

The principle illustrated in FIG. 3 and FIG. 4 can be applied in the same manner when no conductive connection (5), emitter areas of n-(4) and the p-base regions (2) is carried out between the. Then the punch-through current directly forms the base current of the internal npn transistor ( 1 , 2 , 4 ). Also, the anode potential does not necessarily have to be applied directly to the second p region ( 11 ). It is sufficient if the potential at the second p-region changes linearly or non-linearly with the anode potential.

The vertical four-layer structure can be punched through in the same way. Then the maximum extent of the space charge zone corresponds to the thickness of the base zone ( 1 ).

FIG. 5 shows a specific embodiment variant of FIG. 3, which is bidirectionally lockable and unidirectionally conductive. It consists of a base zone ( 1 ), a p-area on the top ( 2 ) and a p-area on the bottom ( 3 ). The upper p-region ( 2 ) again contains n-regions ( 4 ). There is a metallization layer ( 7 ) on the underside, which forms the anode connection ( 8 ) of the component. There is a further metallization layer ( 5 ) on the top, which creates an electrical connection between the n-emitter regions ( 4 ) and the p-base regions ( 2 ) and forms the cathode ( 6 ).

There is a second p-region ( 11 ) on the cathode side, which forms a lateral bipolar transistor with the base zone ( 1 ) and the p-region ( 2 ) on the upper side. By inserting an n-region ( 13 ) with a higher doping than that of the base zone ( 1 ) and a conductive connection ( 14 ) between this n-region ( 13 ) and the second p-region ( 11 ), the lateral bipolar transistor ( 11 , 1 , 2 ) a voltage that changes with the anode voltage.

The difference between the potential at the second p-region ( 11 ) and the anode potential is small and results from the forward voltage of the transition from the n-base zone ( 1 ) to the p-region ( 3 ) and a voltage drop across the base zone ( 1 ) . This voltage drop arises when current flows through the lateral bipolar transistor ( 11 , 1 , 2 ). The tilting process takes place in the same way as described for FIG. 3.

In principle, the structure in FIG. 5 can also be implemented bidirectionally. The p-region on the underside ( 3 ) and the metallization ( 7 ) are then replaced in a simple manner by the vertically mirrored structure of the top (regions 2 , 4 , 5 , 11 , 13 , 14 ).

FIG. 6 shows a further embodiment variant of FIG. 3, which is bidirectionally lockable and unidirectionally conductive and has a significantly improved reverse lockability. It consists of a base zone ( 1 ), a p-area ( 2 ) on the top and a p-area ( 3 ) on the bottom. The upper p-region ( 2 ) again contains n-regions ( 4 ). There is a metallization layer ( 5 ) on the top, which creates an electrical connection between the n-emitter regions ( 4 ) and the p-base regions ( 2 ), which together form the cathode ( 6 ).

Also on the top is a second p-region ( 11 ), which forms a lateral bipolar transistor with the base zone ( 1 ) and the first p-region on the top ( 2 ). There is a further metallization layer ( 7 ) on the underside, which represents the anode connection ( 8 ) of the component.

The development over Fig. 3 consists in the formation of a further p-region ( 15 ) on the left and right side of the structure in such a way that a connection between the second p-region ( 11 ) on the top and the p-region ( 3 ) is made on the bottom. In the event of a reverse lockout, the space charge zone is pushed up to the top and an early breakthrough on the flanks of the structure (cutting or sawing edge) is prevented.

The connection between the second p-region ( 11 ) on the upper side and the p-region ( 3 ) on the lower side leads the anode potential directly to the second p-region ( 11 ) on the upper side and thus to the lateral bipolar transistor ( 11 , 1 , 2 ). The tilting process takes place in the same way as described for FIG. 3.

Fig. 7 shows a further development of Fig. 6, which is conductive and lockable in both directions. This semiconductor component consists of a base zone ( 1 ), a p-region ( 2 ) on the top and a p-region ( 3 ) on the bottom. The upper p-region ( 2 ) again contains n-regions ( 4 ). There is a metallization layer ( 5 ) on the top, which creates an electrical connection between the n-emitter regions ( 4 ) and the p-base regions ( 2 ), which in turn forms the cathode ( 6 ).

Also on the top is a second p-region ( 11 ), which forms a lateral bipolar transistor with the base zone ( 1 ) and the first p-region ( 2 ) on the top. A further p-region ( 15 ) is introduced on the left and right flanks of the structure, which creates a connection between the second p-region ( 11 ) on the top and the p-region ( 3 ) on the underside. In addition, n-emitter regions ( 16 ) are formed in the p-region ( 3 ) on the underside, which are electrically connected by a metallization layer ( 7 ). The metallization layer ( 7 ) forms the anode connection ( 8 ) of the component.

The tilting process in the forward direction takes place in semiconductor components according to FIG. 7 in a manner similar to that which has already been described for FIGS. 3 and 6. The bidirectional blocking capability also results in an analogous manner. If the voltage at the anode exceeds the punch-through voltage of the lateral bipolar transistor ( 11 , 1 , 2 ) in the reverse blocking direction, then the current then flows in via the second p-region ( 11 ) at the top, the further p-region the left or right flank ( 15 ) and the p-region ( 3 ) at the bottom.

If the lateral voltage drop under the n-emitter regions ( 16 ) on the underside reaches values which are greater than the forward voltage of the transition from the p-region ( 3 ) to the n-emitter region ( 16 ), the npn controls -Transistor ( 16 , 3 , 1 ) on the underside and causes the four-layer structure ( 16 , 3 , 1 , 2 ) to ignite.

The inventive solution makes it possible for everyone in equipment and systems used voltages to manufacture semiconductor devices for overload protection, which on the The basis of largely uniform substrates and a uniform starting technology have been built up.

Claims (7)

1. Semiconductor component with a vertical four-layer structure, consisting of a base zone ( 1 ) with a first conductivity, an area of a second conductivity ( 3 ) on the underside, an area of a second conductivity ( 2 ) on the top and at least one in this area of the second conductivity ( 2 ) on the top of the first conductivity ( 4 ), characterized in that a second area of the second conductivity ( 11 ) is introduced on the top, which is with the first area of the second conductivity ( 2 ) on the top and the substrate material ( 1 ) forms a lateral bipolar transistor, the lateral distance between these two areas of the second conductivity ( 2 , 11 ) is selected such that the breakdown of the lateral bipolar transistor takes place at voltages which are less than the breakdown or zero breakdown voltage of the vertical Four-layer structure and the potential at the second area is the second en conductivity ( 11 ) on the top is determined by an applied potential in the area of the second conductivity ( 3 ) on the bottom. 2. Semiconductor component according to claim 1, characterized in that an area of the first conductivity ( 13 ) with a higher doping than that of the base zone ( 1 ) is formed on areas of the top and with the second doping area of the second conductivity on the top ( 11 ) is electrically connected directly via a conductive layer ( 14 ). 3. Semiconductor component according to claim 1, characterized in that the second doping region ( 11 ) of the second conductivity on the top by a further region ( 15 ) of the second conductivity on the flanks with the region ( 3 ) of the second conductivity on the bottom is connected . 4. Semiconductor component according to claims 1 and 3, characterized in that in the region ( 3 ) of the second conductivity on the underside at least one region ( 16 ) of the first conductivity is introduced and is electrically connected to the anode ( 8 ). 5. Semiconductor component according to claim 1, 2, 3 and 4, characterized in that an electrical connection ( 5 ) between the regions ( 4 ) of the first conduction type on the top with the region ( 2 ) of the second conduction type is formed on the top. 6. Semiconductor component according to claim 4, characterized in that an electrical connection ( 7 ) between the regions of the first conduction type ( 16 ) and the region of the second conduction type ( 3 ) is formed on the underside. 7. Semiconductor component according to the preceding claims, characterized in that field ring structures ( 17 ) have been inserted as edge closures between the p-regions ( 2 ) and the p-doping regions ( 11 ).