DE19744098B4 - Process for producing a matrix of thin film transistors for liquid crystal displays - Google Patents
Process for producing a matrix of thin film transistors for liquid crystal displays Download PDFInfo
- Publication number
- DE19744098B4 DE19744098B4 DE19744098A DE19744098A DE19744098B4 DE 19744098 B4 DE19744098 B4 DE 19744098B4 DE 19744098 A DE19744098 A DE 19744098A DE 19744098 A DE19744098 A DE 19744098A DE 19744098 B4 DE19744098 B4 DE 19744098B4
- Authority
- DE
- Germany
- Prior art keywords
- film transistors
- tft
- thin film
- photoresist
- application
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 25
- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 8
- 239000011159 matrix material Substances 0.000 title claims abstract description 8
- 238000000034 method Methods 0.000 title claims description 27
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 26
- 239000004065 semiconductor Substances 0.000 claims abstract description 21
- 238000001465 metallisation Methods 0.000 claims abstract description 12
- 239000011248 coating agent Substances 0.000 claims abstract description 11
- 238000000576 coating method Methods 0.000 claims abstract description 11
- 238000004519 manufacturing process Methods 0.000 claims abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 229910052751 metal Inorganic materials 0.000 claims abstract description 5
- 239000002184 metal Substances 0.000 claims abstract description 5
- 239000012212 insulator Substances 0.000 claims abstract description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 9
- 239000010936 titanium Substances 0.000 claims description 9
- 229910052719 titanium Inorganic materials 0.000 claims description 9
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 6
- 238000002161 passivation Methods 0.000 claims description 6
- 238000003631 wet chemical etching Methods 0.000 claims description 6
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 229910052750 molybdenum Inorganic materials 0.000 claims description 5
- 239000011733 molybdenum Substances 0.000 claims description 5
- 229910004205 SiNX Inorganic materials 0.000 claims description 4
- 238000001020 plasma etching Methods 0.000 claims description 4
- 239000011521 glass Substances 0.000 claims description 3
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 3
- 101000652359 Homo sapiens Spermatogenesis-associated protein 2 Proteins 0.000 claims 1
- 101000642464 Homo sapiens Spermatogenesis-associated protein 2-like protein Proteins 0.000 claims 1
- 102100030254 Spermatogenesis-associated protein 2 Human genes 0.000 claims 1
- 229910004164 TaMo Inorganic materials 0.000 claims 1
- 239000000956 alloy Substances 0.000 claims 1
- 229910045601 alloy Inorganic materials 0.000 claims 1
- 238000011161 development Methods 0.000 description 3
- 230000018109 developmental process Effects 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 229910001182 Mo alloy Inorganic materials 0.000 description 1
- 238000005267 amalgamation Methods 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000003912 environmental pollution Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- JZLMRQMUNCKZTP-UHFFFAOYSA-N molybdenum tantalum Chemical compound [Mo].[Ta] JZLMRQMUNCKZTP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
Abstract
Verfahren
zur Herstellung einer Matrix aus Dünnschichttransistoren für Flüssigkristallbildschirme, gekennzeichnet
durch die Schritte:
– Aufbringen
einer transparenten leitfähigen
Schicht (11) für
die Bildpunktelektrode auf ein Substrat (10);
– Aufbringen
eines Metalls (12) für
die Zeilen und als Gate-Kontakte der Transistoren (TFT);
– Beschichten
mit Fotolack (13);
– erste
Belichtung der Fotolackschicht (13) und Strukturieren der Gate-Kontakte
der Dünnschichttransistoren
(TFT) und der Bildpunktelektroden;
– zweite Belichtung der Fotolackschicht
(13);
– Entfernen
der Metallschicht (12) im Bereich der Bildpunkte (BP);
– Entfernen
der Fotolackschicht (13);
– Aufbringen
eines Gate-Isolators (14) für
die Dünnschichttransistoren
(TFT);
– Aufbringen
eines intrinsischen Halbleiters (15);
– Aufbringen eines p- oder
n-dotierten Halbleiters (16) als Drain- und Source-Kontakte (D,
S) der Dünnschichttransistoren
(TFT);
– Aufbringen
einer Metallisierung (17) der Spalten der Dünnschichttransistor-Matrix
sowie der Drain- und Source-Kontakte (D, S) der Dünnschichttransistoren
(TFT);
– Beschichten
mit Fotolack...Method for producing a matrix from thin-film transistors for liquid crystal screens, characterized by the steps:
- Applying a transparent conductive layer (11) for the pixel electrode on a substrate (10);
- Application of a metal (12) for the rows and as gate contacts of the transistors (TFT);
- coating with photoresist (13);
- First exposure of the photoresist layer (13) and structuring of the gate contacts of the thin-film transistors (TFT) and the pixel electrodes;
- second exposure of the photoresist layer (13);
- Removing the metal layer (12) in the area of the pixels (BP);
- removing the photoresist layer (13);
- Application of a gate insulator (14) for the thin film transistors (TFT);
- Application of an intrinsic semiconductor (15);
- Application of a p- or n-doped semiconductor (16) as drain and source contacts (D, S) of the thin film transistors (TFT);
- Applying a metallization (17) of the columns of the thin film transistor matrix and the drain and source contacts (D, S) of the thin film transistors (TFT);
- Coating with photoresist ...
Description
Die Erfindung geht aus von einem Verfahren zur Herstellung einer Matrix aus Dünnschichttransistoren, für Flüssigkristallbildschirme.The The invention is based on a method for producing a matrix from thin film transistors, for liquid crystal screens.
Es sind bisher Verfahren zur Herstellung einer a:Si-H-Dünnschichttransistor-Matrix für Flüssigkristallbildschirme bekannt, die in der Regel 5–7 fotolitografische Maskenschritte benötigen. Jeder Fotolitografie-Schritt dieser Verfahren bedeutet eine Beschichtung mit Fotolack, das Belichten und Entwickeln des Fotolacks und einen anschließenden Ätzprozeß. Die Zahl der Prozeßschritte bestimmt nicht nur die Kosten des Produktes, sondern auch die Ausbeute. Bei jedem Litografie-Schritt treten außerdem zwangsläufig Defekte auf.It are processes for producing an a: Si-H thin film transistor matrix for liquid crystal screens known, which are usually 5-7 need photolithographic masking steps. Every step in photography this process means a coating with photoresist, the exposure and developing the resist and a subsequent etching process. The number of process steps determines not only the cost of the product, but also the yield. With every litography step defects also inevitably occur on.
Das erfindungsgemäße Verfahren mit den kennzeichnenden Merkmalen des Anspruchs 1 ermöglicht die Herstellung einer Dünnschichttransistor-Matrix für Flüssigkristallbildschirme mit nur drei Belackungsschritten, wobei Bildschirme mit nur wenigen Bildpunktdefekten und Dünnschichttransistoren mit einer hohen Beweglichkeit der Ladungsträger erzielbar sind. Das Verfahren erlaubt außerdem die Erzielung einer hohen Ausbeute. Im wesentlichen basiert die Erfindung auf der Verschmelzung einiger Prozeßschritte durch Doppelbelichtung von Fotolackschichten und einem Lift-Off-Schritt, in dem der Fotolack und die Passivierung im Bereich der Kontakte gemeinsam entfernt werden. Durch die geringe Anzahl von Prozeßschritten des erfindungsgemäßen Verfahrens ist die Ausbeute bei der Herstellung von Flüssigkristallbildschirmen sehr hoch. Die geringeren Produktionszeiten und die Einsparung von Maschinen und Verbrauchsmaterial ermöglichen eine kostengünstige Fertigung, die sich auch im Produktpreis niederschlagen kann. Darüber hinaus entsteht durch die geringere Anzahl von Prozeßschritten auch eine geringere Umweltbelastung als bei herkömmlichen Verfahren. Die Bildpunktelektroden sind direkt auf dem Substrat angeordnet und lassen sich daher besonders einfach strukturieren.The inventive method with the characterizing features of claim 1 enables Production of a thin film transistor matrix for liquid crystal screens with only three coating steps, with screens with only a few Pixel defects and thin film transistors with a high mobility of the charge carriers can be achieved. The procedure allowed as well achieving a high yield. Basically, the Invention on the amalgamation of several process steps by double exposure of photoresist layers and a lift-off step in which the photoresist and the passivation in the area of the contacts removed together become. Due to the small number of process steps of the method according to the invention the yield in the manufacture of liquid crystal displays is very high high. The shorter production times and the saving of machines and enable consumables an inexpensive Manufacturing that can also be reflected in the product price. Furthermore the lower number of process steps also results in a lower number Environmental pollution than with conventional processes. The pixel electrodes are arranged directly on the substrate and are therefore particularly easy to structure.
In den abhängigen Ansprüchen sind Maßnahmen aufgeführt, die vorteilhafte Weiterbildungen und Verbesserungen des im Anspruch 1 angegebenen Verfahrens ermöglichen.In the dependent claims are measures lists the advantageous developments and improvements of the claim 1 allow specified procedure.
So kann beispielsweise als transparente leitfähige Schicht für die Bildpunktelektrode Indium-Zinnoxyd (ITO) auf ein unstrukturiertes Glassubstrat aufgesputtert werden. Durch die damit verbundene einfache Strukturierung des ITO entstehen nur geringe Bildpunktfehler. Als Zeilen- und Gate-Kontakte kann vorzugsweise Titan oder auch eine Tantal-Molybdän-Legierung aufgesputtert werden. Die Strukturierung der ITO- und Titan-Schichten kann vorzugsweise naßchemisch erfolgen.So can, for example, as a transparent conductive layer for the pixel electrode Sputtered indium tin oxide (ITO) on an unstructured glass substrate become. Due to the simple structuring of the ITO only small pixel errors arise. As row and gate contacts can preferably titanium or a tantalum-molybdenum alloy be sputtered on. The structuring of the ITO and titanium layers can preferably wet chemical respectively.
Weitere Vorteile ergeben sich, wenn nacheinander SiNx als Gate-Isolator, a-Si:H als Halbleiter, n+-a-Si:H als Drain- und Source-Kontakte in einem Vakuum in einem PECVD-System abgeschieden und durch Plasmaätzen strukturiert werden. Durch die Abscheidung dieser Schichtfolge ohne Unterbrechung des Vakuums lassen sich Dünnschichttransistoren mit einer hohen Beweglichkeit, einem kleinen Sperrstrom, einem kleinen Sperrbereich, einer geringen Schwellspannung und hoher elektrischer und thermischer Stabilität erzielen.Further advantages result if SiNx as gate insulator, a-Si: H as semiconductor, n + -a-Si: H as drain and source contacts are deposited in a vacuum in a PECVD system and structured by plasma etching , By depositing this layer sequence without interrupting the vacuum, thin-film transistors with high mobility, a small reverse current, a small reverse range, a low threshold voltage and high electrical and thermal stability can be achieved.
Für die Spaltenmetallisierung und die Drain- und Source-Kontakte kann beispielsweise eine Molybdän- oder Titanschicht aufgesputtert und durch naßchemisches Ätzen strukturiert werden. Für die Kontakte läßt sich vorzugsweise Aluminium aufsputtern und ebenfalls naßchemisch ätzen. Selbstverständlich sind für die Metallisierungen auch andere Metalle einsetzbar.For column metallization and the drain and source contacts can be, for example, a molybdenum or Sputtered titanium layer and structured by wet chemical etching become. For the contacts can be preferably sputter on aluminum and also etch wet-chemical. Of course for the Metallizations can also be used with other metals.
In der Zeichnung ist die Prozeßfolge einer bevorzugten Ausgestaltung des Verfahrens dargestellt und in der folgenden Beschreibung näher beschrieben.In the drawing is the process sequence a preferred embodiment of the method shown and in the following description closer described.
Es zeigen:It demonstrate:
In
In
Claims (7)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19744098A DE19744098B4 (en) | 1997-10-06 | 1997-10-06 | Process for producing a matrix of thin film transistors for liquid crystal displays |
PCT/DE1998/002463 WO1999018608A1 (en) | 1997-10-06 | 1998-08-24 | METHOD FOR PRODUCING A MATRIX FROM THIN-FILM TRANSISTORS, INCLUDING WITH a:Si-H AS SEMICONDUCTOR, INTENDED FOR LIQUID CRYSTAL DISPLAYS |
EP98951194A EP0943156A1 (en) | 1997-10-06 | 1998-08-24 | METHOD FOR PRODUCING A MATRIX FROM THIN-FILM TRANSISTORS, INCLUDING WITH a:Si-H AS SEMICONDUCTOR, INTENDED FOR LIQUID CRYSTAL DISPLAYS |
JP52074299A JP2001507481A (en) | 1997-10-06 | 1998-08-24 | Method for producing a matrix for a liquid crystal display, in particular comprising a thin-film transistor having a: Si-H as semiconductor |
KR1019997004784A KR20000069207A (en) | 1997-10-06 | 1998-08-24 | Method for producing a matrix from thin-film transistors, including with a:Si-H as semiconductor, intended for liquid crystal displays |
TW087114349A TW437098B (en) | 1997-10-06 | 1998-08-29 | Process to produce a matrix composed of thin-film transistors, particularly with a: Si-H as semiconductor for liquid crystal screens |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19744098A DE19744098B4 (en) | 1997-10-06 | 1997-10-06 | Process for producing a matrix of thin film transistors for liquid crystal displays |
Publications (2)
Publication Number | Publication Date |
---|---|
DE19744098A1 DE19744098A1 (en) | 1999-04-15 |
DE19744098B4 true DE19744098B4 (en) | 2004-12-09 |
Family
ID=7844733
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19744098A Expired - Fee Related DE19744098B4 (en) | 1997-10-06 | 1997-10-06 | Process for producing a matrix of thin film transistors for liquid crystal displays |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP0943156A1 (en) |
JP (1) | JP2001507481A (en) |
KR (1) | KR20000069207A (en) |
DE (1) | DE19744098B4 (en) |
TW (1) | TW437098B (en) |
WO (1) | WO1999018608A1 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100904270B1 (en) | 2002-12-31 | 2009-06-25 | 엘지디스플레이 주식회사 | Thin film transistor array substrate and manufacturing method of the same |
KR100561646B1 (en) * | 2003-10-23 | 2006-03-20 | 엘지.필립스 엘시디 주식회사 | Thin Film Transistor Substrate for Display Device And Method For Fabricating The Same |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60234369A (en) * | 1984-05-07 | 1985-11-21 | Nec Corp | Double gate type thin-film transistor |
US4767723A (en) * | 1987-10-30 | 1988-08-30 | International Business Machines Corporation | Process for making self-aligning thin film transistors |
-
1997
- 1997-10-06 DE DE19744098A patent/DE19744098B4/en not_active Expired - Fee Related
-
1998
- 1998-08-24 JP JP52074299A patent/JP2001507481A/en active Pending
- 1998-08-24 WO PCT/DE1998/002463 patent/WO1999018608A1/en not_active Application Discontinuation
- 1998-08-24 EP EP98951194A patent/EP0943156A1/en not_active Withdrawn
- 1998-08-24 KR KR1019997004784A patent/KR20000069207A/en not_active Application Discontinuation
- 1998-08-29 TW TW087114349A patent/TW437098B/en not_active IP Right Cessation
Non-Patent Citations (1)
Title |
---|
NICHTS ERMITTELT * |
Also Published As
Publication number | Publication date |
---|---|
DE19744098A1 (en) | 1999-04-15 |
KR20000069207A (en) | 2000-11-25 |
TW437098B (en) | 2001-05-28 |
EP0943156A1 (en) | 1999-09-22 |
WO1999018608A1 (en) | 1999-04-15 |
JP2001507481A (en) | 2001-06-05 |
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Legal Events
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OP8 | Request for examination as to paragraph 44 patent law | ||
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |