DE19549673B4 - Three dimensional error correction system for digital VTR - performs three error corrections based on three reproduced error correction codes, and changes correction algorithm when burst error is detected - Google Patents

Abstract

The digital reproduction device comprises a first error-correction decoder for performing error correction on playback data, reproduced from a helical scan magnetic tape, using a first error correction code. A burst error detector detects a burst error that has occurred in a playback signal during reproduction. A second and a third error correction device perform error correction using a second and a third error correction code, respectively. An error-correction decoding algorithm followed by at least one of the second and third error correction devices is changed, based on if a burst error was detected or not.

Description

The The present invention relates to a recording apparatus according to the preamble of claim 1.

1A and 1B show the arrangement of error correction codes attached to image data and audio data according to the previous SD standard. According to the SD standard, an (85, 77, 9) Reed-Solomon code (hereinafter referred to as a C1 check code) is used as an error correction code applied to image data in the recording direction, and (149, 138, 12 ) Reed-Solomon code (hereinafter referred to as C2 check code) is used as an error correction code applied in the vertical direction. Similarly, the (85, 77, 9) Reed-Solomon code (C1 check code) identical to that for the image data is used as an error correction code applied to audio data in the recording direction, and (14, 9, 6) Reed-Solomon code (hereinafter referred to as C3 check code) is used as an error correction code applied to the audio data in the vertical direction. 2 shows the structure of a sync block. As in 2 is shown, a sync block is 90 bytes long. Five bytes on the header are used to record a sync pattern and an ID signal. Eight bytes at the end are used to record error correction codes (C1 check code).

One Type of digital video tape recorder for transparent recording an RTV signal (advanced television signal) to a magnetic Tape using the one specified by the SD specification Track format is disclosed in "A Recording Method of ATV Data on a Consumer Digital VCR ", presented at the "International Workshop on HDTV '93 ", from the 26th to the 19th October 28, 1993 in Ottawa, Canada. The content the procedure will be next described as an example of the state of the art. The data rate of the ATV signal is in the range of 17 to 18 Mbps. A digital video tape recorder according to the SD standard can record the ATV signal in transparent operation.

One an ATV or DVB signal forming bit stream is equivalent to the MPEG2 system. That is, image data are encoded by intra-frame or subframe coding which data using a correlation within a Frame or inter-frame or sub-picture coding (motion-compensated prediction) in which data compression is carried out using a correlation of data between different ones Frames (or subpictures). To play in accordance with the MPEG2 system compressed data propagates errors when these are in a playback signal occur over multiple frames until the next intra-frame encoded Data is reproduced. This results from the fact that only the encoded intra-frame Data independent can be decoded without that on any other frame needs to be referenced.

A digital video tape recorder disclosed in the aforementioned technical report will be described below. The disclosed technology is concerned with a recording format used for recording the ATV signal on a magnetic tape and is useful for realizing fast playback, which is one of the aforementioned problems. The recording format will be briefly described. 3A and 3B show the scanning tracks of rotary heads in normal playback and fast playback in a conventional digital video tape recorder. In the drawing, adjacent tracks are recorded alternately with rotary heads having different azimuth angles. In normal playback, the tape speed (which may be simply referred to as tape speed in the following) is the same as that for recording. The turrets can record the tracks as in 3A track shown. The tape speed in fast playback is different from that during recording. The turrets cross several tracks and reproduce fractions of data from the parts of the tracks having the identical azimuth angle. 3B shows a Abtastspur at a five times speed. For example, when a bit stream is sequentially recorded on tracks according to the MPEG2 system, only the intra-frame coded data separated by an intermittently reproduced signal is reproduced in fast playback. The intra-frame encoded data alone is used to restore the image. The reproduced parts on the screen are not adjacent to each other, and the reproduced fractions of data are scattered over each screen. In addition, since the bit stream is coded with a variable length, it is not certain that all the data (screen dots) of the screen are cyclically updated, and certain areas of the screens may not have been updated for a longer period of time. As a result, the image quality obtained in fast playback is not satisfactory and unacceptable for home video tape recorders.

4 contains a block diagram of a known digital video tape recorder, which allows fast playback. Here, the video area of each track is a main area in which a bit stream of an ATV signal is recorded, and a duplication area in which an important part of a bit stream (high priority data, hereinafter referred to as HP data) is to be restored a picture used in fast playback is recorded, split. In the fast playback, only the intra-frame encoded data-containing sync blocks are valid. The intra-coded data is therefore recorded in the duplication areas. To further reduce the amount of data, low frequency components are extracted from the intra-frame encoded data and recorded as HP data. In 4 denotes the reference number 1 a bitstream input terminal. 2 denotes a bit stream output terminal. 3 denotes an HP data output terminal. 4 denotes a variable length decoder. 5 denotes a counter. 6 denotes a data extraction circuit. 7 denotes a block end (hereinafter EOB) supplement circuit.

An MPEG2-compliant bitstream is sent through the input port 1 supplied as it is through the output port 2 delivered and recorded in the main areas consecutively. The bitstream from the input port 1 also becomes the decoder 4 for variable lengths. The syntax of the MPEG2 compliant bitstream is analyzed and an intra-frame is captured. A timing signal is from the counter 5 generated. Low frequency components are extracted from all data blocks of an intra-frame from the data extraction circuit 6 pulled out. An EOB is provided by the EOB supplemental circuit 7 added. Thus, HP data is formed and recorded in the duplication areas.

5 schematically illustrates a normal playback and a fast playback in the known digital video tape recorder. In normal playback, all bit streams recorded in the main areas are played back and fed to an MPEG2-compliant decoder installed outside the digital video tape recorder. The HP data will not be considered. In contrast, in fast playback, only the HP data recorded in the duplication areas are detected and fed to the decoder. The bitstreams in the main areas are ignored.

Next, the locations of the main areas and the duplication areas in each lane will be described. 6 shows a Abtastspur a rotary head in fast playback mode. Under the condition that the tape speed is set at an integral multiple of the normal tape speed and a phase rigidity is achieved, the scanning head is synchronized with tracks having an identical azimuth angle. The locations of data to be played are fixed. Assuming that portions of the reproduction signal having output levels exceeding -6 dB become valid reproduction data, the portion of the reproduction signal representing valid reproduction data during one scan of the head is displayed as cross-hatched areas in FIG 6 shown. 6 shows a nine times playback speed. That is, it is ensured that at the nine times speed, the part of a playback signal which is shown as cross-hatched areas in 6 is read out (ie is obtained as valid data). The HP data should therefore be recorded in these areas. However, at other multiple speeds, reading data from these areas is not assured. It is therefore necessary to select the areas so as to ensure reading at multiple tape speeds.

7 contains an explanatory diagram of areas (overlapping areas) on the tape that are sampled together at various conventional fast playback speeds, ie at three tape speeds. Several overlap areas are scanned at each of the tape speeds. Duplicate areas are selected from the overlap areas to ensure reading of the HP data recorded in the duplication areas at the different tape speeds. 7 deals with a fast tape feed at 4, 9 and 17 times speed. The scanned areas in 7 are also sampled during a fast tape feed at -2, -7, and 15-fold speeds.

However, not all overlap areas can be tracked at different tape speeds from the head. This is because the number of tracks crossed by the head differs from one tape speed to the other. It is also required that the head can start sampling on any track with identical azimuth. 8th shows the scanning tracks of a rotary head at 5 and 9 times speed in the known digital video tape recorder. In the drawing, the areas 1, 2 and 3 are selected from the overlapping areas at 5 and 9 times speed. If the same HP data is repeatedly recorded on nine tracks, the HP data can be read at both 5 and 9 times speed.

9 shows the scanning tracks of two rotary heads in the playback operation at 5x speed in the known digital video Auf recording device. As can be seen from the figure, when HP data is repetitively recorded in the number of tracks which is identical to the multiple of the speed (ratio of the tape speed in the fast playback to the tape speed in the normal playback), the HP data be read by the minds, which are synchronized with the tracks of identical azimuth. In other words, if the HP data is repetitively multiplied in the number of tracks which is equal to the multiple of the speed of the maximum multiple tape speed in the fast playback, the HP data can be reliably reproduced both in the forward and in the Reverse direction at different tape speeds are read.

10 shows the structure of a track in the conventional digital video tape recorder. In the illustrated example, a track has major areas and duplication areas. As far as a home digital video tape recorder is concerned, one video area of each track is composed of 135 sync blocks. The main areas are composed of 97 sync blocks. The duplication areas are composed of 32 sync blocks. The duplication areas contain overlap areas for 4, 9, and 17 times speed in 7 , In this case, a data rate for the main areas is about 17.46 Mbps. For the duplication areas, since the same data is repetitively recorded 17 times, the data rate is about 338.8 kbps.

The known digital home video tape recorder has the above-described training, and special playback data is repetitive in the duplication areas recorded. The recording speed of the special playback data is therefore low. For slow playback or fast Reproduction in particular is the quality of the reproduced images unsatisfactory. For example, if an intra-frame encoding performed twice a second is, the data rate of intra-coded data alone estimated at about 3 Mbps in an ATV signal, however, the known video tape recorder achieves only one Record at about 340 kbps. The quality of rendered images is therefore pretty bad.

Furthermore is for an ATV or DVB signal (video broadcasting signal) the data compression carried out using a motion compensated prediction based technique. The compressed data is from intra-data (intra-frame or partial image coded Data) whose playback data alone makes it possible to recover an image, and inter-data (inter-frame or field coded data) used in combination with reference field or - full-screen data can be used to restore an image, composed. If error in Playback data occur, the errors propagate in the case an ATV signal via multiple fields or frames. This gives an unsightly Presentation. If the digital video tape recorder complies with the SD standard as a storage medium for storing data or programs for one Computer or the like is used, it is desired to apply more effective error correction code to recover data (to get an error correction from them) that does not play were due to failures, caused by defects or dust on the magnetic tape.

Since the rotary heads cross the recording tracks obliquely during the special reproduction (fast playback, slow playback, standstill or the like), the reproduction signal of each track is intermittently generated. It is therefore not possible to use the in 1A form error correction block (video data). Accordingly, the reproduction data is subject to error correction only with the C1 check code.

When error correction by the C1 check code is applied and the symbol error rate is 0.01, the error correction probability is 1.56 × 10 ^-3 and one error per 8 sync blocks is detected. Especially during the special reproduction, the reproduction signal is not stable and the symbol error rate often exceeds 0.01. The recorded data is coded with variable length, so that if an error occurs, the subsequent data can not be used, and the quality of the reproduced picture deteriorates. The rate of unrecognized errors is also as high as 7.00 × 10 ^-8 .

The EP 0 606 857 A2 discloses a digital video signal recording apparatus on a tape in which data packets are received and then examined as to whether they are to be recorded as trick play data. For this purpose, a subset of the received data is selected and recorded in trick play segments on the tape.

It is the object of the present invention to improve the error correction capability in the normal reproduction and the quality of reproduced images, further the error correction capability in the fast playback as well as in the normal reproduction and the quality of the reproduction images to improve during fast playback by increasing the recording speed of data for fast playback.

These The object is achieved by The features of claim 1. Advantageous developments of the recording device according to the invention emerge from the dependent claims.

According to one Aspect of the invention is a digital recording device Signals provided in the input in the form of transport packets intra-frame or field-coded or inter-frame or Partial image coded digital video and audio signals recorded according to the transparent method be, with the intra-image signals first from the transport packets be separated. High frequency components are separated from the intra-image signals removed and the recording speed is then condensed. The intra-picture signal whose recording speed is compressed is redesigned to produce special playback data. The data of the entered transport packages are redesigned and converted into sync block formats. If the special playback data recorded, the special playback data is recorded Traces of a recording medium arranged by a head be sampled at a predetermined, fast playback speed. The areas for recording the error correction codes are also arranged on the Abtabtpuren of the head. Either the error correction code, added to the special playback data, or the error correction code, which is added at least to the recording data obtained by conversion in the sync block format is in the range recorded for recording the error correction code. The recording format is designed so that a Identification signal corresponding to the area in the error correction code recording area recorded error correction code identifies the recording signal added and recorded. Accordingly, the limited recording area for added Data (recording area for special playback data, recording area for error correction codes and the like).

If for example, the digital signal recording apparatus as a home device is used and image data such as the aforementioned ATV signal (or a Signal, which is a method of compaction based on the motion-compensated prediction represented by MPEG1 or MPEG2 (Method of compacting in which image data is restored by referring to other image data when taking a picture of Image data is decoded) is recorded the error correction code for special playback data, for example in the recording area for the Error correction code recorded. If the recording device for digital Signals for is the professional use or as an external recording device for one Computer is used, the added to normal playback data error correction code in the recording area for error correction codes inserted. Because very effective error correction codes to the desired data with the identical Recording format to be added can and the identification signal is recorded in the recording signal it will be possible a compatible playback (playback by using a other compatible device) with a digital signal recording / reproducing apparatus that only one of the decoders of the aforementioned Error correction codes has by the type of rich in the Aufzeichbe for error correction codes recorded error correction codes is identified.

Farther becomes the recording area for error correction codes together with the error correction code recording area, added to the normal playback data and the error correction code, which is added to the special playback data, used and depending switched from the intended use, wherein the recording area for error correction codes within the limited recording area for added data can and for this amount can be the recording area for the special playback data to be enlarged the recording speed for the particular playback data can be elevated be and the picture quality while the special playback can be improved.

The arrangement may be such that, for example, when the data transmitted in the transport packets represented by MPEG2 and recorded in a digital video tape recorder according to the SD standard and when the sync block formats are generated by the recording format generating means are given m lines Transport packets are used to generate n rows of sync blocks of data. The recording format on the recording medium is arranged such that the data of n-sync blocks are arranged on the same track when the data of the sync block formats obtained by conversion is recorded on the recording medium. Accordingly, the data of the transport packets can be effectively converted into sync blocks. In addition, the n-sync blocks of data within a track are finished, so that when the data of the sync block format during playback in the Data from transport packets can be converted, it is possible to separate them into the sets of n-sync block formats by using the track information such as the track identification signal and the sync block number, and the size of the circuit particularly in the reproduction system can be reduced. Furthermore, it is not necessary to record the n-sync-block identification signal, and the data-recording area can be effectively utilized.

The Arrangement can be made such that when the input intra-image data in the generating device for special Playback data used to the special playback data to generate the special playback data in the form of the entered Transport packages are generated. The special playback data, which are generated in the form of the transport packets, become the Time of recording converted into a sync block format like the entered transport packages, and then recorded. If accordingly a fast Playback is performed by a digital signal replay device, a circuit for generating transport packets is not required and it is possible the circuit for converting the sync block format for reproduction in particular, to divide into transport packages, and the size of the circuit reduced in a device for exclusive reproduction become.

The Arrangement can be made so that the recording area for the Error correction code adjacent to the recording area for special Playback data is arranged. Accordingly, it is possible to change the recording area for the error correction code along with the special playback data during fast playback to reproduce without errors, so that the special playback data and the error correction code effectively can be arranged on the recording medium, and it is possible to arrange a To realize data arrangement, which is against the effects of nonlinearity of tracks or the like not susceptible is.

The Arrangement can be made such that if transmitted in the transport packets represented by MPEG2 Data recorded in the digital video tape recorder represented by the SD standard and the sync block formats in the recording data generating device n rows of sync blocks of data are generated using the m transport packets are generated. The identification signal for identifying in the error correction code recording area recorded data is transmitted using a recording area included in the data recording section is provided, which remains, when the transport packets in the recording data generating device be converted into the sync block formats. Accordingly, it is not required, a recording area for the transmission of the identification signal to provide new, and the recording device for exclusive reproduction be reduced.

The Arrangement can be made so that the recording area for the Error correction code adjacent to the recording area for special Playback data is ordered to. Accordingly, it is possible to change the recording area for the error correction code along with the special playback data during fast playback to reproduce without errors, so that the special playback data and the error correction code effectively can be arranged on the recording medium, and it is possible to arrange a To realize data arrangement, which is against the effects of nonlinearity of tracks or the like not susceptible is.

The arrangement may be such that when the data transmitted in the transport packets represented by MPEG2 is recorded in the digital video tape recorder represented by the SD standard and the sync block formats are generated in the recording data generating device, n lines (of sync blocks The identification signal for identifying the data recorded in the error correction code recording area is transmitted by using a recording area provided in the data recording section remaining when the transport packets in the recording data generating device are put into the sync block Accordingly, it is not necessary to newly provide a recording area for the transmission of the identification signal, and the recording data can be efficiently generated the recording area for the particular playback data is thereby increased and the picture quality of the picture in the fast playback is improved. The arrangement may be such that, when the error correction code is added to the output of the recording data generating device, the output of the recording data generating device and the output of the part or the entire special reproduction data generating device form the data block. Nesting is applied to a collection of multiple data blocks to form the error correction code for normal playback. If the areas for recording the special playback data with a period of several Tracks are repeated and the control is made so that the error correction code is added only to the normal playback data, it is not possible to make the data blocks effective, and the maximum burst error correction capability can vary from one track to another, and the size of the circuit can unnecessarily increase, but by forming the data block using a part of the particular reproduction data or the entirety of the data, the freedom of designing the data blocks is increased, and for this amount, the size of the circuit for data block formation can be reduced, and the maximum Trunk error correction capability can be equalized between different tracks.

The Invention will be described below with reference to FIGS Embodiments explained in more detail. It demonstrate:

1A and 1B a data format of the video signal recording areas on a track for a video and audio signal in accordance with the SD standard,

2 the structure of a sync block according to the SD standard,

3A and 3B the scanning tracks of the rotary heads in the normal reproduction and in the fast reproduction in a known digital video tape recorder,

4 a block diagram of a known digital video tape recorder, which is capable of fast playback,

5 schematically the normal playback and the fast playback in the known digital video tape recorder,

6 the scanning track of the turret in a typical fast playback,

7 a diagram for explaining the overlapping areas at several fast playback speeds,

8th the scanning tracks of a rotary head at 5 and 9 times speed in the known digital video tape recorder,

9 the scanning tracks of two rotary heads in a 5x speed reproduction in the known digital video tape recorder,

10 the locations of areas on a track in the known digital video tape recorder,

11 1 is a block diagram of a recording system of a digital video tape recorder according to the first embodiment of the invention;

12 FIG. 10 is a block diagram of a special playback data generating circuit according to the first embodiment; FIG.

13 FIG. 4 is a block diagram of a 4-times speed data generating circuit according to the first embodiment; FIG.

14A and 14B the numbers of sync blocks that can be played from a track at various fast playback speeds in fast playback mode,

15 a pattern of tracks having a four-track period including the location of the special reproduction recording area according to the first embodiment;

16 a recording format on the magnetic tape according to the first embodiment,

17 FIG. 12 is a block diagram of a reproducing system in a digital video tape recorder according to the first embodiment; FIG.

18 FIG. 12 is a block diagram of a recording system in the digital video tape recorder of Embodiment 2; FIG.

19A and 19C Representations of the arrangement of the rotary heads of the respective channels on a rotary drum, which is typically used in a digital video tape recorder according to the SD standard,

20 a track pattern of a period of four tracks including the arrangement of the recording area for the special reproduction data in the embodiment 2,

21 a recording format on a magnetic tape in the embodiment 2,

22A and 22G a method of forming the data blocks at the time of generation of the error correction code added to the normal reproduction data in the embodiment 2;

23 the method of interleaving over five data blocks applied to the data, when the error correction code is added to the normal reproduction data, in the embodiment 2,

24 the formation of an error correction code (C5 check code) added to the special reproduction data in Embodiment 2,

25 FIG. 12 is a block diagram of the reproducing system in a digital video tape recorder in Embodiment 2; FIG.

26 the track pattern and the scanning tracks of the rotary heads during a 4 × speed playback using the 1 × 2 drum configuration of a magnetic tape having the recording format 21 , and

27 the track pattern and the scanning tracks of the rotary heads during playback at 18x speed using the 1ch × 2 drum configuration of a magnetic tape with the recording format after 21 ,

Embodiment 1

11 FIG. 12 is a block diagram of a recording system in a digital video tape recorder according to the first embodiment of the present invention. In the figure, the reference numeral designates 1 a transport packet input port. A header analysis circuit 10 is used to detect a transport header of a transport packet as well as to capture a header, header and other headers in a bitstream, and to separate intra-frame or field-coded data. A parallel / serial conversion circuit (hereinafter referred to as P / S conversion circuit) 11 is used to perform a parallel to serial conversion on input transport packets to generate a bitstream. A generating circuit 12 for special playback data, extracting a bit stream representing an intra-frame or sub-picture coded picture (which is referred to as an intra-picture) on the basis of from the header analyzing circuit 10 detected header information, and then to produce special playback data to be played back at 4 times or 18 times speed.

A first memory 13 Used for temporary storage via the input terminal 1 received transport packets and to re-segment data according to a sync block format at the time of issue (the details will be described later). A generating circuit 14 for 4 times speed data used by the generating circuit 12 4X speed playback data supplied for special playback data for generating special playback transport packages for 4X speed playback. A generating circuit 15 for data at 18x speed used by the generating circuit 12 18x speed playback data for special playback data to create special playback transport packages for 18x speed playback.

A second memory 16 serves to temporarily store 4 times speed playback data in the form of a transport packet and to re-segment data according to a sync block format at the time of outputting the data. A third store 17 is for temporarily storing reproduction data for 18 times speed supplied in the form of a transport packet, and for re-segmenting data according to a sync block format at the time of outputting the data.

A data compilation device 18 serves to reorder the from the first memory 13 supplied input transport packets and that of the second memory 16 and the third memory 17 in a predetermined synchronous block order (the various types of data are re-divided according to a sync block format in the first memory 13 , second memory 16 and third memory 17 , and then to the data compositor 18 guided). The reference number 19 denotes a fourth memory. A first error correction encoder 20 is for generating error correction codes (hereinafter referred to as C4 check codes) associated with the fourth memory 19 stored record data (hereinafter referred to as record data or digital record data). A fifth store 21 is for storing record data having error correction codes by the first error correction encoder 20 were added. A second error correction encoder 22 serves to add error correction codes (C1 check codes and C2 check codes) to those in the fifth memory 21 stored recording data in a horizontal direction or a vertical direction, which are defined according to the SD standard.

A digital modulator 23 is used to digitally modulate record data from the fifth memory 21 with the added error correction codes. ID information and synchronization information stored in 2 are respectively added to the sync block data when they go to the digital modulator 23 be guided. The reference number 24 denotes one Recording amplifier, and the reference number 25 denotes a rotary drum. A turret 26a is used to record or play data to or from A tracks. A turret 26b is used to record or play back data on or from B tracks. The reference number 27 denotes a magnetic tape.

12 contains a block diagram of the generating circuit 12 for special playback data according to the first embodiment. Herein, elements identical or corresponding to those of the prior art are indicated by the same reference numerals. The reference number 35 denotes an input terminal through which a bitstream representing an intra-frame which is an intra-frame or partial image-coded picture is received. output terminals 36a and 36b are intended for output of 4x speed playback data or 18x speed playback data respectively. A decoder 4 for variable lengths, variable-length decoding on the input intra-images is performed. The reference number 5 denotes a counter. Data extraction circuits 6a and 6b are used to pull out playback data for 4x speed or playback data for 18x speed from the input bitstream of intra data. EOB complement circuits 7a and 7b serve to add block end (EOB) codes to the end of each DCT block.

13 contains a block diagram of the generating circuit 14 for 4 times speed data according to the first embodiment. The generating circuit 14 for 4X speed data and the generating circuit 15 for data at 18x speed have the same circuitry. Therefore, in the first embodiment, a detailed description will be given of the generation circuit 15 dispensed with data at 18x speed. In the figure, the reference numeral designates 40 an input port through which header information representing transport headers, sequence headers, image headers, and the like, as well as additional information including a quantization table composed of the header analyzing circuit 10 come, be received. The reference number 41 denotes an input terminal through which the generating circuit 12 4x speed playback data for special playback data is received. A transport header modifying circuit 42 serves to modify one via the input port 40 supplied transport header and to issue a resulting intent. A supplementary attachment circuit 43 is for adding header information representing sequence headers, picture headers and the like provided by the header analyzing circuit 10 and additional information (including a quantization table) required for decoding 4-times-speed playback data from the generating circuit 12 4x speed playback data sent for special playback data. A packaging circuit 44 is used to perform a serial to parallel conversion of that of the Kopfergänzungsschaltung 43 output bitstream data to generate data in which one byte consists of eight bits, and to form the data portion of each transport packet by collecting data of 184 bytes in length. A transport header supplement circuit 45 is used to add one of the transport attachment modification circuit 42 sent transport header to the data in one of the packaging circuit 44 generated transport package.

14 shows the number of sync blocks that can be played in fast playback mode at different fast playback speeds of one track. Herein, the numerical values denote the respective number of sync blocks which can be reproduced from the reproduction speeds in the special reproduction operation of a track using a 10 μm rotary head (a track pitch is defined as 10 μm in the SD standard). A calculation is made on the assumption that the number of sync blocks on one track (corresponding to 180 angular degrees) 186 and the part of the reproduced signal whose output level exceeds -6 dB is detected as in the prior art example.

15 FIG. 12 shows a track pattern of a four-track interval including the arrangement of the special playback data recording areas according to the first embodiment. FIG. As shown, recording areas for a bit stream (hereinafter referred to as normal reproduction data) and recording areas for special reproduction data and third error correction codes (C4 check codes) are repeated at an interval of four tracks. Each group of four tracks will be referred to as track format below. 16 shows the locations of data in four-track units (data of the format data of a track) on the magnetic tape 27 according to 15 ,

Referring to the 14 to 16 A recording format in the first embodiment will be described. Below are traces on what data through the turret 26a are recorded, referred to as A-tracks, and tracks on which data through the turret 26b recorded are called B tracks. In 15 reference numeral T1 denotes a first track on which data by rotation head 26a of channel A are recorded. T2 indicates a second track on which data through the turret 26b of the channel B are recorded. T3 denotes a third track on which data by the turret 26a of channel A are recorded. T4 denotes a fourth track on which data by the turret 26b of the channel B are recorded. In the first embodiment, data is recorded on the magnetic tape according to the aforementioned pattern of four tracks having the first to fourth tracks; that is a track format. In 15 The signals f0, f1 and f2 written under the tracks indicate kinds of pilot signals recorded on the tracks as reference signals used for tracking control during reproduction. In the first embodiment, the normal playback data, the special playback data, and C4 check codes are recorded in a video area consisting of 135 sync blocks except a C2 check code recording area and VAUX data recording areas.

In 15 Reference numerals A0 to A4 denote the locations of recording areas for playback data at 18x speed on the magnetic tape 27 , Each of the recording areas (A0 to A4) for 18-times speed playback data is five sync blocks long. Five recording areas for playback data for 18 times speed are provided as shown on each A track (T1 or T3). In the drawing, areas provided with the same reference numeral include the same data.

Likewise, reference character BO denotes the location of the 4-times speed reproducing data recording area on the magnetic tape 27 , The 4x speed playback data recording area is 25 sync blocks long and is only on the T2 track. CO to C3 denote the locations of recording areas for the C4 check code on the magnetic tape 27 , Each recording area for the C4 check code is ten sync blocks long and provided on each track.

The number of sync blocks allocated to each data logging area is determined based on the in 14 determined data determined. How out 14 4 × speed, 62 sync blocks of each track can be reproduced in the 4 × speed reproduction mode. In 18x speed playback mode, 10.9 sync blocks from each track can be played back. 15 shows the assignment of data for the respective speeds of the special reproduction on the magnetic tape 27 on the basis of in 14 shown data. Data will be on the magnetic tape 27 recorded by repeatedly recording the in 15 shown track format.

16 shows a recording format in the first embodiment. In the first embodiment, the information in the area BO is used to achieve 4 times speed fast playback. The information in the AO to A4 ranges is used to achieve fast playback at 18x speed. With regard to the area BO, the same particular reproduction data as in 16 is shown repeatedly recorded in two track formats. Regarding each of the areas A0 to A4, the same data is repeatedly recorded in nine track formats. Regarding the area BO, the same data is recorded twice, with eight tracks forming an interval or a period. With respect to each of the areas A0 to A4, the same data is recorded eighteen times, with 36 tracks forming an interval or a period. In the areas A0 to A4 and the areas BO hatched or provided with the same patterns, the same particular reproduction data is recorded.

Next, the operations in a recording system will be described with reference to FIGS 11 to 16 described. On via the input connection 1 The received transport packet becomes the header analyzing circuit 10 and to the first memory 13 guided. The intent analysis circuit 10 first detects a transport header in the input transport packet and then analyzes the input transport header. The intent analysis circuit 10 then separates a program association table (PAT) and a program map table (PMT) from the transport stream and then detects a PID associated with a program to be recorded in a digital video tape recorder.

The intent analysis circuit 10 disconnects a transport packet for transmitting video data of a program to be recorded on the basis of the detected PID number. The information of the transport packet becomes the first memory 13 guided. The intent analysis circuit 10 analyzes the data in the transport package, then separates intentional information such as episodes, image captures, and pane intentions. Based on the header information, the header analyzing circuit disconnects 10 intra-image data from the transport package. Various header information added to the intra-picture (hereinafter referred to as intra-picture or intra-picture data) and additional information added to the header information are also separated.

The sequence header is a bitstream of the Video signal added intent. The header includes information for discriminating between MPEG1 and MPEG2, the image aspect ratio of an image indicating information, the transmission speed of image data indicating information, and the like. The header is a header added to the beginning of each frame or field. The image header indicates the beginning of each frame or field and contains a mode signal representing a coding operation, a quantization table, and the like. In the MPEG2 system, when a frame of data is transmitted, a screen formed by a frame (sub-picture) is segmented into a plurality of slices for data transmission. The disc attachment points to the beginning of each disc. (For the details of intentions, see the concept on the MEPEG2 system).

The header information and associated additional information (eg, a quantization bar) received from the header analysis circuit 10 are disconnected become the P / S conversion circuit 11 , the first store 13 , the generating circuit 12 for special playback data, the generating circuit 14 for 4 times speed data and the generating circuit 15 delivered for data at 18x speed. From the header analysis circuit 10 extracted intra-picture data becomes the P / S conversion circuit 11 delivered.

That of the header analysis circuit 10 detected intra-picture data (hereinafter referred to as intra-frame picture data, in the following description, it is assumed that the intra-picture data has been encoded in a frame unit) become the P / S conversion circuit 11 where parallel-to-serial conversion is performed to generate bit-stream data of one bit. The bit stream data of one bit, which is serial data obtained by the conversion, becomes the generating circuit 12 for special playback data.

Referring to 12 become the operations in the generating circuit 12 for special playback data. MPEG2 compliant image compression is achieved as follows: a discrete cosine transform (hereinafter referred to as DCT) is performed on a video signal in units of a block of eight lines by eight pixels (hereinafter referred to as a DCT block) data that is the DCT (hereinafter referred to as DCT coefficients) are quantized; and then DCT coefficients are sequentially read by performing zigzag scanning, low frequency components of the video signal in which a power spectrum is concentrated, and subjected to run-length coding, wherein the run lengths are "0" coefficients coded (in this way, the video signal is decomposed into run-length data and coefficient data). The data subjected to run-length coding is then subjected to two-dimensional variable-length coding. This leads to a lower transmission speed.

The serial data of an intra-image, which is transmitted via the input port 35 are received, become the decoder 4 for variable lengths and the data extraction circuits 6a and 6b guided. The decoder 4 for variable lengths, variable length decoding on the input bitstream. In the first embodiment, the input bit stream is not perfectly decoded during the variable length decoding, but the run length of a variable length codeword and the code length thereof are detected and supplied. This is intended to reduce the size of the circuit. The counter 5 counts the number of DCT coefficients within each DCT block decoded based on the run lengths and supplies the resulting counts to the data extraction circuits 6a and 6b ,

The data extraction circuit 6a pulls variable length codewords of 4 times speed playback data to be transmitted (to be included) in accordance with the predetermined code amount control information (the number of DCT coefficients to be transmitted) of 4 times speed playback data (in the first embodiment, playback data for 4 times the speed of a signal to be recorded in the BO area, and playback data of 18 times the speed constitute a signal to be recorded in the areas A0 to A4) and that of the counter 5 sent counting results out. An actual data extraction operation is as follows: the number of times from the counter 5 sent DCT coefficient is compared with the code value control information; and then variable length codewords are transmitted until the number of DCT coefficients reaches the codeword control information. A variable length delineation delimiter codeword is based on the decoder 4 detected variable length code length information detected.

The data extraction circuit pulls in the same way 6b Variable length codewords of 18x speed playback data in accordance with codeword control information of 18x speed playback data and from the counter 5 as well as the decoder 4 out information sent for variable length. The EOB supplement circuits 7a and 7b then add an EOB code the end of each DCT block of the extracted data and then provide the resulting data through the output ports 36a and 36b , The beginning of each DCT block is done by the decoder 4 for variable length and to the counter 5 and the data extraction circuits 6a and 6b delivered.

The Number of extracted DCT coefficients may vary Multi-speeds are the same or different. If the number of DCT coefficients to be extracted at the different ones Multi-speed is different, the number of in a transport package for special playback DCT blocks to be recorded at the multi-speed differently. The number of areas in which the particular Playback data can be recorded is limited as before mentioned has been. If the recording areas for special playback data for the respective particular playback speeds from the same Number of sync blocks, when the number of DCT coefficients to be recorded in one DCT block is increasing, a larger number of recording areas for special Playback data required. This leads to a longer update period (hereinafter referred to as refresh cycle) of image data for fast Playback in a fast playback mode. Consistent results in one larger number of DCT coefficients a higher quality the reproduced pictures. In contrast, one leads smaller number of DCT coefficients recorded in a DCT block to a lesser amount of special playback data per frame and a smaller number of recording areas for particular ones Playback, which in turn results in a shorter refresh cycle from image data for Fast playback results. However, because of the smaller number of DCT coefficients deteriorates the reproduction picture quality. The amount of extracted data for Any fast playback speed should be compromised between the refresh cycle and image quality.

The from the generating circuit 12 playback data for 4x speed and 18x speed sent for special playback data are supplied to the generating circuit 14 for data for 4-times speed or the generation circuit 15 for data at 18x speed. The following processing is the same at the different playback speeds (4 times speed and 18 times speed). Here, description will be made as to the generation of reproduction data for 4 times speed. The operations in the generating circuit 14 for data for 4 times speed is referring to 13 described. The generating circuit 14 for 4x speed data, the transport header information and other various header information (including additional information) used by the header analyzer circuit 10 were sent, and the playback data for 4 times the speed of the generating circuit 12 for special playback data to create a transport package for 4X speed playback.

The over the input connection 40 received transport header information becomes the transport header modifying circuit 42 delivered, in which the transport attachment is modified. In particular, the header information indicating the continuity of transport packets in the transport headers added to the intra-frame data carrying transport packets are set in accordance with those of the header analyzing circuit 10 transmitted intra-picture information. The supplementary attachment circuit 43 inserts header information such as those of sequence headers, picture headers, and screen headers, which are provided by the header analysis circuit 10 and information of each header needed for decoding particular reproduction data (for example, a coding mode flag or a quantization table) into a special reproduction bit stream supplied through the input terminal 41 from the generating circuit 12 was received for special playback data.

The particular playback data with the header information added thereto undergoes serial / parallel conversion by the packetization circuit 44 and thus converted into data in which one byte consists of eight bits. The resulting data, in which one byte consists of eight bits, is segmented in units of 184 bytes, thereby forming the data portion of the transport packet. During the serial / parallel conversion, zeros are inserted before each header information so that each header information matches four bytes in accordance with the MPEG2 system. (Each header information is 32 bits long.) For the generation of a transport packet, the header information of a length of four bytes must be matched.) To be more specific, if the header information extends over five bytes (using only a part of the first and the last of the five bytes), zeroes are added before the header information so that the header information fits into four bytes. Transport header information from the transport header modification circuit 42 are added by the packaging circuit 44 Added transport packet data of 184 bytes and output. The intent information is taken from the Transport intent modify circuit 42 in synchronization with one of the packetization circuit 44 sent time signal read. From the generating circuit 14 4x speed playback data generated for 4X speed data becomes the second memory in the form of transport packets 16 delivered.

The above description has been made for the formation of 4 × speed reproduction data in transport packets. Playback data for 18x speed is processed in the same way. The playback data for 18 times speed from the generating circuit 12 for special reproduction data are sent to the generating circuit 15 for data at 18x speed. In the generating circuit 15 for data for 18 times speed adds the header extension circuit 43 Assumptions and additional information corresponding to those of the header analysis circuit 10 sent intent information. The packaging circuit 44 performs a serial / parallel conversion in the same manner as described above to form the data portion of transport packets. The transport header supplement circuit 45 adds from the transport attachment modification circuit 52 sent modified transport headers and then supplies the resulting data to the third memory 17 in the form of transport packages.

The special-issue transport packet data provided by the generating circuit 14 for data for 4 times the speed and the generating circuit 15 for data sent for 18x speed will be in the second memory 16 or third memory 17 saved. The second memory 16 and the third memory 17 store the input data in the form of transport packets in the storage area and form special reproduction data for a frame (field).

The particular reproduction data of a frame is taken from the second memory 16 and the third memory 17 in units of two transport packets for special rendering in response to one of the data composition device 18 sent data request signal and then regrouped into data from five sync blocks and to the data compiler 18 delivered. At this time, headers serving as identification data are added.

Via the input connection 1 received transport packets are in the first memory 13 entered and saved. The entered data will be from the first memory 13 in response to a control signal (data request signal) received from the data compositor 18 was sent. At this time, data entered in units of a transport packet is re-divided into data of five sync blocks in units of two transport packets and then output. In the same manner as the special reproduction data, the header information is added to the sync block data when the sync block data from the first memory 13 to be delivered.

The data assembler 18 sets that from the first store 13 , the second memory 16 and the third memory 17 supplied data according to a recording format together. The procedures for generating the recording format will be described below. The data assembler 18 generates the recording format based on a reference signal of the servo system (including a tape drive control system and a rotary drum control system), which is not shown. In particular, when the reference signal is input, the data composer detects 18 the track number of a track for which a recording format is next determined according to that of one in the data composer 18 provided track number detection counter sent information. The data assembler 18 Also identifies the type of track (which of tracks T1 to T4 is the track in question) to be recorded next, according to track identification information of the track within a track format. When the detection is completed, the counts of the counters are incremented by one.

The data assembler 18 determines the type of special reproduction data and the recording areas therefor according to the result of the identification for the discrimination between the tracks T1 to T4. The number of repetitions of the special reproduction data for each speed is checked, and when the predetermined number of repetitions is reached, the data request signal is output, so that the next particular reproduction data is read out from a memory containing the respective special reproduction data.

More specifically, when 18x speed playback data has been repeatedly recorded eighteen times, a data request signal becomes the third memory 17 sent, so that the next 25 sync blocks are read out from special playback data. The third memory 17 For example, in the data read-out unit, 25 sync blocks of the 18-times-speed playback data are temporarily stored in one 18 18x speed playback memory saved. At this time, the number of times of reproduction data for 18 times speed is reset to "0". Likewise, if four times speed playback data has been recorded twice, a data request signal will be sent to the second memory 16 supplied so that the next 25 sync blocks are output from special playback data. The from the second memory 16 For example, in the data composer, 4 × 4 speed playback data are read out in a 4 × speed playback data memory 18 saved. At this time, the number of repetitions of 4-times speed playback data is reset to "0". If the number of repetitions is not higher than a predetermined value, in the data composer 18 stored special reproduction data is used for each reproduction speed to generate the recording data. At this time, the number of repetitions of special playback data is increased by one.

When the check of the number of repetitions of particular reproduction data is completed, data locations within a track are determined using a track identification signal. When the data locations are designated for one track, bit stream input data in sync block units and the particular playback data formed from the bit stream for the respective speed are extracted from the first memory 13 and the data compositor 18 read. A trace of record data is thus generated and to the fourth store 19 delivered.

The record data of a track received from the data compositor 18 are generated temporarily in the fourth memory 19 saved. Depending on one of the data compositor 18 sent data composition end signal sends the first error correction encoder 20 Data write addresses and write control signals for storing the data for one track in the fourth memory 19 , When the record data for ten tracks in the fourth memory 19 are stored, the first error correcting encoder starts 20 with the generation of C4 check codes. In the first embodiment, data blocks are configured according to the track number information. In particular, traces of the track number 0 to track number 9 are collected to structure a data block.

Next, a description will be given of the construction of a reproducing system in a digital video tape recorder which receives data from the magnetic tape 27 reproduced according to the pre-written recording format. 17 FIG. 12 is a block diagram of a reproducing system in a digital video tape recorder according to the first embodiment. Reference numerals with those in 13 are identical, designate the same or corresponding components. In 17 denotes the reference number 70 a playback amplifier, and 71 denotes a digital demodulator. An ID detector 72 is for detecting an ID signal in the digital playback signal (hereinafter referred to as digital playback signal or digital playback data) that has been digitally demodulated. The reference number 73 denotes a sixth memory. A first error correction decoder 74 is for correcting or detecting errors that have occurred in the digital playback signal, according to the C1 check code and the C2 check code, which are in accordance with the SD standard. The reference number 75 denotes a seventh memory. A second error correction decoder 76 is for correcting or detecting errors that have occurred in the digital playback signal, according to the C4 check code in the normal playback mode. An eighth memory 77 is used to store a digital playback signal for normal playback. A ninth memory 78 is used to store special playback data. A switch 79 is used to select either the output of the eighth memory 77 or the output of the ninth memory 78 according to one of a reproduction system control circuit 80 sent selection signal.

The playback system control circuit 80 serves to inform the first error correction decoder 74 , the second error correction decoder 76 and the switch 79 over that in the digital video tape recorder according to that via the input terminal 81 sent operating mode signal set reproducing operation and for outputting the result of detection of the ID signal before, the ID detector 72 to the first error correction decoder 74 and the second error correction decoder 76 , The reference number 81 denotes an input terminal through which a mode signal is received, and 82 denotes an output terminal.

Embodiment 2

18 Fig. 16 is a block diagram of a recording system in a digital video tape recorder of another embodiment (Embodiment 2) according to the invention. Reference numbers identical to those in 11 are the same or corresponding parts.

A third error correction encoder 118 is for adding a special playback error correction code (hereafter referred to as a C5 check code designated) to respective particular playback data received from the second memory 16 and the third memory 17 are issued. A second data compiler 119 is used to reorder the input transport packets from the first memory 13 and that of the third error correction encoder 118 output data in the predetermined order of sync blocks. An input terminal 120 is used to enter commands and servo information.

An error correction code control circuit 12 is for judging whether the recording operation of the error correction code during recording is a special reproduction error correction code recording mode or normal reproduction error correction recording mode, and outputting a control signal indicating which one of the error correction codes (special reproduction error correction code and normal error correction code Reproduction) in an error correction code recording area, which will be described later, to the third error correction encoder 118 , the second data composer 119 , the second error correction code circuit 123 , a fifth error correction encoder 124 and the digital modulation circuit 23 ,

The reference number 122 denotes a tenth memory, 123 denotes a fourth error correction encoder for adding an error correction code (hereinafter referred to as C4 check code) to normal reproduction data, and 124 denotes a fifth error correction encoder for adding error correction codes in the horizontal (recording) direction (C1 check code) and vertical (vertical) direction (C2 check code) determined by the SD standard to those of the tenth memory 122 output data. The digital modulator 23 applies a digital modulation to that of the fifth error correction encoder 124 output data. ID information and synchronization information become the data of each sync block at the time of input to the digital modulator 23 applied.

The formation of the generating circuit 12 for special reproduction data in the second embodiment 2 is similar to that in FIG 12 . shown

The formation of the generating circuit 14 for data for 4 times the speed and the generating circuit 118 for 18-times speed data in the second embodiment is similar to that in FIG 13 . shown

The 19A to 19C show representations for the arrangement of the turrets for the respective channels. The 19A to 19C show the typical arrangements of the turrets 26a and 26b on the rotary drum 25 according to the SD standard. The system with the turret 26 according to the arrangement 19A or 19B hereinafter referred to as a 9000 rpm system. In the 19A shown turret assembly is represented by "1 ch × 2" in 19B shown turret assembly is represented by "2 ch × 1" and in 19C shown turret assembly is represented by "2 ch × 2". This in 19C shown system with the turret 26 hereinafter referred to as a 4500 RPM system. The following description refers to the in 19A shown system.

In the second embodiment, a bit stream is detected in transport packet units. Two detected transport packets are converted into a record data block (sync block format) composed of five sync blocks. In a first header, identification data is recorded which is a sync block number of the sync block of the five sync blocks (data areas within a sync block are composed of 77 bytes of data, as in FIG 2 shown). In a second header, identification data is recorded which indicates whether the related data is video data or audio data and the like. The sync byte added to the head of each transport header need not be recorded. It is assumed in connection with the second embodiment that all data is recorded within the transport packet.

The number of sync blocks that can be reproduced from a track at different speeds for fast playback in fast playback mode is 14B shown.

20 FIG. 12 shows a track pattern of a period of four tracks including the arrangement of the special reproduction data according to the second embodiment. FIG. As shown, recording areas for special reproduction data and recording areas for error correction codes in the tracks are repeated in an interval of four tracks. The four tracks are hereinafter referred to as a track format. 21 FIG. 12 shows the arrangement of the data at an interval of four tracks (data of a track format) according to FIG 20 on the magnetic tape.

With reference to the 14B . 20 and 21 A recording format in the second embodiment will be described. Below are traces in which data through the turret 26a recorded as A tracks be records, and traces, in which data through the turret 26b recorded are called B tracks. In 20 reference numeral T1 denotes a first track in which data is transmitted through the rotary head 26a of channel A are recorded. T2 indicates a second track in which data passes through the turret 26b of the channel B are recorded. T3 denotes a third track, in which data by the turret 26a of channel A are recorded. T4 denotes a fourth track in which data passes through the turret 26b of the channel B are recorded. In the second embodiment, data is recorded on the magnetic tape according to the above-described pattern of four tracks from the first to fourth tracks, that is, in a track format. In 20 The items f0, f1 and f2 written under the tracks indicate kinds of pilot signals recorded in the tracks as reference signals used for tracking control during reproduction. In the second embodiment, the normal playback data, the special playback data, and C4 check codes are recorded in a video area consisting of 135 sync blocks except for a C2 check code recording area and VAUX data recording areas. In 20 For example, the video area of 135 sync blocks except for the C2 check code recording area and the VAUX data recording area is shown in the video area.

In 20 A0 to A4 denote the locations of the recording areas for the playback data for 18-times speed on the magnetic tape. The width of each of the 18x speed playback data areas (A0 to A4) is five sync blocks, and the 18x speed playback data areas are located at five locations on each of the A (T1 and T3) tracks as shown is. The areas with identical fiducials are used to record identical data.

In in the same way, B0 denotes the location of the recording area for playback data for 4 times Speed on the magnetic tape. The width of the recording area for playback data for 4 times Speed is 25 sync blocks. The recording area for Playback data for 4 times the speed is in one place on the track T2, as shown.

In in the same way, D0 to D5 denote the location of the recording areas for error correction codes on the magnetic tape. The width of each of the error correction code recording areas (DO to D5) five syn chron blocks. Of the Recording area of D1 is adjacent to the recording area for data with 4 times speed intended. The area of D4 is at the same height (position in the longitudinal direction the track) as the recording area of D1.

The number of sync blocks assigned to each data record area is determined by the number of sync blocks assigned to each data record area 14B determined data determined. That means it's over 14B It can be seen that in a 9000 rpm system, 62 sync blocks can be obtained from one track during 4 times speed playback. During playback at 18x speed, 10.9 sync blocks can be obtained from one track. On this basis, the data arrangement on the magnetic tape for the respective speeds in particular reproduction as in 20 shown.

The entered transport packets are recorded in the video area, the outside of Recording areas for special playback (AO to A4, BO), the recording areas for error correction codes (DO to D5) and the C2 check code and VAUX recording areas (the area will become referred to as the main area).

The A method of recording error correction codes according to this Embodiment is next described. As in connection with the example according to the state of Technology was explained, a data compression is applied to the ATV signal, where a compaction method based on the motion-compensated prediction is used. Therefore, if an error in the playback data is detected, the mistake over spread several partial or full pictures and the resulting Image can not be accepted. When the digital video tape recorder according to the SD standard as a storage medium for storing data or programs for computers or the like, it is desirable to have a strong error correction capability to recover data that is not playing were due to failures, which by scratches on the tape or attached to the magnetic tape Dust occur.

at Fast playback uses error correction of the C1 check code applied to the playback data alone, as in conjunction with Example has been described in the prior art, so that the error occurrence frequency is high, and the playback picture during special playback is not acceptable.

The amount of added data that can be recorded on the magnetic tape is limited, as also described in connection with the prior art example. According to the second embodiment, therefore, the limited data areas become effective to exploit the areas to which the error correction code is added on the rotary heads 26a and 26b sampled tracks, and where the user considers image quality to be important during normal playback, the data is generated so that the error correction code is added to the normal playback data, and where the user considers the picture quality to be important during the particular playback, the Data so as to testify that the error correction code is added to the special reproduction data.

On this way you can the limited data logging areas are effectively exploited and the error correction code can be added to the desired data. When the digital video tape recorder as a storage medium for computer or the like, an identical recording format may be used to form an effective error correction code. (The error correction code for normal Playback is written to the error correction code recording areas).

The data recorded in the error correction code recording area will next be described in consideration of the above. As in 20 is shown, the error correction code recording areas are provided at six locations in a track format, and each consists of five sync blocks. In the operation for recording the error correction code (hereinafter referred to as C4 check code) for normal playback data, the C4 check code is recorded at the six locations.

In the operation for recording the error correction code (hereinafter as C5 check code designated) for special playback data becomes the C5 check code for playback data for 18x Speed recorded in the areas DO and D3, and the C5-check code for playback data 4 times Speed is recorded in the Dl area. Data of a predetermined Values, for example, a predetermined fixed value (for example, a total of "0") are in the areas D2, D4 and D5 recorded. When normal playback is done from the magnetic tape, on which recorded an error correction code for special playback is, is it possible because the data in areas D2, D4 and D5 have a fixed value, the error correction capability of the C2 code in error correction decoding during normal playback to improve (with respect to the aforementioned symbols in the C2 decoding the predetermined fixed value is recorded so that it is possible to realize that no Error is present, and the error correction capability can be improved).

The method of forming the C4 check code and the C5 check code will be described later. The switching of the error correction code recorded in the error correction code recording area is made on the basis of the error correction code control circuit 121 outputted error correction code recording operation signal.

The data in the 4-times-speed playback data recording area (B0) may be from one track during one scan of the rotary head 26b play back at 4x speed during playback. The data in the areas A0 to A4 for 18 times speed and the recording area DO (or D3) for error correction codes, that is, these six areas, can be of six tracks during one scan of the rotary head 26a playback at 18x speed.

If the one recorded in the error correction code recording area Error correction code is the C5 check code, the recording area is used to correct the error to the particular playback data during the special playback apply. If it is the C4 check code is, he will be during the special rendition is not considered. During the normal reproduction, if recorded in the aforementioned area Error correction code is the C4 check code, the error correction code is used to error correction apply to the digital playback data. If it is the C5 check code, will the data during not taken into account during normal playback. Details of Method for forming the error correction code for the normal one Playback and special playback will be described later.

Details of the playback system will also be described later. However, according to the data arrangement, keys in a track format (recording format) according to 20 the turrets 26a and 26b the ITI areas and the subcode areas on the magnetic tape during 4X speed playback and 18x speed playback. That is, during the special reproduction, tracking control is achieved by using the pilot signals f0, f1, and f2 read from the ITI areas, and the additional information such as time information and music piece number information recorded in the subcode area is reproduced.

By repeating the in 20 The tracking information recorded on the magnetic tape is recorded on the magnetic tape. 21 shows the recording format on the magnetic tape. In the figure, the 4X speed playback data (recorded in the BO area) is recorded twice (please refer 21 ), and the 18x speed playback data is recorded nine times. That is, identical reproduction data for 18 times speed is recorded on two tracks within one track format (four tracks), so that a total of identical data is recorded eighteen times. (The special playback data for 18x speed is switched at intervals of 36 tracks.) In 21 For example, the areas with identical fiducial markers are used to record identical data.

In 21 For example, special reproduction data to which an error correction code has been attached is recorded in the error correction code recording area. With reference to the 18x speed playback data, a1, a2, a3, a4 and a5 (a6, a7, a8, a9 and a10) are used to generate the C5 check code. The generated C5 check code is recorded in the range d18,1 (d18,2). That is, data of a1, a2, a3, a4, a5 and d18,1 constitute an error correction block for reproduction data for 18 times speed. Likewise, the data of a6, a7, a8, a9, a10 and d18,2 form an error correction block for 18x speed playback.

With Regarding the playback data for 4 times the speed, the data in the recording area for playback data for 4 times speed and in the error correction code recording area adjacent to the 4x speed playback data recording area is provided, used to an error correction block for playback data for 4 times To make speed. In particular, b1 and d4,1 or b2 and d4,2 or b5 and d4,5 is used to form an error correction block for playback data for 4 times To make speed. Data of a fixed value will be in the indicated by d0,0 recorded in the operation for Record an error correction code for special playback. In the operation for recording an error correction code for normal reproduction becomes the C4 check code recorded in the error correction code recording areas (D0 to D5).

Next, referring to the 22A to 22G . 23 and 24 to describe the code configuration of the error correction code used in normal reproduction and special reproduction. First, the code configuration of the error correction code (C4 check code) for normal reproduction will be described. In the fourth embodiment, data from ten tracks are collected and the collected data is interleaved to generate the C4 check code. (245, 230, 16) Reed-Solomon code is used as the C4 check code. An example of interleaving will next be described with reference to FIGS 22A to 22G and 23 ,

The 22A to 22G FIG. 10 are diagrams for explaining the method of forming the two-track data blocks for forming the error correction code added to the normal reproduction data according to this embodiment. 22A and 22B show a specific example of the arrangement of the ATV data, the special playback data, and the error correction code of the (C4 check code or C5 check code) on A and B tracks. In the drawing, "A" and "B" indicate data of A and B tracks, respectively. In the second embodiment, to effect interleaving over ten tracks, first, adjacent tracks (the tracks T1 and T2 or the tracks T3 and T4 form a pair) are used to form a two-track data block of 245 sync blocks (see 22G ).

The process of forming a two-track data block of 245 sync blocks will be described next. When 245 sync blocks are created, the 18x speed playback data recorded on the A tracks will be removed. The reason for this is the following. The error correction code applied to the SD standard is made up of elements of the Galois field defined by GF (2 ⁸ ). Accordingly, the maximum code length of the Reed-Solomon code defined by the elements of the Galois field is 255. If all the data on two tracks were used, the code length would be 270 and the error correction code could not be formed. According to this embodiment, the 18-speed playback data is removed to form the two-track normal playback data block. With respect to the 4 × speed playback data, data is recorded only on the track T2 as in 20 is shown, so that the error correction code is added for normal playback. This is to avoid a larger circuit for the identification of T2 and T4 as well as the formation of the two-track data block. In the second embodiment, the 4-times speed playback data is treated in the same way as normal playback data to reduce the size of the circuit. When the 4-speed playback data is removed, it is necessary to make A and B tracks. In the second embodiment, to effect interleaving over ten tracks, first, adjacent tracks (the tracks T1 and T2 or the tracks T3 and T4 form a pair) are used to form a two-track data block of 245 sync blocks (see 22G ).

The process of forming a two track data block of 245 sync blocks will be described next. When 245 sync blocks are created, the 18x speed playback data recorded on the A tracks will be removed. The reason for this is the following. The error correction code applied to the SD standard is made up of elements of the Galois field defined by GF (2 ⁸ ). Accordingly, the maximum code length of the Reed-Solomon code defined by the elements of the Galois field is 255. If all the data on two tracks were used, the code length would be 270 and the error correction code could not be formed. According to this embodiment, the 18-speed playback data is removed to form the two-track normal playback data block. With respect to the 4 × speed playback data, data is recorded only on the track T2 as in 20 is shown, so that the error correction code is added for normal playback. This is to avoid a larger circuit for the identification of T2 and T4 as well as the formation of the two-track data block. In the second embodiment, the 4-times speed playback data is treated in the same way as normal playback data to reduce the size of the circuit. When the 4-speed speed reproduction data is removed, it is necessary to form two two-track data blocks using the data of four tracks when the two-track data block described later is formed, so that the control is complicated and the circuit is enlarged.

at the digital video tape recorder according to the SD standard, when the frame rate is 60 Hz, one frame of the digital one Video signal recorded on ten tracks. The track number becomes in the ID signal in sequence from the head of the ten tracks for recording added to the data of a full screen. In particular, a added identical number to a pair of A and B tracks, so that track numbers No. 0 to No. 4 added become. In the US amounts to the frame rate 30 Hz, so that in the digital video tape recorder after the SD standard track numbers be added in the manner described above. In the second embodiment is a nesting over 10 tracks and the C4 check code can be added to the data without adding additional Information. When the second embodiment in the PAL / SECAM zone As is used in Europe, where the frame rate is 25 Hz, the Data of one frame recorded on 12 tracks, so that track numbers 0 to 5 added become. The nesting is therefore at an interval of twelve tracks causes.

When the elements of the Galois field for the error correction code in GF (2 ⁹ ) are changed, the generation polynomial for generating the error correction code and the bit width of a symbol change so that they do not coexist with the error correction code circuit (eg, multiplier, divider, a Galois field) according to the SD standard, and the bit width of a symbol increases, so that the circuit is increased. Accordingly, in the second embodiment, a (245, 230, 16) ReedSolomon code is used as the C4 check code, as described above. During generation of the normal playback error correction code, the 18x speed playback data is removed to form a two track data block of 245 sync blocks. With respect to the 4 × speed playback data, although not used during normal playback, this area is present only on the track T2, and if this area were removed, it would be necessary to allocate the two blocks of four tracks and the track period for generating the C4 check code would be twenty tracks, so that the circuit would be increased. Therefore, according to the second embodiment, the 4-times speed reproduction data is used for generating the normal-time error correction code. In the second embodiment, the depth of interleaving is ten tracks.

The method of forming the error correction code according to the second embodiment will next be described taking the above explanations into consideration. First, the method of forming a two-track data block of 245 sync blocks with reference to FIGS 22A to 22G described. In 22A First, the areas [13] to [17] for 18-times-speed playback data are removed, as described above. The error correction code recording area [10] is also removed from the data area at the time of generation of the C4 check code. 22C shows that the normal playback data has been extracted on the A track. 22B shows the arrangement of the ATV data, special reproduction data and the error correction code data on the B tracks. The area [8] is a recording area for 4-times speed playback data on the track T2, but a normal playback data recording area on the track T4.

In the second embodiment, when a two-track data block of 245 sync blocks is generated, a group of data from the area [7] and the area [9] not belonging to the area [8] (see FIG 22D ), and a group of data from the area [8] (see 22E ) generated. The data from the recording areas [10], [11] and [12] for error correction codes on A and B tracks are collected to obtain an in 22F form a group of data shown.

The in the 22C . 22D and 22E shown groups of data formed in the manner described above are respectively divided into 21, 20 and 5 blocks, each consisting of five sync blocks. The data consisting of five sync blocks are re-arranged so that the data of the in 22E shown - B'1 blocks are on the head and the in 22C and 22D are shown alternately, as in the order of A1, B1, A2, B2, ... in the area Gcd. After the data 21, data B'2, B'3, B'4 and B'5 are arranged, and then the recording areas [11], [10] and [12] for error correction codes are arranged in sequence, as in FIG 22G is shown to form a two-track data block of 245 sync blocks. Areas with identical reference marks in the drawings indicate identical areas. For example, the range [l] in 22A and the 22 area [l] in 22C identical. The reference numbers "0" and "76" which represent the position in the horizontal direction in 22G indicate positions (addresses) of the data within the sync block, and reference numerals "0" and "244" indicating the position in the vertical direction in FIG 22G indicate sync block addresses within the two-track data block of 245 sync blocks.

Five two-track data blocks each consisting of 245 sync blocks formed in the above-described manner are collected, and interleaving over ten tracks is applied to the normal reproduction data to generate the C4 check code. It will be up next 23 Reference is made to describe the pattern of interleaving used to generate the C4 check code.

23 Fig. 12 is a diagram for explaining the method of interleaving five blocks which is applied to the data when the error correction code is added to the normal reproduction data according to this embodiment. If the data with the block number of in 22G shown two-line data block represented by Bn (0 ≤ Bn ≤ 4), the sync block number of the sync block within the two-track data block represented by SBn (0 ≤ SBn ≤ 244) and the data number of the data within the sync block represented by Dn (0 ≤ Dn ≤ 76) are defined as D [Bn, SBn, Dn], then according to an embodiment for shifting according to FIG 23 ,
(D [0, 0, 0] D [1, 1, 1], D [2, 2, 2], ..., D [i mod 5), i, (i mod 77)], ... , D [4, 229, 75], D [0, 230, 76], D [1, 231, 0], ..., D [4, 244, 13]).

Here, the 230 bytes from D [0, 0, 0] to D [4, 229, 75] are information symbols, and 15 bytes from D [O, 230, 7 6] to D [4, 244, 13] are C4 -Prüfcode. 23 schematically illustrates the shift. The interleaving takes place in the direction of the catenary lines and the interleaving of five two-track data blocks is effected. (In fact, an interleave of ten tracks is used because the two-track data blocks as in 22G are shown.) The dashed lines show the direction of interleaving within the two track data block. (One data item is scanned every five two-track blocks of data because nesting occurs at an interval of five two-track blocks.)

This process is effected for all data within the sync block at the head of each two-track data block. That is, when the C4 check code is formed starting with the kth data counted from the sync block at the head of the jth two-track data block, the result is
(D [j, 0, k] f D [(j + 1 mod 5), 1, (k + 1 mod 77)], ..., D [(j + i mod 5), i (k + i mod 77)], ..., D [(j + 229 mod 5) 229, (k + 229 mod 77)], D [(j + 230 mod 5), 230, (k + 230 mod 77),. .., D [(j + 244 mod 5), 244, (k + 244 mod 77)].

By changing k from 0 to 76 per two-track data block and applying this measure to five two-track data blocks (by varying j from 0 to 4), interleaving is achieved to generate the C4 check code. In 23 and in the above expression, (X mod Y) represents the residue obtained when an integer number X is divided by an integer number Y. The data for which the C4 check code was generated by interleaving is stored in the predetermined, in 22A and 22B recorded areas.

If the operation to add of the error correction code, an operation for recording the error correction code for special Is playback data, the C5 check code becomes in the recording area for error correction codes recorded, and the C4 check code ignored.

Next, the burst error correction capability of the C4 check code will be described. For the in 22G The interleaving with a depth of five two-track data blocks is applied as shown in the two-track data block of 245 sync blocks shown in FIG 23 is shown. Since the minimum Hamming distance of the C4 check code is 16, up to 15 deletions can be corrected. Because nesting is applied to a depth of five two-track data blocks, as in 22G is shown, the maximum burst error correction factor 15 × 5 = 75 synchronous blocks. Accordingly, in the case of A tracks, since no C4 check code is added to the 18x speed playback data area, a maximum burst error correction capability is 75 + 20 (= 95) synchronous blocks. Likewise, for data on B tracks, a maximum burst error correction capability is 75 sync blocks. With respect to tracks T2, four times speed playback data are recorded twice, so that in case of occurrence of burst errors with the data in the above area, identical 4 times speed data recorded on a different track (another track as the one on which a burst error has occurred), the maximum burst error correction capability is 75 + 25 (= 100) synchronous blocks. It is therefore possible to recover data by means of the C4 check code even if 75 sync blocks of data are not reproduced due to failures during normal reproduction.

The following is a description of the formation of the error correction code added to the particular reproduction data, with reference to FIG 24 , 24 shows the formation of the error correction code (C5 check code) added to the special reproduction data. (In the 24 The data configuration shown below will be referred to as the error correction block.) A (30, 25, 6) Reed-Solomon code is used as the C5 check code. 22A Fig. 14 shows the arrangement of the playback data for 18x speed and the error correction code recorded on the A track. In the 24 The data of the error correction block shown are divided into parts, each consisting of five sync blocks and in the in 22A recorded areas [13] to [17] are recorded. The C5 check code is recorded in the range [10].

The 4-speed playback data recorded on B tracks in the special reproduction area (area [8]) of 25 each Synchronblökken recorded.

In the second embodiment, interleaving with the depth of the data of ten tracks is applied to generate the C4 check code as described above. During such an operation, the first memory is converted 13 , the second memory 16 and the third memory 17 via the input connection 1 entered transport packages in block units. Using the 4X speed playback data provided by the third error correction encoder 118 and the ATV signal coming from the first memory 13 is output, and obtained by conversion into sync block units, a data block of 245 sync blocks is acquired in accordance with 22G generated by the second data composer 119 , The 18x speed playback data provided by the third error correction encoder 118 and the C5 check code added to the particular reproduction data for the respective reproduction speeds become at predetermined addresses in a memory within the second data composer 119 saved.

The one in the second data composer 119 formed two-track data block of 245 sync blocks is at a predetermined address in the tenth memory 122 saved. The 18x speed playback data and the C5 check code added to the particular playback data for the respective playback speeds stored in the memory in the second data composer 119 are also saved from the second data composer 119 at the same time as the two-track data block and at predetermined addresses in the tenth memory 122 saved.

The operation of the recording system will next be described with reference to FIGS 18 to 24 described. The over the input connection 1 entered transport packets are in the first memory 13 and the header analyzing circuit 10 entered. The intent analysis circuit 10 detects the transport header in the entered transport packets and separates the transport packets transmitting the video data. It then analyzes the data within the transport packets that transmitted and disconnected the video data, and captures header information such as a header, a header and a pane header, and separates intra-images from the transport packets. The above header information and additional information added to the header information are also separated.

Of the Sequence header is one provided in the bitstream of the video signal Intent information and contains the identification of MPEG1 or MPEG2. The picture header becomes too added to the head of each full or partial image and indicates the beginning of the full or partial image and contains a mode signal indicating the coding operation or the like displays. In MPEG2, when a frame (field) of data is transmitted is, one frame (field) divided into several slices. The disc attachment indicates the beginning of the disc. Details of the respective intentions are in the concept for MPEG2, to which reference is hereby made.

The header information and the additional information attached to it (eg, quantization table information) as well as intra-frame information acquired by the intent analysis shell tung 10 Were detected, become the P / S converter circuit 11 , the generating circuit 14 for data for 4 times the speed and the generating circuit 15 delivered for data at 18x speed.

The P / S converter circuit 11 applies a P / S conversion to the data of the input transport packets to obtain one bit bit stream data. The transport packet data converted into one-bit serial data is put into the generating circuit 12 entered for special playback data. The operation of the generating circuit 12 for special playback data is similar to that with respect to 12 has been described in connection with the first embodiment.

The operation of the error correction code control circuit 121 will be described next. According to the via the input terminal 120 input command information is the error correction code control circuit 121 a signal indicating the error correction code recording mode (special reproduction error correction code recording mode or normal reproduction error correction code recording mode) to the third error correction type encoder 118 , the second data composer 119 , the fourth error correction encoder 123 , the fifth error correction encoder 124 and the digital modulator 23 out. It also outputs a track identification signal of a four-track period and a track identification signal of a ten-track period on the basis of the servo information output from the tape travel control and drum rotation control systems. In the second embodiment, the switching of the error correction code by the output of the tenth memory 122 causes.

The special-issue transport packet data provided by the generating circuit 14 for data for 4 times speed and from the generating circuit 15 for data output at 18x speed are stored in the second memory 16 and the third memory 17 saved. The second memory 16 and the third memory 17 store the input data in the form of transport packets and form the special reproduction data of a frame (field). One in the second memory 16 and the third memory 17 formed frame of special reproduction data is read from the respective memory, transport packet for transport packet, and converted into data of five sync blocks and to the third error correction encoder 118 output. Reading from the second and third memories 16 and 17 is effected on the basis of the third error correction encoder 118 output control signal. The identification header information becomes the input to the third error correction encoder at the time of the input 118 added.

The third error correction encoder 118 Collects 25 sync blocks of the special reproduction data corresponding to each reproduction speed converted into sync blocks and forms an error correction block. The C5 check code is then generated for and added to the 4x speed playback data and the 18x speed playback data respectively. The 4 × speed playback data and the 18 × speed playback data to which the C5 check code has been added become the second data composer 119 entered. The formation of the C5 check code is effected based on that of the second data composer 119 output control signal (data request signal).

The over the input connection 1 entered ATV signal transport packets are in the first memory 13 entered and stored in this. The ones in the first store 13 stored data is based on that of the second data composer 119 read control signal read. Two transport packets of the data entered in transport units are converted into five synchronous blocks of data and output.

On the basis of the lane identification signals for four lanes and ten lanes generated by the error correction code control circuit 121 the second data composer forms 119 the two-track data block of 245 sync blocks according to 22G , The number of repetitions of the special reproduction data is counted by an internal counter, and a data request signal for the special reproduction data becomes the third error correction encoder 118 delivered. The second data compiler 119 first reads the normal playback data for two tracks from the first memory 13 , The from the first memory 13 read data are in one in the second data composer 119 stored memory stored. In the same way, the special playback data and the C5 check code that are generated by the third error correction encoder 118 also in one in the second data composer 119 stored memory stored. The in the second data composer 119 stored data is re-ordered, and a two-track data block of 245 sync blocks according to 22G is formed and to the tenth store 122 output. The switching between the 4-speed playback data and the normal playback data on the B track becomes within the second data composer 119 causes use track information of four tracks. The 18x speed playback data and the special playback data C5 check code are from the second data composer 119 to the tenth store 122 following the two-track data block of 245 sync blocks.

The second data compiler 119 output data are at predetermined addresses of the tenth memory 122 written. The write addresses and the control signal for the tenth memory 122 are from the fourth error correction encoder 123 delivered.

The operation for generating the C4 check code will be described next. If the configuration of the five two-track data blocks in the tenth memory 122 is finished, gives the fourth error correction encoder 123 the read address for reading the data for the generation of the C4 check code and the control signal for the tenth memory 122 out. According to this control signal, data from the tenth memory 122 read. (The read data will be as in 40 shown nested. That is, interleaving is applied to that of the fourth error correction encoder 123 output read addresses.) The fourth error correction encoder 123 generates the C4 check code based on the tenth memory 122 read data. That of the fourth error correction encoder 123 The generated C4 check code is stored in the C4 check code storage area within the tenth memory 122 saved. When the C4 check code for the five two-track data blocks is generated, those in the tenth memory become 122 stored data to the fifth error correction encoder 124 output.

Reading the data from the tenth memory 122 is effected on the basis of the read addresses and the control signal supplied by the fifth error correction encoder 124 were issued. The fifth error correction encoder 124 read those in the tenth store 122 stored data based on the mode signal and the track identification signal supplied by the error correction code control circuit 121 with the sync blocks in the in 22A and 22B be reassigned sequence shown. The selection between the C4 check code and the C5 check code is effected by switching between the read addresses (C4 check code read address and C5 check code read address) received from the fifth error correction encoder 124 to that from the error correction code control circuit 121 issued operating mode signal are output. According to the second embodiment, in the case of the special reproduction error correction code recording operation, when the C5 check code is out of the tenth memory 122 read, fixed data values in D2, D4 and D5 in 20 recorded. This is accomplished by previously storing the fixed data values at the predetermined address in the tenth memory 122 ,

The from the tenth memory 122 read data is in a memory within the fifth error correction coder 124 stored in track units. When a track of data is formed, the fifth error correction encoder adds the error correction code corresponding to the one in FIG 1A and 1B shown SD standard to the aforementioned data. That is, for the aforementioned data recorded in the video area, a C2 check code is first generated and added to track units. For the data with the added C2 check code, a C1 check code is next generated and added. With respect to audio ranges, a C3 check code and a C1 check code are added in the same way. In the second embodiment, the audio data areas are not used and filled with dummy data of a fixed value to allow for modification or adaptation which might be required in the format for the future. The data with the error correction code added in accordance with the SD specification becomes at predetermined time points in tracking units from the fifth error correction encoder 124 read. At this time, a track format according to the SD standard is generated. Specifically, a gap of five bytes is provided for adding a synchronization signal, and an ID signal between adjacent sync blocks and a gap and the like of a predetermined size are provided for the ITI area, the subcode area and between data, and the aforementioned data then spent. The output of the fifth error correction coder 124 will be in the digital modulator 23 entered.

The digital modulator 23 first add the sync signal and the ID signal to each sync block. At this time, a flag information indicating the type of the error correction code is inserted in the ID signal with reference to the sync blocks recorded in the error correction code recording areas. During playback, the flag in the ID signal is used to identify the type of error correction code. The data with the added ID signal is subjected to the digital modulation and the recording amplifier 24 strengthened and by means of the turning heads 26a and 26b recorded on the magnetic tape.

Next, the description will be given of the construction of the reproducing system of the digital video tape recorder for reproducing the Magnetic tape with the above-described recording format. 25 FIG. 12 is a block diagram of the reproducing system in the digital video tape recorder according to this embodiment. In the figure, a third error correction decoder is used 152 for correcting and detecting errors in the reproduced signals using the C1 check code and the C2 check code. The third error correction decoder 152 detects the ID signal in the reproduction signal and supplies it to a later-described error correction decoding control circuit 154 out.

An input terminal 153 Used to input the mode signal (normal playback or special playback) indicating the type of playback performed. The error correction decoding control circuit 154 responds to the ID signal and the playback mode signal supplied by the third error correction decoder 152 for outputting a control signal for switching between the special reproduction error correction decoding process and the normal reproduction error correction decoding process, to a fourth error correction decoder 156 and a fifth error correction decoder 157 , and also for outputting a switching signal for a switch 159 , The error correction decoding control circuit 154 also detects the track number information, sync block address information, information about the type of the error correction code recorded in the error correction code recording area. 155 denotes an eleventh memory for storing the normal reproduction data. The fourth error correction decoder 156 receives the control signal (the result of the ID information and that in the third error correction decoder 152 detected reproducing mode signal) supplied from the error correction decoding control circuit 154 is output, and when the C4 check code is recorded in the aforementioned error correction code recording area, it performs error correction decoding using the C4 check code to that in the eleventh memory 155 stored data and corrects the detected errors in the playback signal. The fifth error correction decoder 157 receives this from the error correction decode control circuit 154 output control signal, and when the C5 check code is recorded in the aforementioned error correction code recording area, applies the error correction decoding to the playback data using the C5 check code. A twelfth memory 158 serves to store the from the fifth error correction decoder 157 output special playback data. The reference number 160 denotes an output terminal.

Before explaining the operation of the reproducing system, the operation of the 4X-speed, 18X-speed reproduction in the digital video tape recorder according to the second embodiment will be described with reference to Figs 26 and 27 described. 26 Fig. 16 shows the relationship between the track pattern and the scanning tracks of the rotary heads, which result when a 4 × speed reproduction with a 1 × 2 drum configuration from a magnetic tape with that in Figs 21 shown recording format is effected. In the figure, the scanning tracks denoted by A are those of a rotary head 26a of an A-channel. In the same way, the scanning tracks denoted by B are those of a rotary head 26b a B-channel. As described above, 4-speed playback data is recorded on B tracks, and identical data is repeatedly recorded for two track format periods (identical data is recorded in two recording areas). Accordingly, as in 26 shown is each of the turrets 26a and 26b the sampling periods of the turrets 26a and 26b off, so that through the 8-channel turret 26b recorded playback data for 4x speed. At the same time, the turrets can 26a and 26b Play data from the subcode area as in 26 is shown. Tracking is achieved in the ITI area. Details of 4x speed playback using a digital video tape recorder with a 2ch x 1 drum configuration are omitted, but soon the turret will be felt 26a the left side of the turret 26b at the 1 ch × 2 drum configuration (in 26 are the scanning tracks of the turret 26a on the left side of the scanning lanes of the turret 26b and adjacent to these), and it is therefore possible to pass through the B-channel turret 26b 4x speed recorded special playback data.

27 FIG. 16 shows the relationship between the track pattern and the scanning tracks of the rotary heads, which result when an 18-times-speed reproduction with a 1 × 2 drum configuration from a magnetic tape with that in FIG 21 shown recording format is effected. In the figure, scanning marks designated by A are those by the rotary head 26a of an A-channel. In the same way, the scanning tracks denoted by B are those of a rotary head 26b a B-channel. As described above, the playback data for 18 times speed is recorded on A tracks, and identical data is repeatedly recorded for nine track formats (identical data is recorded at 18 locations). Accordingly, as described in connection with the example of the prior art that was through the A-channel turret 26a recorded playback data for 18x speed. (As in 27 is shown, the playback data for 18-times speed through the A-channel rotary head 26a can be played back.) At the same time, the turret 26a play the signal from the subcode area. In addition, since the ITI area is scanned, it is also possible to achieve tracking in the ITI area. Details of 18x speed playback using a digital video tape recorder with a 2ch x 1 drum configuration are omitted as in 4x speed playback, but soon the turret will be felt 26b the right side of the turret 26a at the 1 ch × 2 drum configuration (in 27 are the scanning tracks of the turret 26b on the right side of the scanning lanes of the turret 26a and adjacent to these), and it is therefore possible that through the A-channel turret 26a play back recorded special playback data for 18x speed.

The amount of data that can be played back by one track during 4x speed playback and 18x speed playback is as in 14B shown. That is, in a 9000 RPM system, there are 62 sync blocks at 4x speed and 10.9 sync blocks at 18x speed. The positions on the tracks from which the data is reproduced at 2 × speed and 16 × speed are identical to those for 4 × speed and 18 × speed, so that the playback at 2 × speed and playback at 16x speed with the in 21 shown recording format can be realized. Details of the reproduction of a magnetic tape having the aforementioned recording format in a 4500 rpm system are omitted, but soon the fast reproduction can be realized by setting the speed at 2 times (93 sync blocks) and 8 times (13 sync blocks). During the fast playback, apart from the special playback data, it is possible to reproduce the error correction code recording area (4-speed playback data) or the error correction code recording area (18-speed speed playback data) provided separately on the track. During normal playback, the turrets give 26a and 26b from all tracks again. The aforementioned error correction code recording area can be reproduced during fast playback (4 times speed, 18 times speed, 2 times speed and 16 times speed), and during normal playback, the same recording area can be divided. (That is, whichever of the error correction codes is added, the error correction code recording area can be reproduced during fast playback and normal playback.)

According to the above description, the tracking is achieved during the fast reproduction in the ITI area. The invention is not limited to such an arrangement. For example, in the 18x speed reproduction, the tracking phase at one of the special reproduction data recording areas can be detected and used for the control. The tracking phase may alternatively be detected at multiple recording areas for particular playback data and used for the control. With respect to the 4 × speed reproduction, the tracking phase may be performed by the rotary head on an adjacent A track 26a detected and used for the control. Further, coarse adjustment of the tracking phase may be effected at the ITI area, and fine adjustment may be effected at the special reproduction area. The aforesaid tracking control method is effective when there is a track nonlinearity in reproduction with a compatible device.

The operation of the normal reproduction of the reproducing system will be described next. The over the turrets 26a and 26b on the drum 25 Data reproduced from the magnetic tape is reproduced by the reproducing amplifier 70 amplified and into the digital demodulator 71 entered. The digital demodulator 71 acquires data from the input playback data, converts to digital playback data, and performs digital demodulation. The digital demodulation in the digital demodulator 71 obtained digital playback data are in the third error correction decoder 152 entered. When the digital playback data is input, the third error correction decoder disconnects 152 the ID signal attached to the head of each sync block and outputs the result of the separation to the error correction decode control circuit 154 out. The digital reproduction data from which the ID signal has been separated becomes the third error correction decoder 152 in which the correction and detection of errors occurring during the reproduction are effected by using the C1 check code and the C2 check code. The digital playback data included in the third error correction decoder 152 have been subjected to error correction, become the eleventh memory 155 and the fifth error correction decoder 157 delivered. Replayed from the special playback data recording area For example, with special playback data (4-speed playback data and 18-speed speed playback data), the fifth error correction decoder is used 157 entered. The digital playback data other than the 18x speed playback data is stored in the eleventh memory 155 entered. Incidentally, in the second embodiment, during the normal reproduction, the error correction decoding operation using the C5-check code is not performed. (That is, the special reproduction data is put into the fifth error correction decoder 157 but no error correction decoding is applied.)

That in the third error correction decoder 152 detected ID signal is in the error correction decoding control circuit 154 entered. The error correction decoding control circuit 154 detects the ID signals separated from the sync blocks recorded in the error correction code recording areas, and identifies the type of the error correction code using the attached identification code data, and also detects the numbers of the track and the sync block during normal reproduction be reproduced. It also detects the current playback operation by means of the input terminal 153 input playback mode signal. The result of the identification of the error correction code, the track number, the sync block number and the reproducing mode information become the fourth error correction decoder 156 and the fifth error correction decoder 157 and the reproducing mode signal becomes the switch 159 delivered.

The digital playback data, in tracking units in the eleventh memory 155 are input are subjected to identification between the A-track and the B-track using the playback header information of the rotary heads 26a and 26b , The reproduced from A-tracks and in 22A signal shown 2 and that reproduced from B tracks and in 22B The signals shown in the memory are used to form two-track data blocks of 245 sync blocks. If the error correction code recorded in the error correction code recording area is for normal reproduction (C4 check code), the fourth error correction decoder uses 156 the track number information supplied by the error correction decoding control circuit 154 for determining whether the error correction block (five two-track data blocks) using the C4 check code is output in the eleventh memory 155 was formed.

If the according to the C4 check code 23 using error correction block (five two-track data blocks) in the eleventh memory 155 is formed, the data in the in 23 is read from the eleventh memory, and error correction (hereinafter referred to as C4 decoding) using the C4 check code is applied to the normal playback data and the 4-times speed playback data. The storage locations in the eleventh memory 155 from which the data is to be read, addresses to be read, and the read control signal are from the fourth error correction decoder 156 output. Data interleaving over five two-track data blocks becomes from the eleventh memory at the time of reading 155 causes. (The control of the interleaving is effected by data read addresses supplied by the fourth error correction decoder 156 The playback data for 18x speed will be entered when entering the 11th memory 155 , ignored. The data which has undergone C4 decoding is passed through the switch 159 to the output terminal 160 delivered.

If the error correction code recorded in the error correction code recording area is for special reproduction, nothing is done and the digital reproduction data is extracted from the eleventh memory 155 read and to the switch 159 output. When the digital playback data is from the eleventh memory 155 are read, the 4-times speed reproduction data and the data recorded in the error correction code recording area are disregarded, and transport packets are re-formed on the basis of the header information inserted within the data of the five sync blocks, and the data are then output , According to the selection control signal (reproduction mode signal) from the error correction decoding control circuit 154 the switch selects 159 the output of the eleventh memory 155 out.

Next, the operation during the special reproduction will be described. The from the magnetic tape over the turrets 26a and 26b on the drum 25 intermittently reproduced data is through the playback amplifier 70 amplified and into the digital demodulator 71 entered. The digital demodulator 71 acquires data from the input playback data and performs conversion to digital playback data and digital demodulation. The in the digital demodulator 71 digitally modulated data subjected to digital modulation are put in the third error correction decoder 152 entered. When the digital playback data is input, the third error correction decoder disconnects 152 that to the header of each sync block attached ID signal and gives the result of the separation to the error correction decoding control circuit 154 out. The digital reproduction data from which the ID signal has been separated becomes the third error correction decoder 152 in which the correction and detection of errors in the particular reproduction data are performed using the C1 check code. During the special reproduction, the data is intermittently reproduced as described in connection with the prior art example, so that the in 1A and 1B error correction block can not be formed, and the error correction using the C2 check code and the error correction using the C4 check code are therefore not performed.

The digital playback data to which the error correction in the third error correction decoder 152 is applied to the eleventh memory 155 and the fifth error correction decoder 157 output. The particular reproduction data reproduced from the special reproduction data recording area are stored in a memory included in the fifth error correction decoder 157 is provided. The digital playback data is not written in the eleventh memory for the reason explained above.

In the same way as in normal playback, this will be done in the third error correction decoder 152 detected ID signal in the error correction decoding control circuit 154 entered. The error correction decoding control circuit 154 detects the ID signal separated from the digital reproduction data recorded in the error correction code recording area, and identifies the type of the error correction code in accordance with the label information attached to the ID signal, and detects the track number and the sync block number of the currently reproduced part. Further, it detects in accordance with the via the input terminal 153 inputted reproducing mode signal is the reproducing operation. The result of identifying the error correction code, the track number and the sync block number, and the playback operation information (normal playback or fast playback information (4X speed playback, 18X speed playback, 2X speed playback, or 16X playback) Speed becomes the fourth error correction decoder 156 and the fifth error correction decoder 157 and the reproducing mode signal becomes the switch 159 delivered.

When the error correction code recorded in the error correction code recording area is the C4 check code, the fifth error correction encoder remains 157 inactive, and the reproduced special reproduction data becomes the twelfth memory 158 spent as they are. If it is the C5 check code, the in 24 error correction block shown in the fifth error correction decoder 157 an error correction using the C5 check code is applied to the particular reproduction data (the error correction will be referred to as C5 decoding hereinafter). The data subjected to C5 decoding becomes the twelfth memory 158 delivered. The output of the twelfth memory 158 becomes the switch 159 delivered. The desk 159 is controlled to select the output of the memory 158 during the special rendition. If the special digital playback data is from the twelfth memory 158 are read, the data reproduced from the error correction code recording area is ignored, and transport packets are re-formed based on the header information inserted in the data of five sync blocks. The error correction decoding control circuit 154 provides a selection control signal (playback mode signal) to the switch 159 so that it controls the output of the twelfth memory 158 during special playback.

The digital video tape recorder according to the second embodiment is formed as described above, so that in the recording track provided recording area for error correction codes on a Position is which both during normal playback as well as during fast playback is reproduced, and the recording area can therefore be common can be used, and the error correction code can be dependent on switched from the particular application (intended use) and the limited area for recording additional Information can be used effectively. When the digital video tape recorder as a external device for a computer or the like is used, the effective Error correction code with identical recording format will be added.

The error correction code is generated according to the intended use, and when the quality of the reproduction picture is given importance during the special reproduction, the C5 check code is recorded in the error correction code recording area to improve the error correction capability during the special reproduction, while if the reproduction picture quality meaning is given during normal play, the C4 check code is recorded in the aforementioned range to improve the error correction capability during normal reproduction. At the same time, the limited area on the magnetic tape can be effectively utilized. When the digital video tape recorder is used as an external storage device for a computer or the like, a powerful error correction code can be attached to the recording data having an identical recording format, and it is therefore possible to use the same recording format for the recording. Furthermore, digital video tape recorders already in use may be used as external storage devices for computers or the like. (Since the recording format is compatible, diversification (use for various applications) is possible.) Since the recording area on the magnetic tape is effectively used as described above, the amount of data that can be assigned to the particular reproduction is increased, and the reproduction picture quality during the special playback can be improved.

In the second embodiment, the recording format is as in 21 but the recording format is not limited to the illustrated format, and similar effects can be found in a digital signal recording apparatus, a reproducing apparatus and a recording / reproducing apparatus (digital video tape recorder, digital disk apparatus and the like) having a recording format in which particular reproduction data are separated from the inputted data and recorded on predetermined areas on the recording medium, and a system having a recording format in which data areas are arranged such that the special reproduction data recording area and the error correction code recording area are both selected by a head of each device during the particular one Play can be reproduced. The second embodiment refers as an example to the situations where the error correction recording area on a scanning track of a rotary head 26a (Playback data for 18x speed), and the error correction code recording area is located adjacent to the special playback data recording area (4x speed playback data).

The depth of interleaving during normal playback is not limited to ten tracks (five two-track bursts), but in the PAL zone (frame rate is 25 Hz) centered on Europe, the depth can be changed to twelve tracks (six two-track data blocks). Even in the NTSC zone, the depth can be twelve lanes. The depth of interleaving may be identical between the NTSC zone and the PAL zone. The procedure of nesting does not have to be based on the in 22A to 22G and 2 Shown to be limited. For example, the interleaving may be in the vertical direction. The method for forming the two-track data block is not the one in 22A to 22G Shown limited. For example, it may be arranged to remove the 18-times speed data and the data from the error correction code recording area, and to store the data in the ascending order (with respect to the 135 sync blocks in the video area) on the A- The track is read, and the data on the B track are similarly read in the ascending order of the sync block numbers to form a two-track data block of 230 sync blocks, and the data of the error correction code recording area are read in the order of the area [10 ], Area [11] and area [12] are added to form a two-track data block of 245 sync blocks. It is also possible to use a nesting.

The Recording data must not an ATV signal, but can be a DVB signal in Europe which was obtained by compressing the video signal accordingly the MPEG2, or a signal generated by compression according to the MPEG1 was, and still can similar effects are obtained. The playback speeds while The fast playback will not be up to 4 times the speed and limited 18 times the speed, but similar Effects are obtained with a system which has a recording format has in which recording areas for special playback data are arranged so that they the playback speed, that of the recording device for digital Signals is required, and the data areas are arranged that the Recording area for special playback data and the recording area for error correction codes both by a head while the particular reproduction can be reproduced.

Moreover, since the data is arranged as described above, each of the transport packets does not extend over two tracks, and the data is arranged within each track, and the size of the circuit for performing the interleaving can be reduced. Moreover, even if the depth of the interleaving is changed to twelve tracks for the PAL or SECAM zone, since the data within one track is finished, the control is simple. Because the two-track data block consists of two tracks In addition, the control is simple, even if the nesting extends over twelve tracks. For example, in the case of the recording format shown in the prior art, the main area of each track is formed of 97 sync blocks, so that the data is arranged with a period of five tracks. That is, when the inputted transport packets are converted into a sync block format, the data from the data at the header of the transport packet from the sync block is located at the header of, for example, five tracks each, and it is necessary to provide an identification signal for identifying the data to Add intent and identify the sync block attached to the transport packet at the header. When the data within a track is finished, the head of the transport packet can be easily detected without adding an identification signal. The ID signal or the header areas can be effectively used, and the size of the circuit can be reduced.

When the data transmitted in the form of transport packets is recorded by an SD standard digital video tape recorder, in the second embodiment, two transport packets are converted to five sync block formats and recorded. This is just one example. In general, m transport packets can be used to form n rows of sync blocks (n and m are positive integers). Further, by forming the recording format on a recording medium such that there are n blocks of synchronized data on the same track when the data of the sync block format obtained by the conversion is recorded on the recording medium, the data of the transport packets can be effectively converted to the sync block format. Further, since the n sync blocks of data within a track are ended, when the data of the sync block format is converted into data of the transport packets during reproduction, a set of the n sync block formats can be easily separated using the track information such as a track identification signal and the sync block number. Accordingly, the size of the circuit, especially in the display system, can be reduced. In addition, it is not necessary to record the identification signal of the n sync blocks, and the recording areas for the data can be effectively utilized. The length of a sync block is not on the in 2 shown limited.

Embodiment 3

The arrangement of the 4-times-speed reproduction data recording areas, the 18-times-speed reproduction data recording areas, and the error correction code recording areas and the number of respective areas are not limited to those of the above-described example. The fast playback speeds are 4 times the speed and 18 times the speed according to the second embodiment, but they may take other values, and yet the error correction codes recorded in the special playback data recording areas and those on the scanning tracks of the rotary heads 26a and 26b provided error correction code recording areas switched between those attached to the normal reproduction data and those attached to the special reproduction data. Then, effects similar to those described above can be obtained.

At the second embodiment is recorded in the error correction code recording area Error correction code switched according to the input command (given for example by the user). The invention is not on such an arrangement is limited. If, for example, to reduce costs, a digital video tape recorder with only an error correction coder and only an error correction decoder is used (a digital video tape recorder with the Formation of recording and reproduction of the error correction code, to the particular reproduction data in the error correction code recording area added is, and the special playback data, or a digital video tape recorder with the Formation of the recording and reproduction of only the error correction codes, to the normal playback data in the aforementioned areas are attached), are those recorded in each of the aforementioned digital video tape recorders magnetic tapes compatible and can represented by each of the types described above, and when the digital video tape recorder as an external memory for computers or the like may be used in the future, a powerful error correction code attached to the recorded data with identical recording format, and it is possible The digital video tape recorder works together with an external video recorder Storage device to use. Since the recording areas on the recording tracks can be effectively used, will continue to be the increased amount of data allocated to particular playback data, and the picture quality during the special playback can be improved.

When digital low-price video tape recorders such as digital video tape recorder apparatuses without encoders and decoders may be used for the error correction codes attached to the error correction code recording areas, when a flag for identifying the signal is recorded in, for example, an ID signal, compatibility with the above-described digital video tape recorders may be achieved; and it is not necessary to separately determine a recording format for kidney price devices, and compatibility is maintained even when the digital video tape recorder is used as an external recording device for computers or the like.

If a compatible reproduction is performed using the the aforementioned three types of digital video tape recorders, and when the error correction decoder for decoding the in the error correction code recording areas recorded error correction codes is not provided the arrangement is such that the digital playback data without the error correction decoding output which are the ones mentioned above Error correction codes used. Then the compatibility will be maintained.

Embodiment 4.

At the second embodiment is the identification signal for appended the error correction code to the ID signal. The invention is not limited to such an arrangement. In the second embodiment the subcode areas are during reproduced the fast playback, so that an identification signal the aforementioned three signals (a signal representing the normal reproduction error correction code indicates a signal containing the fast playback error correction code or a signal indicating a signal that is not the aforementioned Error correction codes are heard (e.g., a signal of a predetermined fixed pattern is recorded can be, and yet a similar effect can be achieved become. The associated enlargement of the circuit is very low. The identification signal can be sent to both the ID signal and also added the subcode signal become. In the case of a standard through which the error correction code added must become, can the identification number one for switching between the two signals (error correction code for normal playback and error correction code for fast playback) be.

Embodiment 5

With respect to the error correction code recording area in which one track (track T4 in FIG 20 ), in which there is no recording area for the particular reproduction data, the aforesaid error correction code recording area is arranged at the same height as the error correction code recording area which is on a track (track T2 in FIG 20 ) on which the particular reproduction data is recorded and formed by a rotary head having the same azimuth. With such an arrangement, the burst error correction capability can be made uniform between tracks having the same azimuth, and the control of interleaving at the time of the C4 check code is easy and the size of the circuit can be reduced. However, it is also possible to provide, with respect to the track (track T4) excluding the special reproduction area, the aforementioned error correction code recording area in an area different (at a different height) from the error correction code recording area located on the track (FIG. Track T2) which has the recording characteristic for special reproduction data and recorded at the same azimuth angle, although the size of the circuit is then slightly increased.

Embodiment 6

The C4 check code and the C5 check code are the (245, 230, 16) Reed-Solomon code and the (30, 25, 6) Reed-Solomon code, respectively. The invention is not limited to such an arrangement, and other code forms may be used to form the recording format in the aforementioned manner, and similar effects are then obtained. That is, the special reproduction data recording area and the error correction code recording area are on the scanning tracks of the rotary heads 26a and 26b and the error correction code recorded in this error correction code recording area can be selected between the error correction code attached to the normal reproduction data and the error correction code attached to the particular reproduction data, and then similar effects are obtained.

The applied depth of interleaving when the error correction code attached to the normal reproduction data is generated is ten tracks in the NTSC zone, and in the PAL and SECAM zones the error correction block for normal reproduction data is formed with a depth of twelve tracks, and the normal playback data is interlaced to generate the error correction code for normal playback. With such a configuration, in a digital video tape recorder according to the SD standard, digital data corresponding to the frame rate of 30 Hz in the NTSC area and 25 Hz in the PAL and SE-CAM area are recorded Interlacing of the normal reproduction data can be achieved in accordance with the frame rate of the digital video tape recorder according to the SD standard. Accordingly, it is possible to form a system which can be used as the digital video tape recorder for recording normal signals, and as a digital video tape recorder for recording ATV signals or the like. (It is not necessary to provide an area for the additional recording of the numbers of the error correction blocks, since the interleaved data can be identified by the track number attached to the ID signal.) It is not necessary to provide an additional circuit for separating the error correction block.) The part that can be shared is increased when the digital video tape recorder is designed, and the size of the circuit can be reduced.

Claims (6)

A digital signal recording apparatus in which intra-frame or sub-picture coded or inter-frame or sub-picture coded digital video and audio signals inputted in the form of transport packets are recorded according to the transparent record, characterized by Data separation device ( 10 ) for separating the intra-frame or partial image coded digital video signal from the transport packets, a generating device ( 12 ) for special reproduction data for reconstructing the intra-frame or partial image coded digital video signal received from the data separation device ( 10 ) has been separated to produce special reproduction data, and a generating device ( 13 ) for recording data for reconfiguring the data of the input transport packets to generate sync block formats, an area for recording the special reproduction data and error correction codes is provided on a scanning trace of a head ( 26 ) which scans the recording medium at a predetermined fast playback speed, wherein either the error correction code attached to the particular playback data or the error correction code corresponding at least to the data provided by the recording data generator ( 13 ), is recorded in the area for recording the error correction code, and wherein an identification signal identifying the error correction code recorded in the error correction code recording area is added to the recording signal and recorded. A recording apparatus according to claim 1, characterized in that when the sync block formats are recorded by the recording data generating apparatus ( 13 ), m transport packets are used to generate n lines of sync blocks of data, and the record data are arranged such that the n lines of sync blocks of data supplied by the record data generator ( 13 ), do not extend beyond a recording track. A recording apparatus according to claim 2, characterized in that the identification signal for identifying the data recorded in the error correction code recording area is transmitted by using a recording area provided on the data recording part which remains when the transport packets are stored in the recording data producing apparatus (Fig. 13 ) are converted into sync block formats. Recording device according to claim 1, characterized in that that of the generating device ( 14 . 15 ) for special reproduction data, in the form of the inputted transport packets, and at the time of the recording are converted into sync block formats such as the input transport packets and then recorded. Recording device according to claim 1, characterized characterized in that the recording area for the error correction code is adjacent to the recording area for special playback data is arranged. A recording apparatus according to claim 1, characterized in that when the error correction code is applied to the output of the recording data generating apparatus ( 13 ), the output signal of the recording data generating device and a part or all of the output signal of the generating device ( 14 . 15 ) is used for special playback data to form the data block.