DE1947560C3 - - Google Patents

Info

Publication number
DE1947560C3
DE1947560C3 DE19691947560 DE1947560A DE1947560C3 DE 1947560 C3 DE1947560 C3 DE 1947560C3 DE 19691947560 DE19691947560 DE 19691947560 DE 1947560 A DE1947560 A DE 1947560A DE 1947560 C3 DE1947560 C3 DE 1947560C3
Authority
DE
Germany
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE19691947560
Other versions
DE1947560A1 (de
DE1947560B2 (de
Inventor
Paul Werner Von Dipl.-Ing. 8190 Nantwein Basse
Klaus-Dieter Dipl.-Ing. 8000 Muenchen Hofmeister
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to DE19691947560 priority Critical patent/DE1947560A1/de
Publication of DE1947560A1 publication Critical patent/DE1947560A1/de
Publication of DE1947560B2 publication Critical patent/DE1947560B2/de
Application granted granted Critical
Publication of DE1947560C3 publication Critical patent/DE1947560C3/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
DE19691947560 1969-09-19 1969-09-19 Taktgesteuerter Logikbaustein aus MOS-Transistoren Granted DE1947560A1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE19691947560 DE1947560A1 (de) 1969-09-19 1969-09-19 Taktgesteuerter Logikbaustein aus MOS-Transistoren

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19691947560 DE1947560A1 (de) 1969-09-19 1969-09-19 Taktgesteuerter Logikbaustein aus MOS-Transistoren

Publications (3)

Publication Number Publication Date
DE1947560A1 DE1947560A1 (de) 1971-03-25
DE1947560B2 DE1947560B2 (de) 1973-10-11
DE1947560C3 true DE1947560C3 (de) 1974-05-09

Family

ID=5746009

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19691947560 Granted DE1947560A1 (de) 1969-09-19 1969-09-19 Taktgesteuerter Logikbaustein aus MOS-Transistoren

Country Status (1)

Country Link
DE (1) DE1947560A1 (de)

Also Published As

Publication number Publication date
DE1947560A1 (de) 1971-03-25
DE1947560B2 (de) 1973-10-11

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)