DE1774782C3 - Arrangement for statistical error reduction in devices for machine character recognition - Google Patents

Description

The invention relates to an arrangement / ur statistical Error reduction in devices for machine character recognition according to the preamble of the claim 1.

In the case of the automatic character recognition and the subsequent data processing, there are, on the one hand, the possibility of errors given by soiled or only partially existing characters by the identification system can be read incorrectly, on the other hand errors due to incorrect information on the Recording media are caused. While the second type of failure by taking action technical improvement of the detection arrangement can not be detected, it is known that in Character recognition devices occur first type of errors due to additional diagnostic measurements reduce to do accuracy of the whole Improve arrangement. These procedures are costly and require a large number of additional components that reduce the need for maintenance and make the system more susceptible to repairs.

It is also known that To recognize character readers with regard to pairs of Euchstabene that can be confused (cf. DT-AS 12 21 042 and IBM Technical Disclosure Bulletin. Vol. 6, No. January 8 1% * ·. Pages 55 and 5b) and: in the evaluation accordingly / u take into account.

When using a fixed word set, the /. Ii.

in an insurance company by the file that name. Insurance number. Address etc. one each policyholder contains as; is provided, can reduce the frequency of errors regardless of the type of error through statistical decisions will.

The object of the present invention is to tinmal greater security through improved evaluation of statistical features of the information to be read against errors and, on the other hand, through special indicators on the output side In the event of rejections, operating staff make the decision easier by automatically making suggestions for the choice of a correct word will be given.

This object is achieved by the features specified in claim 1.

Advantageous refinements and developments of the subject matter of the invention are set out in the subclaims refer to.

Advantageously, the throats will not go through Corrected additional recognition circuits in the character reader, instead it becomes a special data processing system smaller type. that between the character recognition device and the actual data Processing unit is switched. used to reduce the error rate through statistical decisions which are based on the frequency of use, each of those contained in a given word set Words are examined for possible variations, and dice variations are examined according to their acceptability to the data processing system classified. Only the more common words are classified here. This measure keeps the size of the memory required within reasonable limits. the The memory content then comprises approx. 75 to 80% of all words. with which the character reader works. From the character reader recognized words are then compared with words from this memory in order to determine their degree of acceptability to determine. The words are then tagged along with the degree of their acceptability is entered into an output memory, from which they are taken for further processing be able.

In addition, the advantage is achieved that, in the case of verbal instructions, the operating staff automatically the decision to choose the right word is made easier by the fact that the machine itself Makes suggestions of such words, which are candidates for correct words from the point of view of probability are.

In the following an embodiment of the invention is described in more detail with reference to the drawings. Show it:

1 shows the block diagram of an exemplary embodiment of the invention and

F i g. 2a and 2b show a detailed representation of the block diagram shown in FIG. Figures 2a and 2b belong according to the scheme in FIG. 2 together.

According to the illustration in FIG. 1, common names and their variants are shown in the upper half The arrangement 1 shown in the figure classified. A file of 10 common names contains e.g. B. 17 000 the common names that comprise about 80% of the population. With this common name is at the same time the number of people who have these names is stored in the file. The file 12 for Confusion pairs contain such confusion. Hip probably made by the character reader and the probability with which the mix-up occurs. B. a small "> a" for a lower case "s" can be read because the character reader recognizes it incorrectly due to inferior printing. The probability of this occurrence is 0.002. Correspondingly contains a memory position in the file for confused pairs an "a" for an "s" and the probability 0.002.

The false name generator 14 is connected to the common name file 10 and the Confusion pair file 12 is attached and creates variants of the common names. This Generator examines a common name from file 10 for characters that could be mistaken for pairs in of file 12. Then the generator 14 makes the same exchange that the character reader may do has made and outputs a false name. which is a variant of the common name. Simultaneously a statistical calculation is carried out in generator 14 employed on the number of front character readers due to a mix-up of incorrectly readable messages. This calculation is based on the number of people who have common names and the likelihood of that the mix-up that took place actually took place in the character reader. If z. B. the usual Name "ionas" with a frequency of 100,000 in the Common name file 10 and in the mix-up pair datci 12 a probability of 0.001 is stored for the confusion "e" for "a", then the calculator multiplies 100,000 by 0.00! and comes / u to the result 100. So one becomes of the sign eater c "\ expect he mistakenly got the name 100 times ") Ones" reads when he actually should have read "| onus" have to.

The false name formed from the common name is then passed to a comparator 16. where he with all the so-called real names actually provided for the resulting data processing from the file 18 correct names are compared. This comparison is intended to determine whether the Incorrect name generated exists as real name. the File 18 real names contains the number of people who have that name for each name. If animal False name actually exists, the comparison switches 16 the ratio calculator 20 a.

The ratio calculator 20 is intended to determine the ratio between the number of people who actually bear the name and the number of processes in which this name was generated as a variation of a common name. The number of people with real names (NJ is obtained by the computer from the file 18. while the number of names that are probably incorrectly generated from a common name (Nt :) comes from the computer part of the generator 14. The ratio calculator then divides the Number of false names (N _{f :)} by the number of people who actually carry the name (Wjj.

In the example mentioned above, in which the name "Jones" was generated from the name ") onas", the comparator 16 determines that the error amc "Jones" actually exists as the correct name and is stored in the file 18 correct names. This real name ") ones" carry / .. B. two people. The comparator 16 then sends a signal to the ratio calculator 20 so that it calculates the ratio between N / and Np. In this case Ni = 2 and Nk = 100 (100000 »Jonas« multiplied by the probability of 0.001 for the faulty one

Exchange "e" for "a"). Thus, the ratio N ₁ = 0.02, ZNr.

This ratio is then given to a selection circuit 22 which accepts the common names and their variants accordingly. Change or reversal. The selection group "Change", in which the alschname is changed to a common name, is also divided into the subgroups "Change and Rejection" and "Change and Acceptance". In order to be able to carry out the classification, the selection circuit 22 receives the ratio NiZNi and an indication from the generator 14. whether or not a false name has been received, as well as an indication from the comparator 16. whether a correct name is present for the false name or not . The divisions can be grouped as follows:

1. The common name is indicated by the acceptance mark \ - if there is no mistake or the ratio N _t / Ni is greater than or equal to 20.

2. Incorrect name is changed to the usual one and provided with an acceptance mark - if a corresponding correct name is available for the incorrect name and the ratio NiJNr is less than or equal to 0.03.

3. False name is changed to the usual one and provided with a rejection mark - if the false name corresponds to a real name and if the ratio NiJNi is between 0.03 and I or equal to I.

4. The common name is reversed erdien if the ratio: ^ / V, V / / wipe I and 20 lies.

The thresholds for grouping the names are empirical values. it is beneficial to follow them .

The signals from the selection circuit 22 shown in Fig. I are directed to the file 24 of classified names. The file 24 also receives all common names from the file 10 and the aliases from the generator 14. These names and the Mm of the selection circuit Any marking made allows the classified name file 24 to save the common name as acceptance or rejection or change the alias to a common name and save it as acceptance or rejection The described arrangement continues until all the common names of the file 10 have been sorted. At the end of the processing , the file 26 for classified common names thus contains all common names and all variants of the common names (false names). These common names and the False names fall into one of the four groups given above divided. Names from the character reader can then be compared to the names in file 26 to determine whether the name received from the character reader needs to be marked acceptance or rejection, or whether it needs to be changed and then marked acceptance or rejection.

The name of the character reader is temporarily stored in the buffer 28. A comparator 30 compares the name in the buffer 28 with all the names in the file 26. If there is a corresponding name in the file 26, the comparator 30 sends a signal to the first name selector 32 and the second name selector 34. These two selectors are also with the File 26 is linked so that it will receive an indication of whether or not this name is to be changed to a more statistically common name.

The first name selector 32 determines that the name does not need to be changed and passes it into the output memory 36. Also, the first name voters are 32 the acceptance connected with the names in the file 26 or rejection mark on the Ausgabespeichcr 36 on.

The second name dialer 34 determines whether the dem

ίο a classified name corresponding to the input name read from the file 26 is provided with a change mark. If so , the broader name selector 34 forwards the second or next name stored in the classified common name file 26 to 36. This name has been changed to a common name and contains an acceptance or rejection mark. which is also stored in the output memory 36.

If the comparator 30 does not find a match between the input name read and a name in the file 26 for classified common names, a second series of comparisons with uncommon names from the file 38 is carried out. This comparison begins when the file 38 for uncommon names receives a signal from the comparator 30 indicating the mismatch! and a Dal ei-linde signal arrives from the classified common name file 26. The file 38 of uncommon names then forwards their names to the comparator 30 so that it can determine whether there is a match with the input name. In addition, the disagreement signal and the end-of-file signal from the file 2b sound the selection circuit 40. which then forwards the input name directly to the output memory 36. The search then continues in the file 38 for uncommon names to the end of that file, and the selection circuit 40 marks the input name with a rejection mark. if no agreement was found by the comparator 30. If a match was found, the selection circuit 40 provides the input name with an acceptance mark and forwards it to the output memory 36.

The following section summarizes the above representation.

After the names have been classified in the file 26 for classified common names, input names can be compared with these stored names. The comparison allows a circuit to determine whether the input names should be marked acceptance or rejection and whether they should be changed to another common name and then marked acceptance or rejection

should. If the input name does not exist in the file 26, a comparison is made on a second level. In this comparison with uncommon names , the input name is only provided with the comment "Acceptance" or "Reverse" , and it becomes

does not try to change it to a more common name from a statistical point of view.

The purpose of the " Change Names to More Common Names and Acceptance" group has already been discussed. The purpose of the group »Names au;

Change more common names and reject ”is as follows: This is to improve the best possible suggestion of the character reading system without putting so much trust in this best suggestion

has. that the data processing system is recommended to accept this proposal. This allows the operating staff to process the best suggested names faster than if they were only rejected. Names are accepted that have no incorrect variants, or for which the number of incorrect variants is so small compared to the actual number of correct, common names that the incorrect variants can be ignored. The rejection comes in l ^: rage. if the input name from the character reader could not be found either in the file 26 for classified common names or in the file 38 for uncommon names, ie the input has been read incorrectly and does not really exist in this form.

For the execution of the in F i g. 1 of the example shown are shown in FIGS. 2a and 2b. The F i g. 2a provides the device for generating the classified common name file 26 while the I "i g. 2b the device for! Messing up Kingabe names from the drawing reader according to the classification in of file 26 contains.

The file to common names in FIG. 1 consists of the memory 50 and the address controller 52 in 2s F i g. 2a. The memory 50 can e.g. B. be a core, disk or a magnetic drum storage. The address control 52 is taken from the normal address control rules for saliva 'and a counter for the sound of the address.

The file 12 for mix-up pairs in FIG. 1 seen from the memory 54 and the address controller 56 at the top right in FIG. 2a. The address control 56 and the memory 54 are constructed similarly to the memory 50 and the address control 52. To initiate the classification of the common names, a start signal is given to the two address controls 52 and 56. The two address controls have the effect that the first common name is placed in register 58 and the first mix-up pair is placed in register 60. The number of people N ₁ - with a common name is stored in memory 50 along with each name. The size of / V ₍ is given with the associated name in the register 58. The start signal which switches on the address controls 52 and 56 is also passed via an OR circuit 64 and a delay circuit 66 to a bistable multivibrator 62. The delay circuit 66 should enable registers 58 and 60 to be loaded before the flip-flop 62 is turned on by the start pulse. When flip-flop 62 is turned on, AND circuits 68, 70 and 72 are also set to the conductive state. The AND Circuit 70 receives a further input signal from the equal output of the comparator circuit 74, while the AND circuit 72 receives a second input signal from the unequal output of the comparator 74.

The comparator 74 compares the characters of the name loaded into the register 58 with a character in the to register 60, ie it examines whether any characters of the name stored in the register 58 are part of the mix-up pair. The mix-up pairs pass through register 60 after the first character of each mix-up pair has been compared with each character ^h 5 of the name stored in register 58.

The serial comparison of the characters from the

Confusion pair in register 60 with the characters in the name takes place via switch 76. The electronic Controlled switch 76 starts with the first character in the name and will act on the other characters of this The name is switched on by a pulse which further switches the shift register 78. Contains in the beginning the shift register 78 has a switch-on condition in its first stage. As a result, the first post of the Switch 76 the first character of the name from the register 58 to the comparator 74, which it with the Compare characters of the mix-up pair in register 60. If no match is found is, a pulse from the comparator 74 runs back through the AND circuit 72 and the OR circuit 80 to shift register 78. whereby the switch-on condition in this shift register by one position is moved. The second position in the shift register then leaves the second position of switch 76 that Second characters from the register 58 to the comparator 74, so that it matches the character from your register 60 is compared. As long as there is no match between characters from the name and the character in the If register 60 is detected, switch 76 through the entire name stored in register 58. When the switch is finally behind if there is a space at the end of the name aiii this condition is discharged by the sign detector 82, which receives the sign signals via an AND circuit 68 receives.

The character detector 82 generates upon detection of a space a pulse which is given to the address controller 56, which then sends the Confusion pair memory 54 resounds given address by one position. It also represents the impulse from the space detector to the register 60 and via the OR circuit 84 to the unstable trigger circuit 62 back. By resetting this toggle switch, AND circuits 68, 70 and 72 are no longer turned on while a new mix-up pair is loaded into register 60 with the associated probability. The impulse from the Lcerzeichenendelcktor 82 is also passed through an OR circuit 64 and the delay circuit 66 and switches the bistable flip-flop 62 on again. Delay 66 allows register 60 to be loaded with a new mix-up pair. before the flip-flop 62 is turned on again.

If there is a new mix-up pair in register 60, comparator 74 can again search for a character in the name stored in register 58 which corresponds to a character in the mix-up pair. At the beginning of the new comparison, the shift register 78 was switched back by the same pulse from the blank detector 82 which advanced the addressing of the mix-up pair memory 54. This pulse from the space detector runs through the OR circuit 86 and switches there; Shift register to a switch-on condition only in the first position.

When comparator 74 detects a match between a name character from register 58 and a character from register 60, a false name must be generated. For this purpose, the name stored in register 58 is also passed from memory 50 to register 88. The register 81 receives only the name from the common name memory and not the size Nc.

The register 88 is connected to a switch 90

which is controlled by the shift register 78 in the same way as the switch 76. The switch 90 sets the Connections from AND circuit 92 to Characters in the name stored in register 88. The AND circuit 92 is activated by a signal from Equal output of the comparator 74 switched on, which is also via the AND circuit 70, which was already during of the comparison was switched on, to the AND circuit 93 was passed. If there is equality, direct the switched AND circuit 92 that for the Name characters include / use / end characters from register 60 via switch 90 to the appropriate position in the name in register 88. The switch 90 is switched on at the same time as the switch 76, so that a character match in the name in register 58, as: it was recognized by comparator 74, to this leads, ciaß a replacement character in the name in register 88 in the appropriate place. The name a filename is entered in register 88. if the comparator 74 finds the match between a Identifies characters of a mix-up pair and a character in the name stored in register 58.

The statistical computer in the error name generator 14 (FIG. I) consists of the UN D circuits 94 and 96 and the multiplexer 98 in FIG. 2a. When a match is found by the comparator 74, the AND circuit 70 turns the AND circuits 94 and 96 on. The AND circuit 94 then passes the amount by which the probability of occurrence of confusion pair indicates to the multiplier 98. 96 while the number N _1, the AND circuit - - the number of people with this Nanen - forwarded to the multiplier 98th The multiplier ran that

;> duki these two numbers and forwards it to register 88. This product is the size N ₁ - and indicates how often the error name will be generated from the common name.

The comparator 16 shown in Fig. 1 is at the left side of FIG. 2a shown in more detail as 104. The real name file 18 in FIG. 1 consists of one Memory 100 and address controller 102, which are also shown on the left-hand side of FIG. 2a shown are. The memory 100 and the address controller 102 operate in principle in the same way as the memories 50 and 54, respectively and address controls 52 and 56, respectively.

The comparator 104 shown in FIG. 2a receives the false name from register 88 and a correct name from register 106. Register 106 is loaded with the correct name from memory 100 when address control 102 is activated by a signal from the bistable flip-flop 108 is turned on. the flip-flop 108 is turned on only when the comparator 74 detected a match in the generator 14 in Fig. 1 and which has caused the generation of a false name This given to the address controller 102 pulse switched on via the OR circuit 120 and the delay line 112 also includes the flip-flop 110. The delay line 112 enables the loading of the first correct name from the memory 100 into the register 106. When the flip-flop 110 is switched on, the output signals from the comparator 104 via the AND circuits 114 and 116 are monitored.

If there is no correspondence between the correct name in register 106 and the incorrect name in register 88 , a pulse is given by the comparator 104 via the AND circuit 114 to the OR circuit 118 and to the address control 102. This pulse switches register 106 back and the address control 102 continues, so that a new correct! Name is given to register 106. There! Unequal signal from comparator 104 is also given via ODRR circuit 118 to bistable trigger circuit 110 and switches it back. In this position of trigger circuit, AND circuits 114 and 116 are no longer switched on, while the new correct name is switched on register 106 is directed. The pulse from the AND circuit 114 is also passed via the OR circuit 120 and a delay circuit 112 to switch the flip-flop circuit 110 back down again. The delay allows the next correct name to be loaded into register 106 before AND gates 114 and 116 are turned back on.

This process continues until the comparator 104 determines a match between a false name in register 88 and a correct name in register 106 or until the end of the correct name file in memory 100 is reached. In the latter case, the memory end signal from the address controller 102 runs via an AND circuit 122 and an OR circuit 124 and switches the AND circuit 126 on. When the AND circuit 126 is switched on, it passes a false name from the register 88 via the OR circuit 128 to the first name position in the register 130. In addition, the output signal from the AND circuit 122 is passed through an OR circuit 132 and switches the circuit AND circuit 134 on. which then forwards the common name from which the false name is derived to the second position in register 130. In addition, the output of the OR circuit 132 marks the first name in the register 1130 as changed (position S). The output signal from ^uCr AND circuit 122 is also routed via an OR circuit 136 and switches position T of the second name position in register 130 to acceptance. So if a false name was generated that is not a real name. this false name is marked "Change to common name" and the common name is marked with "Accept".

In order to transfer this information from the register 130 to a memory, the output signal from the AND circuit 122 is also passed via an OR circuit 138 and a delay line 140 in order to switch the AND circuit 142 on. The AND circuit 142 then routes the contents of the register 130 to the memory 144 shown in FIG. 2b for classified useful names. By the delay circuit 140, the register 130 names and their associated markings can be loaded before the Iformation is directed to the memory 144th The output from the OR gate 138 also switches the register 130 back immediately before the register is loaded with the names and tags

The AND circuit 122, which is the output signal

generated, the mismatch and the end of the

Memory 100 displays d. h that no real name for

the false name is given by the bistable

Toggle switch 123 switched on in the rest position

6 <= ntii ^ ο ^{dle by an} output signal from the

AND circuit 116 is turned on. This only has

then an output if a real name for

the false name is determined by the comparator 104

would. If no real name for the wrong name

is present, the toggle circuit 123 remains in the rest position and the AND circuit 122 is switched on when the end of the memory 100 is reached and the corresponding signal is generated by the address controller 102. s

If the Vergleichet- 104 find a real name discovered alschnamen! Produces the AND circuit lib em output signal, flip-flop

125 turns on. The output signal is also delayed by the delay circuit 146 and the delayed pulse is used to reset the address text ΐ-ιιημ to the start address of the memory 100 and to reset the register 106 . The delay circuit 146 enables the circuit to operate before the register 106 and the address controller 10? be canceled.

The v.arch the switching solution of the bistable tilting scarf Hinged 123 stored signal for match w ill used to turn the OR circuit 124 on the AND circuit 126. The AND circuit

126 then forwards the false name from register 88 to the first position of register 1 30. In addition, the signal stored in the circuitry of flip-flop circuit 123 is used for matching to switch AND circuits i48 and 150 on. The I IND circuit 148 forwards the CiR) Ue Ni to the divider 152 while the AND circuit 150 transfers the number Nt (number of people who use the nickname as their correct name) to the rail wiring 152. The arithmetic circuit 152 then calculates the behavior-η is, V; .V /.

The exit of the> chaluing 152 is through three Visual wave value detectors monitored. The threshold detector 154 has an output signal when the ratio .V; /, \ y is less than or equal to 0.05. the Thresholds «. ·, Ice detector 156 has an Austransissisrnal. ".elin this ratio greater than 0.5 and less or is equal to 1 and the threshold advertising 158 hai a Output signal if the ratio is greater than or equal to 20 is. The output signals from these three threshold reversal detectors determine whether the names in the register are marked with a change mark and also with to be provided with an acceptance or reversal mark.

When the ratio NJNe is less than or equal to 0.5. the detector 154 has an output signal which runs via an OR circuit 132 and provides the first name in the register t30 with a change mark. The output signal from the OR circuit 132 also turns on the AND circuit 134 , which then routes the common name from register 58 to the second position in register 130. The output signal from detector 154 is also routed through an OR circuit 136 and to the marking of the second name used with "acceptance" The output signal of the detector 154 therefore marks the false name in position 1 in register 130 with a change and the common name is loaded into position 2 and marked as acceptable. If names are later compared with the false name, the false name is changed to a common name and the common name adopted.

If the ratio NJΝε is greater than or equal to 20, the detector 158 provides an output signal which is passed through an OR circuit 160 and marks the name loaded in the first position of the register 130 as acceptable. In this case at least 20 times more people have the wrong name as a correct name than this appears as a mistake in a common name. As a result, the aliases are marked as acceptable and correct and passed into the classified common name file as an acceptable name. This transfer to memory 144 in FIG. 2b occurs when the bistable flip-flop 123 is switched on. which is effective via the ODF.R circuit 138 and the delay line 140 at the input of the AND circuit 142 .

When the ratio of NJHi is less than or equal to 1 iintl is greater than 0.05. the detector 156 emits an output signal. an OR circuit 132 is passed and the false name in position 1 of register 130 is marked with a change. The common name is again passed to position 2 of register 130 via an AND circuit 134. In this case, however, the name in position 2 is marked as unacceptable ir and thus .ils rejection is classified. As a result, the false name is classified in the category "change common name ·" and the common name is marked as "rejection". This is to cmc (iruppe. In which a suggestion is given by the arrangement, but its reliability is very low ivi. Danish Mnd all described in which wn Je: \ r, i 1:, inuni: a false name made of gray names and confusion pairs are generated.

If: '· for a common name there is no I alsc'"nane, this condition is recognized by ei ¹ I ^: ND-Schai: Ling 162, which is shown on the right ohei: m Fi _ ·. 2 ;:. The AND- Circuit 162 is only an 'output of the unstable flip-flop 108'! And empl.mgi a memory end signal from the address control 56. At this point: 11g of the bistable flip-flop 108 a signal occurs as long as the equivalent 74 in the false name (nerature 14 no match between the character ernes \ ei alternation pair and the character in a '. name discovered !. The AND circuit 162 forwards the end-of-memory signal if the address controller 156 alie This signal from the AND circuit 162 is routed to the AND circuit 164 shown below in Fig. 2a, which is then switched on and the common name from the register 58 via the OR circuit 128 to the first position of register 130 also directs wi The output signal is passed to the I ND circuit 162 via an OR circuit 160 in order to provide the name in the first position of the register 131 with an acceptance mark.

At the end of the memory 54 for the confused pairs, the common name is transferred to the register 13 (and provided with an acceptance note and then forwarded to the memory 144 for classified common names. This transfer takes place even if a false name has been derived from the common name , since the bistable · flip-flop is reset 108, after de false name classified and in the memory 14. (2b) has been transmitted. the provision de-flop 108 is carried by the output signal de delay circuit 140 that also the lnhal of the register 130 in The memory 144 conducts this output signal of the delay circuit 140, the bistable flip-flop 1 10 , via an OR circuit 118, the register 106. the register 88, switches the shift register 78 via an OR circuit 80 and finally the address control 14

17 74 732

(Fig. 2b).

By the memory end signal of the address control 56 the address control 52 is also advanced, so that a new common name is loaded into register 58. This signal from the address controller 56 is passed through a delay circuit 166 passed, the address control 52 switches on and via an OR circuit 84 the bistable

Flip-flop 62 and the register 58 back. As already stated, the flip-flop 62 remains deferred for a time sufficient to remove the to load the new common name into register 58. Then the impulse switches that previously had the Address control 52 switched on the bistable multivibrator 62 on again after a delay. which is determined by the delay circuit 66.

For this purpose 3 sheets of drawings

Claims (5)

't claims: 1. Arrangement for statistical error reduction in devices for machine character recognition by comparing the machine-read words with words from a stored directory of valid words, taking into account the tendency of the character reader to make mistakes with regard to mistaken pairs of letters, marked by a device (1; Fig. 1) for generation a first file (26) of classified common words, in which the common words and their variants (false words) are stored identifying their acceptance, change to a common name and acceptance. Change to a usable name and indicate rejection or rejection, by a first comparator (30) / to compare the read word with the words from the first file, by a first name selector (32). of a change characteristic / calibrating the read word with a Annahmemarkierun £ in the Ausgabespeiclu ■ <■ (36) supporting at a positive comparison result, and in the absence, by a / wide name selector (34). which, in the event of a positive comparison result and a change identifier from the first file, transfers the changed word (wrong word) to the output memory with an acceptance or rejection mark, but in the event of a negative comparison result a / wide file (38) for unusual names instead of the first file to the first \ orglcicher is switched via a selection circuit (40) in the event of a positive comparison result the read information with an acceptance mark and in the case of a negative comparison result the read name with a rejection mark in the output memory. 2. Arrangement according to claim 1, characterized in that (3 the device (1; Fig. I) / ur Fr / eugung the file (26) for classified common words from a generator with an associated first computer (14) consists of generated from a third file of common words (10) and whose Aultrittshäufigkeit and from a fourth file (12) with ßuchstiibenverwechilungspaaren and! it reflect their Aultrittshäufigkeit that i confusion inclination Zeicheniesers used. Falschwör- so ter (word variants) that ^r erner a / A further computer (20) is provided which is connected to the first computer for receiving the probability of occurrence (Nf) of the wrong words, with a fifth file (18) of correct words and their frequency of occurrence (NiJ / um reception of this frequency of occurrence and with a / wide comparator (16 ) which switches on the / wide computer when it determines from the fifth file and the false word generator that the false word actually exists, (*> whereupon the / far computer then forms the ratio ti «1 occurrence probabilities (NilNr) , the value of which is transmitted to a selection circuit (22) which, depending on the size of this value, selects the common words and the false words with an identifier for Adoption. Change and rejection classified and transferred to a sixth file (241 classified words, where these identifiers are stored together with their words transferred from the third file and the gene =: raior for incorrect words and made available for transfer to the first file (26) . 3. Arrangement according to claim 1 and 2, characterized in that words changed to common words, which are provided with a rejection mark, are transmitted from the output memory (36; Fig. 1) to a display device (printer. Screen) to the To make it easier for the operator to choose the correct word. 4. Arrangement according to one or more of claims 1 to 3, characterized. dai3 a first memory (144) is arranged for receiving the file (26) of classified, common words and a second memory (198) is arranged for receiving the file (38) of uncommon words, and these memories (144 and 198) have an Odcr-Scha ' device (19δ) are connected to a first register (192) that a second register (170) for receiving the characters recognized by the character recognition device is provided in and that these registers (192 and 170) with a comparison circuit (190) and an output memory ( 178) are related. In 5. The arrangement according to one or more of claims I to 4, characterized in that the computer (20 or 152) / for determining the quotient (Nl Λ / t / mn a selection circuit (22) is connected. The three Schwellenwertschaimngen ( 154, 156, 158) best! ::, c ^ ren entrances are connected pa-allel and their outputs via a register (131) with the memory (144) of the file (26) of classified common words for the transmission of the acceptability of the words associated markings.